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Use match to simplify checks
1 parent ecc4c5c commit 99a5521

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+9
-11
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1 file changed

+9
-11
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llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp

Lines changed: 9 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -26,6 +26,7 @@
2626
#define DEBUG_TYPE "riscv-isel"
2727

2828
using namespace llvm;
29+
using namespace MIPatternMatch;
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3031
#define GET_GLOBALISEL_PREDICATE_BITSET
3132
#include "RISCVGenGlobalISel.inc"
@@ -536,14 +537,12 @@ void RISCVInstructionSelector::getICMPOperandsForBranch(
536537
RHS = MI.getOperand(3).getReg();
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538539
// Adjust comparisons to use comparison with 0 if possible.
539-
MachineInstr *MaybeConstant = MRI.getVRegDef(RHS);
540-
if (MaybeConstant && MaybeConstant->getOpcode() == TargetOpcode::G_CONSTANT) {
540+
if (auto Constant = matchConstant<int64_t>(RHS, MRI)) {
541541
switch (ICMPCC) {
542542
case CmpInst::Predicate::ICMP_SGT:
543543
// Convert X > -1 to X >= 0
544-
if (MaybeConstant->getOperand(1).getCImm()->getSExtValue() == -1) {
545-
MachineInstr *Zero = MIB.buildConstant(
546-
MRI.getType(MaybeConstant->getOperand(0).getReg()), 0);
544+
if (*Constant == -1) {
545+
MachineInstr *Zero = MIB.buildConstant(MRI.getType(RHS), 0);
547546
selectConstant(*Zero, MIB, MRI);
548547
CC = RISCVCC::COND_GE;
549548
RHS = Zero->getOperand(0).getReg();
@@ -552,9 +551,8 @@ void RISCVInstructionSelector::getICMPOperandsForBranch(
552551
break;
553552
case CmpInst::Predicate::ICMP_SLT:
554553
// Convert X < 1 to 0 >= X
555-
if (MaybeConstant->getOperand(1).getCImm()->getSExtValue() == 1) {
556-
MachineInstr *Zero = MIB.buildConstant(
557-
MRI.getType(MaybeConstant->getOperand(0).getReg()), 0);
554+
if (*Constant == 1) {
555+
MachineInstr *Zero = MIB.buildConstant(MRI.getType(RHS), 0);
558556
selectConstant(*Zero, MIB, MRI);
559557
CC = RISCVCC::COND_GE;
560558
RHS = LHS;
@@ -598,12 +596,12 @@ bool RISCVInstructionSelector::selectSelect(MachineInstr &MI,
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// If MI is a G_SELECT(G_ICMP(tst, A, B), C, D) then we can use (A, B, tst)
600598
// as the (LHS, RHS, CC) of the Select_GPR_Using_CC_GPR.
601-
MachineInstr *MaybeICMP = MRI.getVRegDef(MI.getOperand(1).getReg());
602-
bool Op1IsICMP = MaybeICMP && MaybeICMP->getOpcode() == TargetOpcode::G_ICMP;
599+
Register MIOp1Reg = MI.getOperand(1).getReg();
600+
bool Op1IsICMP = mi_match(MIOp1Reg, MRI, m_GICmp(m_Pred(), m_Reg(), m_Reg()));
603601
RISCVCC::CondCode CC;
604602
Register LHS, RHS;
605603
if (Op1IsICMP)
606-
getICMPOperandsForBranch(*MaybeICMP, MIB, MRI, CC, LHS, RHS);
604+
getICMPOperandsForBranch(*MRI.getVRegDef(MIOp1Reg), MIB, MRI, CC, LHS, RHS);
607605

608606
Register Op1 = Op1IsICMP ? LHS : MI.getOperand(1).getReg();
609607
Register Op2 = Op1IsICMP ? RHS : RISCV::X0;

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