@@ -864,11 +864,10 @@ define i32 @test_zext(i32 %a, i32 %b){
864
864
define void @test_invert_demorgan_or (i32 %a , i32 %b , i1 %cond ) {
865
865
; CHECK-LABEL: @test_invert_demorgan_or(
866
866
; CHECK-NEXT: entry:
867
- ; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[A:%.*]], 0
868
867
; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i32 [[B:%.*]], 0
869
- ; CHECK-NEXT: [[OR :%.*]] = or i1 [[CMP1 ]], [[CMP2]]
870
- ; CHECK-NEXT: [[NOT :%.*]] = xor i1 [[COND:%.* ]], true
871
- ; CHECK-NEXT: [[MERGE:%.*]] = or i1 [[OR ]], [[NOT ]]
868
+ ; CHECK-NEXT: [[CMP3 :%.*]] = icmp eq i32 [[B1:%.* ]], 0
869
+ ; CHECK-NEXT: [[OR_NOT1 :%.*]] = and i1 [[CMP2 ]], [[CMP3]]
870
+ ; CHECK-NEXT: [[MERGE:%.*]] = and i1 [[OR_NOT1 ]], [[COND:%.* ]]
872
871
; CHECK-NEXT: br i1 [[MERGE]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
873
872
; CHECK: if.then:
874
873
; CHECK-NEXT: call void @f1()
@@ -894,12 +893,11 @@ if.else:
894
893
895
894
define i1 @test_invert_demorgan_or2 (i64 %a , i64 %b , i64 %c ) {
896
895
; CHECK-LABEL: @test_invert_demorgan_or2(
897
- ; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt i64 [[A:%.*]], 23
898
- ; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i64 [[B:%.*]], 59
899
- ; CHECK-NEXT: [[OR1:%.*]] = or i1 [[CMP1]], [[CMP2]]
900
- ; CHECK-NEXT: [[CMP3:%.*]] = icmp ugt i64 [[C:%.*]], 59
901
- ; CHECK-NEXT: [[OR2:%.*]] = or i1 [[OR1]], [[CMP3]]
902
- ; CHECK-NEXT: [[NOT:%.*]] = xor i1 [[OR2]], true
896
+ ; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i64 [[A:%.*]], 24
897
+ ; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i64 [[B:%.*]], 60
898
+ ; CHECK-NEXT: [[OR1_NOT1:%.*]] = and i1 [[CMP1]], [[CMP2]]
899
+ ; CHECK-NEXT: [[CMP3:%.*]] = icmp ult i64 [[C:%.*]], 60
900
+ ; CHECK-NEXT: [[NOT:%.*]] = and i1 [[OR1_NOT1]], [[CMP3]]
903
901
; CHECK-NEXT: ret i1 [[NOT]]
904
902
;
905
903
%cmp1 = icmp ugt i64 %a , 23
@@ -913,17 +911,16 @@ define i1 @test_invert_demorgan_or2(i64 %a, i64 %b, i64 %c) {
913
911
914
912
define i1 @test_invert_demorgan_or3 (i32 %a , i32 %b ) {
915
913
; CHECK-LABEL: @test_invert_demorgan_or3(
916
- ; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[A:%.*]], 178206
917
- ; CHECK-NEXT: [[V1:%.*]] = add i32 [[B:%.*]], -195102
918
- ; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[V1]], 1506
919
- ; CHECK-NEXT: [[V2:%.*]] = add i32 [[B]], -201547
920
- ; CHECK-NEXT: [[CMP3:%.*]] = icmp ult i32 [[V2]], 716213
921
- ; CHECK-NEXT: [[V3:%.*]] = add i32 [[B]], -918000
922
- ; CHECK-NEXT: [[CMP4:%.*]] = icmp ult i32 [[V3]], 196112
923
- ; CHECK-NEXT: [[OR1:%.*]] = or i1 [[CMP1]], [[CMP2]]
924
- ; CHECK-NEXT: [[OR2:%.*]] = or i1 [[OR1]], [[CMP3]]
925
- ; CHECK-NEXT: [[OR3:%.*]] = or i1 [[OR2]], [[CMP4]]
926
- ; CHECK-NEXT: [[NOT:%.*]] = xor i1 [[OR3]], true
914
+ ; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i32 [[A:%.*]], 178206
915
+ ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[B:%.*]], -196608
916
+ ; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[TMP1]], -1506
917
+ ; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[B]], -917760
918
+ ; CHECK-NEXT: [[CMP3:%.*]] = icmp ult i32 [[TMP2]], -716213
919
+ ; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[B]], -1114112
920
+ ; CHECK-NEXT: [[CMP4:%.*]] = icmp ult i32 [[TMP3]], -196112
921
+ ; CHECK-NEXT: [[OR1_NOT2:%.*]] = and i1 [[CMP1]], [[CMP2]]
922
+ ; CHECK-NEXT: [[OR2_NOT1:%.*]] = and i1 [[OR1_NOT2]], [[CMP3]]
923
+ ; CHECK-NEXT: [[NOT:%.*]] = and i1 [[OR2_NOT1]], [[CMP4]]
927
924
; CHECK-NEXT: ret i1 [[NOT]]
928
925
;
929
926
%cmp1 = icmp eq i32 %a , 178206
@@ -943,11 +940,10 @@ define i1 @test_invert_demorgan_or3(i32 %a, i32 %b) {
943
940
define i1 @test_invert_demorgan_and (i32 %a , i32 %b , i1 %cond ) {
944
941
; CHECK-LABEL: @test_invert_demorgan_and(
945
942
; CHECK-NEXT: entry:
946
- ; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[A:%.*]], 0
947
943
; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i32 [[B:%.*]], 0
948
- ; CHECK-NEXT: [[AND :%.*]] = and i1 [[CMP1 ]], [[CMP2]]
949
- ; CHECK-NEXT: [[NOT :%.*]] = xor i1 [[COND:%.* ]], true
950
- ; CHECK-NEXT: [[MERGE:%.*]] = and i1 [[AND ]], [[NOT ]]
944
+ ; CHECK-NEXT: [[CMP3 :%.*]] = icmp eq i32 [[B1:%.* ]], 0
945
+ ; CHECK-NEXT: [[AND_NOT1 :%.*]] = or i1 [[CMP2 ]], [[CMP3]]
946
+ ; CHECK-NEXT: [[MERGE:%.*]] = or i1 [[AND_NOT1 ]], [[COND:%.* ]]
951
947
; CHECK-NEXT: br i1 [[MERGE]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
952
948
; CHECK: if.then:
953
949
; CHECK-NEXT: call void @f1()
@@ -973,9 +969,8 @@ if.else:
973
969
974
970
define i64 @test_invert_demorgan_and2 (i64 %x ) {
975
971
; CHECK-LABEL: @test_invert_demorgan_and2(
976
- ; CHECK-NEXT: [[ADD:%.*]] = add i64 [[X:%.*]], 9223372036854775807
977
- ; CHECK-NEXT: [[AND:%.*]] = and i64 [[ADD]], 9223372036854775807
978
- ; CHECK-NEXT: [[SUB:%.*]] = xor i64 [[AND]], -1
972
+ ; CHECK-NEXT: [[TMP1:%.*]] = sub i64 0, [[X:%.*]]
973
+ ; CHECK-NEXT: [[SUB:%.*]] = or i64 [[TMP1]], -9223372036854775808
979
974
; CHECK-NEXT: ret i64 [[SUB]]
980
975
;
981
976
%add = add i64 %x , 9223372036854775807
@@ -986,10 +981,9 @@ define i64 @test_invert_demorgan_and2(i64 %x) {
986
981
987
982
define i1 @test_invert_demorgan_and3 (i32 %a , i32 %b ) {
988
983
; CHECK-LABEL: @test_invert_demorgan_and3(
989
- ; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[A:%.*]], -1
990
- ; CHECK-NEXT: [[ADD:%.*]] = add i32 [[NOT]], [[B:%.*]]
984
+ ; CHECK-NEXT: [[ADD:%.*]] = sub i32 [[A:%.*]], [[B:%.*]]
991
985
; CHECK-NEXT: [[AND:%.*]] = and i32 [[ADD]], 4095
992
- ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0
986
+ ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 4095
993
987
; CHECK-NEXT: ret i1 [[CMP]]
994
988
;
995
989
%not = xor i32 %a , -1
0 commit comments