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[SLP]Fix PR70507: correctly handle bool logical ops in reductions.
If the very first reduction operation is not bool logical op, but some others are, still need to emit the boo logic op for all the extra reduction operations to avoid incorrect poison propagation.
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2 files changed

+17
-5
lines changed

2 files changed

+17
-5
lines changed

llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Lines changed: 16 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -13667,10 +13667,12 @@ class HorizontalReduction {
1366713667
static Value *createOp(IRBuilder<> &Builder, RecurKind RdxKind, Value *LHS,
1366813668
Value *RHS, const Twine &Name,
1366913669
const ReductionOpsListType &ReductionOps) {
13670-
bool UseSelect = ReductionOps.size() == 2 ||
13671-
// Logical or/and.
13672-
(ReductionOps.size() == 1 &&
13673-
isa<SelectInst>(ReductionOps.front().front()));
13670+
bool UseSelect =
13671+
ReductionOps.size() == 2 ||
13672+
// Logical or/and.
13673+
(ReductionOps.size() == 1 && any_of(ReductionOps.front(), [](Value *V) {
13674+
return isa<SelectInst>(V);
13675+
}));
1367413676
assert((!UseSelect || ReductionOps.size() != 2 ||
1367513677
isa<SelectInst>(ReductionOps[1][0])) &&
1367613678
"Expected cmp + select pairs for reduction");
@@ -14104,6 +14106,16 @@ class HorizontalReduction {
1410414106
// Update the final value in the reduction.
1410514107
Builder.SetCurrentDebugLocation(
1410614108
cast<Instruction>(ReductionOps.front().front())->getDebugLoc());
14109+
if ((isa<PoisonValue>(VectorizedTree) && !isa<PoisonValue>(Res)) ||
14110+
(isGuaranteedNotToBePoison(Res) &&
14111+
!isGuaranteedNotToBePoison(VectorizedTree))) {
14112+
auto It = ReducedValsToOps.find(Res);
14113+
if (It != ReducedValsToOps.end() &&
14114+
any_of(It->getSecond(),
14115+
[](Instruction *I) { return isBoolLogicOp(I); }))
14116+
std::swap(VectorizedTree, Res);
14117+
}
14118+
1410714119
return createOp(Builder, RdxKind, VectorizedTree, Res, "op.rdx",
1410814120
ReductionOps);
1410914121
}

llvm/test/Transforms/SLPVectorizer/X86/reduction-bool-logic-op-inside.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@ define i1 @test(i32 %x) {
55
; CHECK-LABEL: define i1 @test(
66
; CHECK-SAME: i32 [[X:%.*]]) {
77
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X]], 1
8-
; CHECK-NEXT: [[OP_RDX:%.*]] = or i1 poison, [[CMP]]
8+
; CHECK-NEXT: [[OP_RDX:%.*]] = select i1 [[CMP]], i1 true, i1 poison
99
; CHECK-NEXT: ret i1 [[OP_RDX]]
1010
;
1111
%cmp = icmp sgt i32 %x, 1

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