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[MLIR][VCIX] Support VCIX intrinsics in LLVMIR dialect (#75875)
The changeset extends LLVMIR intrinsics with VCIX intrinsics. The VCIX intrinsics allow MLIR users to interact with RISC-V co-processors that are compatible with `XSfvcp` extension Source: https://www.sifive.com/document-file/sifive-vector-coprocessor-interface-vcix-software
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‎mlir/include/mlir/Dialect/LLVMIR/CMakeLists.txt

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@@ -71,3 +71,11 @@ mlir_tablegen(ROCDLConversions.inc -gen-llvmir-conversions)
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mlir_tablegen(ROCDLOpsAttributes.h.inc -gen-attrdef-decls -attrdefs-dialect=rocdl)
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mlir_tablegen(ROCDLOpsAttributes.cpp.inc -gen-attrdef-defs -attrdefs-dialect=rocdl)
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add_public_tablegen_target(MLIRROCDLConversionsIncGen)
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add_mlir_dialect(VCIXOps vcix)
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add_mlir_doc(VCIXOps VCIXDialect Dialects/ -gen-dialect-doc -dialect=vcix)
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set(LLVM_TARGET_DEFINITIONS VCIXOps.td)
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mlir_tablegen(VCIXConversions.inc -gen-llvmir-conversions)
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mlir_tablegen(VCIXOpsAttributes.h.inc -gen-attrdef-decls -attrdefs-dialect=vcix)
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mlir_tablegen(VCIXOpsAttributes.cpp.inc -gen-attrdef-defs -attrdefs-dialect=vcix)
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add_public_tablegen_target(MLIRVCIXConversionsIncGen)

‎mlir/include/mlir/Dialect/LLVMIR/VCIXDialect.h

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//===- VCIXDialect.h - MLIR VCIX IR dialect -------------------*- C++ ---*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// The file defines the basic operations for the VCIX dialect.
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//
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// The SiFive Vector Coprocessor Interface (VCIX) provides a flexible mechanism
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// to extend application processors with custom coprocessors and
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// variable-latency arithmetic units. The interface offers throughput comparable
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// to that of standard RISC-V vector instructions. To accelerate performance,
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// system designers may use VCIX as a low-latency, high-throughput interface to
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// a coprocessor
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//
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// https://www.sifive.com/document-file/sifive-vector-coprocessor-interface-vcix-software
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//
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//===----------------------------------------------------------------------===//
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#ifndef MLIR_DIALECT_LLVMIR_VCIXDIALECT_H_
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#define MLIR_DIALECT_LLVMIR_VCIXDIALECT_H_
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#include "mlir/Bytecode/BytecodeOpInterface.h"
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#include "mlir/Dialect/LLVMIR/LLVMDialect.h"
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#include "mlir/IR/Dialect.h"
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#include "mlir/IR/OpDefinition.h"
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#include "mlir/Interfaces/SideEffectInterfaces.h"
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///// Ops /////
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#define GET_ATTRDEF_CLASSES
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#include "mlir/Dialect/LLVMIR/VCIXOpsAttributes.h.inc"
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#define GET_OP_CLASSES
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#include "mlir/Dialect/LLVMIR/VCIXOps.h.inc"
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#include "mlir/Dialect/LLVMIR/VCIXOpsDialect.h.inc"
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#endif /* MLIR_DIALECT_LLVMIR_VCIXDIALECT_H_ */

‎mlir/include/mlir/Dialect/LLVMIR/VCIXOps.td

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//===-- VCIX.td - VCIX dialect operation definitions *- tablegen -*--------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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// The file defines the basic operations for the VCIX dialect.
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//
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// The SiFive Vector Coprocessor Interface (VCIX) provides a flexible mechanism
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// to extend application processors with custom coprocessors and
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// variable-latency arithmetic units. The interface offers throughput comparable
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// to that of standard RISC-V vector instructions. To accelerate performance,
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// system designers may use VCIX as a low-latency, high-throughput interface to
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// a coprocessor
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//
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// https://www.sifive.com/document-file/sifive-vector-coprocessor-interface-vcix-software
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//
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//===----------------------------------------------------------------------===//
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#ifndef VCIXIR_OPS
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include "mlir/IR/OpBase.td"
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include "mlir/Dialect/LLVMIR/LLVMOpBase.td"
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//===----------------------------------------------------------------------===//
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// VCIX dialect definition.
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//===----------------------------------------------------------------------===//
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def VCIX_Dialect : Dialect {
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let name = "vcix";
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let cppNamespace = "::mlir::vcix";
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let dependentDialects = ["LLVM::LLVMDialect"];
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let description = [{
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The SiFive Vector Coprocessor Interface (VCIX) provides a flexible mechanism
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to extend application processors with custom coprocessors and
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variable-latency arithmetic units. The interface offers throughput comparable
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to that of standard RISC-V vector instructions. To accelerate performance,
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system designers may use VCIX as a low-latency, high-throughput interface to
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a coprocessor
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https://www.sifive.com/document-file/sifive-vector-coprocessor-interface-vcix-software
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}];
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}
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// Special version for intrinsic version where int attr is zext to i32 or i64
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// depending on xlen of the target.
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def VCIX_VectorOrScalar
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: AnyTypeOf<[LLVM_AnyVector, I<64>, I<32>, F<16>, F<32>, F<64>]>;
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def VCIX_OpcodeAttr : AnyAttrOf<[I32Attr, I64Attr]>;
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def VCIX_Register : AnyTypeOf<[I32, I64]>;
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def VCIX_ImmAttr : AnyAttrOf<[I32Attr, I64Attr]>;
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def VCIX_VL : AnyTypeOf<[I<64>, I<32>]>;
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class VCIX_Op<string mnemonic, list<Trait> traits = []>
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: LLVM_OpBase<VCIX_Dialect, mnemonic, traits> {
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}
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def VCIX_BinaryImmOp : VCIX_Op<"v.iv">,
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Results<(outs LLVM_AnyVector: $res)>,
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Arguments<(ins VCIX_OpcodeAttr: $opcode,
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LLVM_AnyVector: $vs2,
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VCIX_ImmAttr: $imm,
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Optional<VCIX_VL>: $vl)> {
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let summary = "Binary VCIX operation with an immediate second operand";
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let description = [{
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Binary VCIX operation with an immediate second operand.
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Correponds to:
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|Mnemonic|funct6|vm|rs2|rs1|funct3|rd|Destination|Sources|
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|--|--|--|--|--|--|--|--|--|
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|sf.vc.v.iv|0010--|0|vs2|simm|011|vd|vector vd| simm[4:0] vector vs2|
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}];
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string llvmBuilder = [{
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llvm::Type *xlen =getXlenType($opcode, moduleTranslation);
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llvm::Value *opcodeConst = mlir::LLVM::detail::getLLVMConstant(
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xlen, $opcode, $_location, moduleTranslation);
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llvm::Value *immConst = mlir::LLVM::detail::getLLVMConstant(
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xlen, $imm, $_location, moduleTranslation);
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VectorType vt = op.getResult().getType().cast<VectorType>();
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llvm::Value *vl =
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createVL(builder, $vl, vt, xlen, $_location, moduleTranslation);
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$res = createIntrinsicCall(
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builder, llvm::Intrinsic::riscv_sf_vc_v_iv_se,
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{opcodeConst, $vs2, immConst, vl},
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{$_resultType, xlen, $vs2->getType(), xlen, xlen});
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}];
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}
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def VCIX_BinaryOp : VCIX_Op<"v.sv">,
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Results<(outs LLVM_AnyVector: $res)>,
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Arguments<(ins VCIX_OpcodeAttr: $opcode,
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LLVM_AnyVector: $vs2,
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VCIX_VectorOrScalar: $op,
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Optional<VCIX_VL>: $vl)> {
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let summary = "Binary VCIX operation";
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let description = [{
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Binary VCIX operation with an integer scalar, or floating pointer scalar or
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vector second operand.
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Correponds to:
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|Mnemonic|funct6|vm|rs2|rs1|funct3|rd|Destination| Sources|
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|--|--|--|--|--|--|--|--|--|--|
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|sf.vc.v.vv|0010--|0|vs2|vs1|000|vd|vector vd|vector vs1, vector vs|
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|sf.vc.v.xv|0010--|0|vs2|xs1|100|vd|vector vd|scalar xs1, vector vs2|
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|sf.vc.v.fv|0010--|0|vs2|fs1|101|vd|vector vd|scalar fs1, vector vs2|
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}];
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string llvmBuilder = [{
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llvm::Type *xlen = getXlenType($opcode, moduleTranslation);
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llvm::Value *opcodeConst = mlir::LLVM::detail::getLLVMConstant(
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xlen, $opcode, $_location, moduleTranslation);
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llvm::Intrinsic::ID id;
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llvm::Type *opType = $op->getType();
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if (opType->isVectorTy()) {
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id = llvm::Intrinsic::riscv_sf_vc_v_vv_se;
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} else if (opType->isIntegerTy()) {
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id = llvm::Intrinsic::riscv_sf_vc_v_xv_se;
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} else {
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id = llvm::Intrinsic::riscv_sf_vc_v_fv_se;
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}
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VectorType vt = op.getResult().getType().cast<VectorType>();
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llvm::Value *vl =
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createVL(builder, $vl, vt, xlen, $_location, moduleTranslation);
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$res = createIntrinsicCall(
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builder, id, {opcodeConst, $vs2, $op, vl},
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{$_resultType, xlen, $vs2->getType(), $op->getType(), xlen});
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}];
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}
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#endif // VCIXIR_OPS

‎mlir/include/mlir/Target/LLVMIR/Dialect/All.h

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#include "mlir/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.h"
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#include "mlir/Target/LLVMIR/Dialect/ROCDL/ROCDLToLLVMIRTranslation.h"
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#include "mlir/Target/LLVMIR/Dialect/SPIRV/SPIRVToLLVMIRTranslation.h"
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#include "mlir/Target/LLVMIR/Dialect/VCIX/VCIXToLLVMIRTranslation.h"
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#include "mlir/Target/LLVMIR/Dialect/X86Vector/X86VectorToLLVMIRTranslation.h"
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namespace mlir {
@@ -48,6 +49,7 @@ static inline void registerAllToLLVMIRTranslations(DialectRegistry &registry) {
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registerOpenMPDialectTranslation(registry);
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registerROCDLDialectTranslation(registry);
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registerSPIRVDialectTranslation(registry);
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registerVCIXDialectTranslation(registry);
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registerX86VectorDialectTranslation(registry);
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// Extension required for translating GPU offloading Ops.

‎mlir/include/mlir/Target/LLVMIR/Dialect/VCIX/VCIXToLLVMIRTranslation.h

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//===- VCIXToLLVMIRTranslation.h - VCIX to LLVM IR ------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This provides registration calls for VCIX dialect to LLVM IR translation.
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//
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//===----------------------------------------------------------------------===//
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#ifndef MLIR_TARGET_LLVMIR_DIALECT_VCIX_VCIXTOLLVMIRTRANSLATION_H
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#define MLIR_TARGET_LLVMIR_DIALECT_VCIX_VCIXTOLLVMIRTRANSLATION_H
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namespace mlir {
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class DialectRegistry;
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class MLIRContext;
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/// Register the VCIX dialect and the translation from it to the LLVM IR in the
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/// given registry.
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void registerVCIXDialectTranslation(DialectRegistry &registry);
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/// Register the VCIX dialect and the translation from it in the registry
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/// associated with the given context.
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void registerVCIXDialectTranslation(MLIRContext &context);
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} // namespace mlir
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#endif // MLIR_TARGET_LLVMIR_DIALECT_VCIX_VCIXTOLLVMIRTRANSLATION_H

‎mlir/lib/Dialect/LLVMIR/CMakeLists.txt

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@@ -85,3 +85,25 @@ add_mlir_dialect_library(MLIRROCDLDialect
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MLIRLLVMDialect
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MLIRSideEffectInterfaces
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)
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add_mlir_dialect_library(MLIRVCIXDialect
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IR/VCIXDialect.cpp
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ADDITIONAL_HEADER_DIRS
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${MLIR_MAIN_INCLUDE_DIR}/mlir/Dialect/LLVMIR
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DEPENDS
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MLIRGPUCompilationAttrInterfacesIncGen
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MLIRVCIXOpsIncGen
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MLIRVCIXConversionsIncGen
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intrinsics_gen
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LINK_COMPONENTS
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AsmParser
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Core
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LINK_LIBS PUBLIC
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MLIRIR
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MLIRLLVMDialect
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MLIRSideEffectInterfaces
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)

‎mlir/lib/Dialect/LLVMIR/IR/VCIXDialect.cpp

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//===- VCIXDialect.cpp - MLIR VCIX ops implementation ---------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the VCIX dialect and its operations.
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Dialect/LLVMIR/VCIXDialect.h"
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#include "mlir/Dialect/GPU/IR/CompilationInterfaces.h"
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#include "mlir/Dialect/LLVMIR/LLVMDialect.h"
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#include "mlir/IR/Builders.h"
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#include "mlir/IR/BuiltinTypes.h"
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#include "mlir/IR/DialectImplementation.h"
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#include "mlir/IR/MLIRContext.h"
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#include "mlir/IR/Operation.h"
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#include "llvm/ADT/TypeSwitch.h"
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#include "llvm/AsmParser/Parser.h"
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#include "llvm/IR/Attributes.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/Type.h"
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#include "llvm/Support/SourceMgr.h"
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using namespace mlir;
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using namespace vcix;
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#include "mlir/Dialect/LLVMIR/VCIXOpsDialect.cpp.inc"
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//===----------------------------------------------------------------------===//
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// VCIXDialect initialization, type parsing, and registration.
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//===----------------------------------------------------------------------===//
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void VCIXDialect::initialize() {
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addOperations<
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#define GET_OP_LIST
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#include "mlir/Dialect/LLVMIR/VCIXOps.cpp.inc"
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>();
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addAttributes<
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#define GET_ATTRDEF_LIST
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#include "mlir/Dialect/LLVMIR/VCIXOpsAttributes.cpp.inc"
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>();
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}
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#define GET_OP_CLASSES
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#include "mlir/Dialect/LLVMIR/VCIXOps.cpp.inc"
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#define GET_ATTRDEF_CLASSES
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#include "mlir/Dialect/LLVMIR/VCIXOpsAttributes.cpp.inc"

‎mlir/lib/Target/LLVMIR/CMakeLists.txt

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@@ -59,6 +59,7 @@ add_mlir_translation_library(MLIRToLLVMIRTranslationRegistration
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MLIROpenMPToLLVMIRTranslation
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MLIRROCDLToLLVMIRTranslation
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MLIRSPIRVToLLVMIRTranslation
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MLIRVCIXToLLVMIRTranslation
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)
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add_mlir_translation_library(MLIRTargetLLVMIRImport

‎mlir/lib/Target/LLVMIR/Dialect/CMakeLists.txt

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@@ -10,4 +10,5 @@ add_subdirectory(OpenACC)
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add_subdirectory(OpenMP)
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add_subdirectory(ROCDL)
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add_subdirectory(SPIRV)
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add_subdirectory(VCIX)
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add_subdirectory(X86Vector)

‎mlir/lib/Target/LLVMIR/Dialect/VCIX/CMakeLists.txt

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add_mlir_translation_library(MLIRVCIXToLLVMIRTranslation
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VCIXToLLVMIRTranslation.cpp
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DEPENDS
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MLIRVCIXConversionsIncGen
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LINK_COMPONENTS
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Core
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LINK_LIBS PUBLIC
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MLIRIR
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MLIRLLVMDialect
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MLIRVCIXDialect
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MLIRSupport
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MLIRTargetLLVMIRExport
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)

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