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[PowerPC] Update data layout aligment of i128 to 16 (#118004)
Fix 64-bit PowerPC part of #102783.
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9 files changed

+62
-23
lines changed

9 files changed

+62
-23
lines changed

‎clang/lib/Basic/Targets/OSTargets.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -473,7 +473,7 @@ class LLVM_LIBRARY_VISIBILITY PS3PPUTargetInfo : public OSTargetInfo<Target> {
473473
this->IntMaxType = TargetInfo::SignedLongLong;
474474
this->Int64Type = TargetInfo::SignedLongLong;
475475
this->SizeType = TargetInfo::UnsignedInt;
476-
this->resetDataLayout("E-m:e-p:32:32-Fi64-i64:64-n32:64");
476+
this->resetDataLayout("E-m:e-p:32:32-Fi64-i64:64-i128:128-n32:64");
477477
}
478478
};
479479

‎clang/lib/Basic/Targets/PPC.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -463,12 +463,12 @@ class LLVM_LIBRARY_VISIBILITY PPC64TargetInfo : public PPCTargetInfo {
463463

464464
if (Triple.isOSAIX()) {
465465
// TODO: Set appropriate ABI for AIX platform.
466-
DataLayout = "E-m:a-Fi64-i64:64-n32:64";
466+
DataLayout = "E-m:a-Fi64-i64:64-i128:128-n32:64";
467467
LongDoubleWidth = 64;
468468
LongDoubleAlign = DoubleAlign = 32;
469469
LongDoubleFormat = &llvm::APFloat::IEEEdouble();
470470
} else if ((Triple.getArch() == llvm::Triple::ppc64le)) {
471-
DataLayout = "e-m:e-Fn32-i64:64-n32:64";
471+
DataLayout = "e-m:e-Fn32-i64:64-i128:128-n32:64";
472472
ABI = "elfv2";
473473
} else {
474474
DataLayout = "E-m:e";
@@ -479,7 +479,7 @@ class LLVM_LIBRARY_VISIBILITY PPC64TargetInfo : public PPCTargetInfo {
479479
ABI = "elfv1";
480480
DataLayout += "-Fi64";
481481
}
482-
DataLayout += "-i64:64-n32:64";
482+
DataLayout += "-i64:64-i128:128-n32:64";
483483
}
484484

485485
if (Triple.isOSFreeBSD() || Triple.isOSOpenBSD() || Triple.isMusl()) {

‎clang/test/CodeGen/target-data.c

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -88,7 +88,7 @@
8888

8989
// RUN: %clang_cc1 -triple powerpc64-lv2 -o - -emit-llvm %s | \
9090
// RUN: FileCheck %s -check-prefix=PS3
91-
// PS3: target datalayout = "E-m:e-p:32:32-Fi64-i64:64-n32:64"
91+
// PS3: target datalayout = "E-m:e-p:32:32-Fi64-i64:64-i128:128-n32:64"
9292

9393
// RUN: %clang_cc1 -triple i686-nacl -o - -emit-llvm %s | \
9494
// RUN: FileCheck %s -check-prefix=I686-NACL
@@ -128,35 +128,35 @@
128128

129129
// RUN: %clang_cc1 -triple powerpc64-freebsd -o - -emit-llvm %s | \
130130
// RUN: FileCheck %s -check-prefix=PPC64-FREEBSD
131-
// PPC64-FREEBSD: target datalayout = "E-m:e-Fn32-i64:64-n32:64"
131+
// PPC64-FREEBSD: target datalayout = "E-m:e-Fn32-i64:64-i128:128-n32:64"
132132

133133
// RUN: %clang_cc1 -triple powerpc64le-freebsd -o - -emit-llvm %s | \
134134
// RUN: FileCheck %s -check-prefix=PPC64LE-FREEBSD
135-
// PPC64LE-FREEBSD: target datalayout = "e-m:e-Fn32-i64:64-n32:64"
135+
// PPC64LE-FREEBSD: target datalayout = "e-m:e-Fn32-i64:64-i128:128-n32:64"
136136

137137
// RUN: %clang_cc1 -triple powerpc64-linux -o - -emit-llvm %s | \
138138
// RUN: FileCheck %s -check-prefix=PPC64-LINUX
139-
// PPC64-LINUX: target datalayout = "E-m:e-Fi64-i64:64-n32:64-S128-v256:256:256-v512:512:512"
139+
// PPC64-LINUX: target datalayout = "E-m:e-Fi64-i64:64-i128:128-n32:64-S128-v256:256:256-v512:512:512"
140140

141141
// RUN: %clang_cc1 -triple powerpc64-linux -o - -emit-llvm -target-cpu future %s | \
142142
// RUN: FileCheck %s -check-prefix=PPC64-FUTURE
143-
// PPC64-FUTURE: target datalayout = "E-m:e-Fi64-i64:64-n32:64-S128-v256:256:256-v512:512:512"
143+
// PPC64-FUTURE: target datalayout = "E-m:e-Fi64-i64:64-i128:128-n32:64-S128-v256:256:256-v512:512:512"
144144

145145
// RUN: %clang_cc1 -triple powerpc64-linux -o - -emit-llvm -target-cpu pwr10 %s | \
146146
// RUN: FileCheck %s -check-prefix=PPC64-P10
147-
// PPC64-P10: target datalayout = "E-m:e-Fi64-i64:64-n32:64-S128-v256:256:256-v512:512:512"
147+
// PPC64-P10: target datalayout = "E-m:e-Fi64-i64:64-i128:128-n32:64-S128-v256:256:256-v512:512:512"
148148

149149
// RUN: %clang_cc1 -triple powerpc64le-linux -o - -emit-llvm %s | \
150150
// RUN: FileCheck %s -check-prefix=PPC64LE-LINUX
151-
// PPC64LE-LINUX: target datalayout = "e-m:e-Fn32-i64:64-n32:64-S128-v256:256:256-v512:512:512"
151+
// PPC64LE-LINUX: target datalayout = "e-m:e-Fn32-i64:64-i128:128-n32:64-S128-v256:256:256-v512:512:512"
152152

153153
// RUN: %clang_cc1 -triple powerpc64le-linux -o - -emit-llvm -target-cpu future %s | \
154154
// RUN: FileCheck %s -check-prefix=PPC64LE-FUTURE
155-
// PPC64LE-FUTURE: target datalayout = "e-m:e-Fn32-i64:64-n32:64-S128-v256:256:256-v512:512:512"
155+
// PPC64LE-FUTURE: target datalayout = "e-m:e-Fn32-i64:64-i128:128-n32:64-S128-v256:256:256-v512:512:512"
156156

157157
// RUN: %clang_cc1 -triple powerpc64le-linux -o - -emit-llvm -target-cpu pwr10 %s | \
158158
// RUN: FileCheck %s -check-prefix=PPC64LE-P10
159-
// PPC64LE-P10: target datalayout = "e-m:e-Fn32-i64:64-n32:64-S128-v256:256:256-v512:512:512"
159+
// PPC64LE-P10: target datalayout = "e-m:e-Fn32-i64:64-i128:128-n32:64-S128-v256:256:256-v512:512:512"
160160

161161
// RUN: %clang_cc1 -triple nvptx-unknown -o - -emit-llvm %s | \
162162
// RUN: FileCheck %s -check-prefix=NVPTX

‎llvm/lib/IR/AutoUpgrade.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5559,7 +5559,7 @@ std::string llvm::UpgradeDataLayoutString(StringRef DL, StringRef TT) {
55595559
return Res;
55605560
}
55615561

5562-
if (T.isSPARC() || (T.isMIPS64() && !DL.contains("m:m"))) {
5562+
if (T.isSPARC() || (T.isMIPS64() && !DL.contains("m:m")) || T.isPPC64()) {
55635563
// Mips64 with o32 ABI did not add "-i128:128".
55645564
// Add "-i128:128"
55655565
std::string I64 = "-i64:64";

‎llvm/lib/Target/PowerPC/PPCTargetMachine.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -185,7 +185,7 @@ static std::string getDataLayoutString(const Triple &T) {
185185

186186
// PPC64 has 32 and 64 bit registers, PPC32 has only 32 bit ones.
187187
if (is64Bit)
188-
Ret += "-n32:64";
188+
Ret += "-i128:128-n32:64";
189189
else
190190
Ret += "-n32";
191191

‎llvm/test/Analysis/CostModel/PowerPC/load-to-trunc.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@
77
; Check that cost is 1 for unusual load to register sized load.
88
define i32 @loadUnusualIntegerWithTrunc(ptr %ptr) {
99
; CHECK-LABEL: 'loadUnusualIntegerWithTrunc'
10-
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %out = load i128, ptr %ptr, align 8
10+
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %out = load i128, ptr %ptr, align 16
1111
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %trunc = trunc i128 %out to i32
1212
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 %trunc
1313
;
@@ -18,7 +18,7 @@ define i32 @loadUnusualIntegerWithTrunc(ptr %ptr) {
1818

1919
define i128 @loadUnusualInteger(ptr %ptr) {
2020
; CHECK-LABEL: 'loadUnusualInteger'
21-
; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %out = load i128, ptr %ptr, align 8
21+
; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %out = load i128, ptr %ptr, align 16
2222
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i128 %out
2323
;
2424
%out = load i128, ptr %ptr

‎llvm/test/CodeGen/PowerPC/data-align.ll

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,24 @@
1+
; RUN: llc < %s -mtriple=powerpc-unknown-linux | FileCheck %s
2+
; RUN: llc < %s -mtriple=powerpc64-unknown-linux | FileCheck %s
3+
; RUN: llc < %s -mtriple=powerpc64le-unknown-linux | FileCheck %s
4+
5+
; CHECK: .set .Li8,
6+
; CHECK-NEXT: .size .Li8, 1
7+
@i8 = private constant i8 42
8+
9+
; CHECK: .set .Li16,
10+
; CHECK-NEXT: .size .Li16, 2
11+
@i16 = private constant i16 42
12+
13+
; CHECK: .set .Li32,
14+
; CHECK-NEXT: .size .Li32, 4
15+
@i32 = private constant i32 42
16+
17+
; CHECK: .set .Li64,
18+
; CHECK-NEXT: .size .Li64, 8
19+
@i64 = private constant i64 42
20+
21+
; CHECK: .set .Li128,
22+
; CHECK-NEXT: .size .Li128, 16
23+
@i128 = private constant i128 42
24+

‎llvm/test/Transforms/AtomicExpand/PowerPC/cmpxchg.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -30,11 +30,11 @@ define i1 @test_cmpxchg_seq_cst(ptr %addr, i128 %desire, i128 %new) {
3030
;
3131
; PWR7-LABEL: @test_cmpxchg_seq_cst(
3232
; PWR7-NEXT: entry:
33-
; PWR7-NEXT: [[TMP0:%.*]] = alloca i128, align 8
33+
; PWR7-NEXT: [[TMP0:%.*]] = alloca i128, align 16
3434
; PWR7-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr [[TMP0]])
35-
; PWR7-NEXT: store i128 [[DESIRE:%.*]], ptr [[TMP0]], align 8
35+
; PWR7-NEXT: store i128 [[DESIRE:%.*]], ptr [[TMP0]], align 16
3636
; PWR7-NEXT: [[TMP1:%.*]] = call zeroext i1 @__atomic_compare_exchange_16(ptr [[ADDR:%.*]], ptr [[TMP0]], i128 [[NEW:%.*]], i32 5, i32 5)
37-
; PWR7-NEXT: [[TMP2:%.*]] = load i128, ptr [[TMP0]], align 8
37+
; PWR7-NEXT: [[TMP2:%.*]] = load i128, ptr [[TMP0]], align 16
3838
; PWR7-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[TMP0]])
3939
; PWR7-NEXT: [[TMP3:%.*]] = insertvalue { i128, i1 } poison, i128 [[TMP2]], 0
4040
; PWR7-NEXT: [[TMP4:%.*]] = insertvalue { i128, i1 } [[TMP3]], i1 [[TMP1]], 1

‎llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp

Lines changed: 18 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -92,6 +92,16 @@ TEST(DataLayoutUpgradeTest, ValidDataLayoutUpgrade) {
9292
"e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64", "mips64el"),
9393
"e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64");
9494

95+
// Check that PowerPC64 targets add -i128:128.
96+
EXPECT_EQ(UpgradeDataLayoutString("e-m:e-i64:64-n32:64", "powerpc64le-linux"),
97+
"e-m:e-i64:64-i128:128-n32:64");
98+
EXPECT_EQ(
99+
UpgradeDataLayoutString("E-m:e-Fn32-i64:64-n32:64", "powerpc64-linux"),
100+
"E-m:e-Fn32-i64:64-i128:128-n32:64");
101+
EXPECT_EQ(
102+
UpgradeDataLayoutString("E-m:a-Fi64-i64:64-n32:64", "powerpc64-ibm-aix"),
103+
"E-m:a-Fi64-i64:64-i128:128-n32:64");
104+
95105
// Check that SPIR && SPIRV targets add -G1 if it's not present.
96106
EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32", "spir"), "e-p:32:32-G1");
97107
EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32", "spir64"), "e-p:32:32-G1");
@@ -108,8 +118,6 @@ TEST(DataLayoutUpgradeTest, NoDataLayoutUpgrade) {
108118
"-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
109119
"-n8:16:32:64-S128",
110120
"x86_64-unknown-linux-gnu");
111-
std::string DL2 = UpgradeDataLayoutString("e-m:e-i64:64-n32:64",
112-
"powerpc64le-unknown-linux-gnu");
113121
std::string DL3 = UpgradeDataLayoutString(
114122
"e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:64-S128-Fn32",
115123
"aarch64--");
@@ -118,7 +126,6 @@ TEST(DataLayoutUpgradeTest, NoDataLayoutUpgrade) {
118126
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-i128:128:128"
119127
"-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64"
120128
"-f80:128:128-n8:16:32:64-S128");
121-
EXPECT_EQ(DL2, "e-m:e-i64:64-n32:64");
122129
EXPECT_EQ(DL3, "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:"
123130
"64-S128-Fn32");
124131

@@ -153,6 +160,14 @@ TEST(DataLayoutUpgradeTest, NoDataLayoutUpgrade) {
153160
EXPECT_EQ(UpgradeDataLayoutString("G2", "spir64"), "G2");
154161
EXPECT_EQ(UpgradeDataLayoutString("G2", "spirv32"), "G2");
155162
EXPECT_EQ(UpgradeDataLayoutString("G2", "spirv64"), "G2");
163+
164+
// Check that PowerPC32 targets don't add -i128:128.
165+
EXPECT_EQ(UpgradeDataLayoutString("e-m:e-i64:64-n32", "powerpcle-linux"),
166+
"e-m:e-i64:64-n32");
167+
EXPECT_EQ(UpgradeDataLayoutString("E-m:e-Fn32-i64:64-n32", "powerpc-linux"),
168+
"E-m:e-Fn32-i64:64-n32");
169+
EXPECT_EQ(UpgradeDataLayoutString("E-m:a-Fi64-i64:64-n32", "powerpc-aix"),
170+
"E-m:a-Fi64-i64:64-n32");
156171
}
157172

158173
TEST(DataLayoutUpgradeTest, EmptyDataLayout) {

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