[InstCombine] Add pre-commit tests

Author: AmrDeveloper

llvm/test/Transforms/InstCombine/disjoint_or.ll

@@ -0,0 +1,34 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt < %s -passes=instcombine -S | FileCheck %s
+
+define i32 @fold_xor_with_disjoint_or(i32 %a, i1 %c) {
+; CHECK-LABEL: define i32 @fold_xor_with_disjoint_or(
+; CHECK-SAME: i32 [[A:%.*]], i1 [[C:%.*]]) {
+; CHECK-NEXT:    [[S:%.*]] = select i1 [[C]], i32 0, i32 4
+; CHECK-NEXT:    [[SHL:%.*]] = shl i32 [[A]], 4
+; CHECK-NEXT:    [[OR:%.*]] = or disjoint i32 [[S]], [[SHL]]
+; CHECK-NEXT:    [[XOR:%.*]] = xor i32 [[OR]], 4
+; CHECK-NEXT:    ret i32 [[XOR]]
+;
+  %s = select i1 %c, i32 0, i32 4
+  %shl = shl i32 %a, 4
+  %or = or disjoint i32 %s, %shl
+  %xor = xor i32 %or, 4
+  ret i32 %xor
+}
+
+define <2 x i32> @fold_xor_with_disjoint_or_vec(<2 x i32> %a, i1 %c) {
+; CHECK-LABEL: define <2 x i32> @fold_xor_with_disjoint_or_vec(
+; CHECK-SAME: <2 x i32> [[A:%.*]], i1 [[C:%.*]]) {
+; CHECK-NEXT:    [[S:%.*]] = select i1 [[C]], <2 x i32> zeroinitializer, <2 x i32> <i32 4, i32 4>
+; CHECK-NEXT:    [[SHL:%.*]] = shl <2 x i32> [[A]], <i32 4, i32 4>
+; CHECK-NEXT:    [[OR:%.*]] = or disjoint <2 x i32> [[S]], [[SHL]]
+; CHECK-NEXT:    [[XOR:%.*]] = xor <2 x i32> [[OR]], <i32 4, i32 4>
+; CHECK-NEXT:    ret <2 x i32> [[XOR]]
+;
+  %s = select i1 %c, <2 x i32> <i32 0, i32 0>, <2 x i32> <i32 4, i32 4>
+  %shl = shl <2 x i32> %a, <i32 4, i32 4>
+  %or = or disjoint <2 x i32> %s, %shl
+  %xor = xor <2 x i32> %or, <i32 4, i32 4>
+  ret <2 x i32> %xor
+}