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[AArch64][GlobalISel] Disable fixed-point iteration in all Combiners
Disable fixed-point iteration in all AArch64 Combiners after #102163. See inline comments for justification of test changes. Pull Request: #102167
1 parent 81f8abd commit abdc2b1

10 files changed

+44
-19
lines changed

‎llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -566,6 +566,11 @@ bool AArch64PostLegalizerCombiner::runOnMachineFunction(MachineFunction &MF) {
566566
CombinerInfo CInfo(/*AllowIllegalOps*/ true, /*ShouldLegalizeIllegal*/ false,
567567
/*LegalizerInfo*/ nullptr, EnableOpt, F.hasOptSize(),
568568
F.hasMinSize());
569+
// Disable fixed-point iteration to reduce compile-time
570+
CInfo.MaxIterations = 1;
571+
CInfo.ObserverLvl = CombinerInfo::ObserverLevel::SinglePass;
572+
// Legalizer performs DCE, so a full DCE pass is unnecessary.
573+
CInfo.EnableFullDCE = false;
569574
AArch64PostLegalizerCombinerImpl Impl(MF, CInfo, TPC, *KB, CSEInfo,
570575
RuleConfig, ST, MDT, LI);
571576
bool Changed = Impl.combineMachineInstrs();

‎llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1296,6 +1296,11 @@ bool AArch64PostLegalizerLowering::runOnMachineFunction(MachineFunction &MF) {
12961296
CombinerInfo CInfo(/*AllowIllegalOps*/ true, /*ShouldLegalizeIllegal*/ false,
12971297
/*LegalizerInfo*/ nullptr, /*OptEnabled=*/true,
12981298
F.hasOptSize(), F.hasMinSize());
1299+
// Disable fixed-point iteration to reduce compile-time
1300+
CInfo.MaxIterations = 1;
1301+
CInfo.ObserverLvl = CombinerInfo::ObserverLevel::SinglePass;
1302+
// PostLegalizerCombiner performs DCE, so a full DCE pass is unnecessary.
1303+
CInfo.EnableFullDCE = false;
12991304
AArch64PostLegalizerLoweringImpl Impl(MF, CInfo, TPC, /*CSEInfo*/ nullptr,
13001305
RuleConfig, ST);
13011306
return Impl.combineMachineInstrs();

‎llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -861,6 +861,12 @@ bool AArch64PreLegalizerCombiner::runOnMachineFunction(MachineFunction &MF) {
861861
CombinerInfo CInfo(/*AllowIllegalOps*/ true, /*ShouldLegalizeIllegal*/ false,
862862
/*LegalizerInfo*/ nullptr, EnableOpt, F.hasOptSize(),
863863
F.hasMinSize());
864+
// Disable fixed-point iteration to reduce compile-time
865+
CInfo.MaxIterations = 1;
866+
CInfo.ObserverLvl = CombinerInfo::ObserverLevel::SinglePass;
867+
// This is the first Combiner, so the input IR might contain dead
868+
// instructions.
869+
CInfo.EnableFullDCE = true;
864870
AArch64PreLegalizerCombinerImpl Impl(MF, CInfo, &TPC, *KB, CSEInfo,
865871
RuleConfig, ST, MDT, LI);
866872
return Impl.combineMachineInstrs();

‎llvm/test/CodeGen/AArch64/GlobalISel/combine-logic-of-compare.mir

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -203,8 +203,8 @@ body: |
203203
; CHECK-LABEL: name: test_icmp_and_icmp_9_2
204204
; CHECK: liveins: $x0, $x1
205205
; CHECK-NEXT: {{ $}}
206-
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
207-
; CHECK-NEXT: $x0 = COPY [[C]](s64)
206+
; CHECK-NEXT: %zext:_(s64) = G_CONSTANT i64 0
207+
; CHECK-NEXT: $x0 = COPY %zext(s64)
208208
%0:_(s64) = COPY $x0
209209
%nine:_(s64) = G_CONSTANT i64 9
210210
%two:_(s64) = G_CONSTANT i64 2

‎llvm/test/CodeGen/AArch64/GlobalISel/combine-overflow.mir

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -76,9 +76,9 @@ body: |
7676
; CHECK: liveins: $w0, $w1
7777
; CHECK-NEXT: {{ $}}
7878
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w2
79-
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
79+
; CHECK-NEXT: %o_wide:_(s32) = G_CONSTANT i32 0
8080
; CHECK-NEXT: $w0 = COPY [[COPY]](s32)
81-
; CHECK-NEXT: $w1 = COPY [[C]](s32)
81+
; CHECK-NEXT: $w1 = COPY %o_wide(s32)
8282
; CHECK-NEXT: RET_ReallyLR implicit $w0
8383
%0:_(s32) = COPY $w0
8484
%1:_(s32) = COPY $w1
@@ -101,10 +101,10 @@ body: |
101101
; CHECK: liveins: $w0, $w1
102102
; CHECK-NEXT: {{ $}}
103103
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
104-
; CHECK-NEXT: %const:_(s32) = G_CONSTANT i32 0
104+
; CHECK-NEXT: %o_wide:_(s32) = G_CONSTANT i32 0
105105
; CHECK-NEXT: $w0 = COPY [[COPY]](s32)
106106
; CHECK-NEXT: $w1 = COPY [[COPY]](s32)
107-
; CHECK-NEXT: $w2 = COPY %const(s32)
107+
; CHECK-NEXT: $w2 = COPY %o_wide(s32)
108108
; CHECK-NEXT: RET_ReallyLR implicit $w0
109109
%0:_(s32) = COPY $w0
110110
%const:_(s32) = G_CONSTANT i32 0

‎llvm/test/CodeGen/AArch64/GlobalISel/combine-udiv.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -257,10 +257,10 @@ define i32 @udiv_div_by_180(i32 %x)
257257
;
258258
; GISEL-LABEL: udiv_div_by_180:
259259
; GISEL: // %bb.0:
260-
; GISEL-NEXT: uxtb w8, w0
261-
; GISEL-NEXT: mov w9, #5826 // =0x16c2
262-
; GISEL-NEXT: movk w9, #364, lsl #16
263-
; GISEL-NEXT: umull x8, w8, w9
260+
; GISEL-NEXT: mov w8, #5826 // =0x16c2
261+
; GISEL-NEXT: and w9, w0, #0xff
262+
; GISEL-NEXT: movk w8, #364, lsl #16
263+
; GISEL-NEXT: umull x8, w9, w8
264264
; GISEL-NEXT: lsr x0, x8, #32
265265
; GISEL-NEXT: // kill: def $w0 killed $w0 killed $x0
266266
; GISEL-NEXT: ret

‎llvm/test/CodeGen/AArch64/GlobalISel/fold-global-offsets.mir

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -151,9 +151,9 @@ body: |
151151
; CHECK-LABEL: name: ptr_add_chain
152152
; CHECK: liveins: $x0
153153
; CHECK-NEXT: {{ $}}
154-
; CHECK-NEXT: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @g + 1
155-
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
156-
; CHECK-NEXT: %dont_fold_me:_(p0) = G_PTR_ADD [[GV]], [[C]](s64)
154+
; CHECK-NEXT: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @g + 4
155+
; CHECK-NEXT: %offset:_(s64) = G_CONSTANT i64 1
156+
; CHECK-NEXT: %dont_fold_me:_(p0) = G_PTR_ADD [[GV]], %offset(s64)
157157
; CHECK-NEXT: $x0 = COPY %dont_fold_me(p0)
158158
; CHECK-NEXT: RET_ReallyLR implicit $x0
159159
%global:_(p0) = G_GLOBAL_VALUE @g

‎llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-sameopcode-hands-crash.mir

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,8 @@ body: |
99
bb.1:
1010
; CHECK-LABEL: name: crash_fn
1111
; CHECK: [[C:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
12+
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
13+
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s1) = G_CONSTANT i1 false
1214
; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[C]](p0) :: (load (s16), align 8)
1315
; CHECK-NEXT: [[ZEXTLOAD1:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[C]](p0) :: (load (s16))
1416
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ZEXTLOAD1]], [[ZEXTLOAD]]

‎llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-swap-compare-operands.mir

Lines changed: 12 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -64,21 +64,28 @@ body: |
6464
; LOWER-NEXT: {{ $}}
6565
; LOWER-NEXT: %reg0:_(s64) = COPY $x0
6666
; LOWER-NEXT: %cmp_lhs:_(s64) = G_SEXT_INREG %reg0, 8
67+
; LOWER-NEXT: %reg1:_(s64) = COPY $x1
68+
; LOWER-NEXT: %cmp1:_(s32) = G_ICMP intpred(sge), %cmp_lhs(s64), %reg1
6769
; LOWER-NEXT: %add:_(s64) = G_ADD %cmp_lhs, %reg0
6870
; LOWER-NEXT: %cmp2:_(s32) = G_ICMP intpred(sge), %cmp_lhs(s64), %add
6971
; LOWER-NEXT: $w0 = COPY %cmp2(s32)
70-
; LOWER-NEXT: RET_ReallyLR implicit $w0
72+
; LOWER-NEXT: $w1 = COPY %cmp1(s32)
73+
; LOWER-NEXT: RET_ReallyLR implicit $w0, implicit $w1
7174
;
7275
; SELECT-LABEL: name: dont_swap_more_than_one_use
7376
; SELECT: liveins: $x0, $x1
7477
; SELECT-NEXT: {{ $}}
7578
; SELECT-NEXT: %reg0:gpr64 = COPY $x0
7679
; SELECT-NEXT: %cmp_lhs:gpr64 = SBFMXri %reg0, 0, 7
80+
; SELECT-NEXT: %reg1:gpr64 = COPY $x1
81+
; SELECT-NEXT: [[SUBSXrr:%[0-9]+]]:gpr64 = SUBSXrr %cmp_lhs, %reg1, implicit-def $nzcv
82+
; SELECT-NEXT: %cmp1:gpr32 = CSINCWr $wzr, $wzr, 11, implicit $nzcv
7783
; SELECT-NEXT: %add:gpr64 = ADDXrr %cmp_lhs, %reg0
78-
; SELECT-NEXT: [[SUBSXrr:%[0-9]+]]:gpr64 = SUBSXrr %cmp_lhs, %add, implicit-def $nzcv
84+
; SELECT-NEXT: [[SUBSXrr1:%[0-9]+]]:gpr64 = SUBSXrr %cmp_lhs, %add, implicit-def $nzcv
7985
; SELECT-NEXT: %cmp2:gpr32 = CSINCWr $wzr, $wzr, 11, implicit $nzcv
8086
; SELECT-NEXT: $w0 = COPY %cmp2
81-
; SELECT-NEXT: RET_ReallyLR implicit $w0
87+
; SELECT-NEXT: $w1 = COPY %cmp1
88+
; SELECT-NEXT: RET_ReallyLR implicit $w0, implicit $w1
8289
%reg0:_(s64) = COPY $x0
8390
%cmp_lhs:_(s64) = G_SEXT_INREG %reg0, 8
8491
%reg1:_(s64) = COPY $x1
@@ -88,7 +95,8 @@ body: |
8895
%cmp2:_(s32) = G_ICMP intpred(sge), %cmp_lhs(s64), %add
8996
9097
$w0 = COPY %cmp2(s32)
91-
RET_ReallyLR implicit $w0
98+
$w1 = COPY %cmp1(s32)
99+
RET_ReallyLR implicit $w0, implicit $w1
92100
93101
...
94102
---

‎llvm/test/CodeGen/AArch64/setcc_knownbits.ll

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -33,8 +33,7 @@ define noundef i1 @logger(i32 noundef %logLevel, ptr %ea, ptr %pll) {
3333
; CHECK-GI-NEXT: b.hi .LBB1_2
3434
; CHECK-GI-NEXT: // %bb.1: // %land.rhs
3535
; CHECK-GI-NEXT: ldr x8, [x1]
36-
; CHECK-GI-NEXT: ldrb w8, [x8]
37-
; CHECK-GI-NEXT: and w0, w8, #0x1
36+
; CHECK-GI-NEXT: ldrb w0, [x8]
3837
; CHECK-GI-NEXT: .LBB1_2: // %land.end
3938
; CHECK-GI-NEXT: ret
4039
entry:

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