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[ELF] Pass Ctx & to Symbols
1 parent 2b5cb1b commit acb2b1e

18 files changed

+137
-132
lines changed

‎lld/ELF/ARMErrataFix.cpp

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -215,7 +215,8 @@ static bool branchDestInFirstRegion(Ctx &ctx, const InputSection *isec,
215215
// find the destination address as the branch could be indirected via a thunk
216216
// or the PLT.
217217
if (r) {
218-
uint64_t dst = (r->expr == R_PLT_PC) ? r->sym->getPltVA() : r->sym->getVA();
218+
uint64_t dst =
219+
(r->expr == R_PLT_PC) ? r->sym->getPltVA(ctx) : r->sym->getVA();
219220
// Account for Thumb PC bias, usually cancelled to 0 by addend of -4.
220221
destAddr = dst + r->addend + 4;
221222
} else {
@@ -443,8 +444,9 @@ static void implementPatch(ScanResult sr, InputSection *isec,
443444
// The final target of the branch may be ARM or Thumb, if the target
444445
// is ARM then we write the patch in ARM state to avoid a state change
445446
// Thunk from the patch to the target.
446-
uint64_t dstSymAddr = (sr.rel->expr == R_PLT_PC) ? sr.rel->sym->getPltVA()
447-
: sr.rel->sym->getVA();
447+
uint64_t dstSymAddr = (sr.rel->expr == R_PLT_PC)
448+
? sr.rel->sym->getPltVA(ctx)
449+
: sr.rel->sym->getVA();
448450
destIsARM = (dstSymAddr & 1) == 0;
449451
}
450452
psec = make<Patch657417Section>(isec, sr.off, sr.instr, destIsARM);

‎lld/ELF/Arch/AArch64.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -34,7 +34,7 @@ uint64_t elf::getAArch64Page(uint64_t expr) {
3434
// PACIBSP.
3535
bool elf::isAArch64BTILandingPad(Symbol &s, int64_t a) {
3636
// PLT entries accessed indirectly have a BTI c.
37-
if (s.isInPlt())
37+
if (s.isInPlt(ctx))
3838
return true;
3939
Defined *d = dyn_cast<Defined>(&s);
4040
if (!isa_and_nonnull<InputSection>(d->section))
@@ -394,7 +394,7 @@ void AArch64::writePlt(uint8_t *buf, const Symbol &sym,
394394
};
395395
memcpy(buf, inst, sizeof(inst));
396396

397-
uint64_t gotPltEntryAddr = sym.getGotPltVA();
397+
uint64_t gotPltEntryAddr = sym.getGotPltVA(ctx);
398398
relocateNoSym(buf, R_AARCH64_ADR_PREL_PG_HI21,
399399
getAArch64Page(gotPltEntryAddr) - getAArch64Page(pltEntryAddr));
400400
relocateNoSym(buf + 4, R_AARCH64_LDST64_ABS_LO12_NC, gotPltEntryAddr);
@@ -408,15 +408,15 @@ bool AArch64::needsThunk(RelExpr expr, RelType type, const InputFile *file,
408408
// be resolved as a branch to the next instruction. If it is hidden, its
409409
// binding has been converted to local, so we just check isUndefined() here. A
410410
// undefined non-weak symbol will have been errored.
411-
if (s.isUndefined() && !s.isInPlt())
411+
if (s.isUndefined() && !s.isInPlt(ctx))
412412
return false;
413413
// ELF for the ARM 64-bit architecture, section Call and Jump relocations
414414
// only permits range extension thunks for R_AARCH64_CALL26 and
415415
// R_AARCH64_JUMP26 relocation types.
416416
if (type != R_AARCH64_CALL26 && type != R_AARCH64_JUMP26 &&
417417
type != R_AARCH64_PLT32)
418418
return false;
419-
uint64_t dst = expr == R_PLT_PC ? s.getPltVA() : s.getVA(a);
419+
uint64_t dst = expr == R_PLT_PC ? s.getPltVA(ctx) : s.getVA(a);
420420
return !inBranchRange(type, branchAddr, dst);
421421
}
422422

@@ -1089,7 +1089,7 @@ void AArch64BtiPac::writePlt(uint8_t *buf, const Symbol &sym,
10891089
pltEntryAddr += sizeof(btiData);
10901090
}
10911091

1092-
uint64_t gotPltEntryAddr = sym.getGotPltVA();
1092+
uint64_t gotPltEntryAddr = sym.getGotPltVA(ctx);
10931093
memcpy(buf, addrInst, sizeof(addrInst));
10941094
relocateNoSym(buf, R_AARCH64_ADR_PREL_PG_HI21,
10951095
getAArch64Page(gotPltEntryAddr) - getAArch64Page(pltEntryAddr));

‎lld/ELF/Arch/ARM.cpp

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -321,7 +321,7 @@ static void writePltLong(uint8_t *buf, uint64_t gotPltEntryAddr,
321321
void ARM::writePlt(uint8_t *buf, const Symbol &sym,
322322
uint64_t pltEntryAddr) const {
323323
if (!useThumbPLTs(ctx)) {
324-
uint64_t offset = sym.getGotPltVA() - pltEntryAddr - 8;
324+
uint64_t offset = sym.getGotPltVA(ctx) - pltEntryAddr - 8;
325325

326326
// The PLT entry is similar to the example given in Appendix A of ELF for
327327
// the Arm Architecture. Instead of using the Group Relocations to find the
@@ -335,15 +335,15 @@ void ARM::writePlt(uint8_t *buf, const Symbol &sym,
335335
};
336336
if (!llvm::isUInt<27>(offset)) {
337337
// We cannot encode the Offset, use the long form.
338-
writePltLong(buf, sym.getGotPltVA(), pltEntryAddr);
338+
writePltLong(buf, sym.getGotPltVA(ctx), pltEntryAddr);
339339
return;
340340
}
341341
write32(buf + 0, pltData[0] | ((offset >> 20) & 0xff));
342342
write32(buf + 4, pltData[1] | ((offset >> 12) & 0xff));
343343
write32(buf + 8, pltData[2] | (offset & 0xfff));
344344
memcpy(buf + 12, trapInstr.data(), 4); // Pad to 16-byte boundary
345345
} else {
346-
uint64_t offset = sym.getGotPltVA() - pltEntryAddr - 12;
346+
uint64_t offset = sym.getGotPltVA(ctx) - pltEntryAddr - 12;
347347
assert(llvm::isUInt<32>(offset) && "This should always fit into a 32-bit offset");
348348

349349
// A PLT entry will be:
@@ -387,7 +387,7 @@ bool ARM::needsThunk(RelExpr expr, RelType type, const InputFile *file,
387387
// be resolved as a branch to the next instruction. If it is hidden, its
388388
// binding has been converted to local, so we just check isUndefined() here. A
389389
// undefined non-weak symbol will have been errored.
390-
if (s.isUndefined() && !s.isInPlt())
390+
if (s.isUndefined() && !s.isInPlt(ctx))
391391
return false;
392392
// A state change from ARM to Thumb and vice versa must go through an
393393
// interworking thunk if the relocation type is not R_ARM_CALL or
@@ -404,7 +404,7 @@ bool ARM::needsThunk(RelExpr expr, RelType type, const InputFile *file,
404404
return true;
405405
[[fallthrough]];
406406
case R_ARM_CALL: {
407-
uint64_t dst = (expr == R_PLT_PC) ? s.getPltVA() : s.getVA();
407+
uint64_t dst = (expr == R_PLT_PC) ? s.getPltVA(ctx) : s.getVA();
408408
return !inBranchRange(type, branchAddr, dst + a) ||
409409
(!ctx.arg.armHasBlx && (s.getVA() & 1));
410410
}
@@ -417,7 +417,7 @@ bool ARM::needsThunk(RelExpr expr, RelType type, const InputFile *file,
417417
return true;
418418
[[fallthrough]];
419419
case R_ARM_THM_CALL: {
420-
uint64_t dst = (expr == R_PLT_PC) ? s.getPltVA() : s.getVA();
420+
uint64_t dst = (expr == R_PLT_PC) ? s.getPltVA(ctx) : s.getVA();
421421
return !inBranchRange(type, branchAddr, dst + a) ||
422422
(!ctx.arg.armHasBlx && (s.getVA() & 1) == 0);;
423423
}
@@ -686,9 +686,9 @@ void ARM::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
686686
bool isBlx = (read16(loc + 2) & 0x1000) == 0;
687687
// lld 10.0 and before always used bit0Thumb when deciding to write a BLX
688688
// even when type not STT_FUNC.
689-
if (!rel.sym->isFunc() && !rel.sym->isInPlt() && isBlx == useThumb)
689+
if (!rel.sym->isFunc() && !rel.sym->isInPlt(ctx) && isBlx == useThumb)
690690
stateChangeWarning(ctx, loc, rel.type, *rel.sym);
691-
if ((rel.sym->isFunc() || rel.sym->isInPlt()) ? !useThumb : isBlx) {
691+
if ((rel.sym->isFunc() || rel.sym->isInPlt(ctx)) ? !useThumb : isBlx) {
692692
// We are writing a BLX. Ensure BLX destination is 4-byte aligned. As
693693
// the BLX instruction may only be two byte aligned. This must be done
694694
// before overflow check.

‎lld/ELF/Arch/Hexagon.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -374,7 +374,7 @@ void Hexagon::writePlt(uint8_t *buf, const Symbol &sym,
374374
};
375375
memcpy(buf, inst, sizeof(inst));
376376

377-
uint64_t gotPltEntryAddr = sym.getGotPltVA();
377+
uint64_t gotPltEntryAddr = sym.getGotPltVA(ctx);
378378
relocateNoSym(buf, R_HEX_B32_PCREL_X, gotPltEntryAddr - pltEntryAddr);
379379
relocateNoSym(buf + 4, R_HEX_6_PCREL_X, gotPltEntryAddr - pltEntryAddr);
380380
}

‎lld/ELF/Arch/LoongArch.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -366,7 +366,7 @@ void LoongArch::writePlt(uint8_t *buf, const Symbol &sym,
366366
// ld.[wd] $t3, $t3, %pcrel_lo12([email protected])
367367
// jirl $t1, $t3, 0
368368
// nop
369-
uint32_t offset = sym.getGotPltVA() - pltEntryAddr;
369+
uint32_t offset = sym.getGotPltVA(ctx) - pltEntryAddr;
370370
write32le(buf + 0, insn(PCADDU12I, R_T3, hi20(offset), 0));
371371
write32le(buf + 4,
372372
insn(ctx.arg.is64 ? LD_D : LD_W, R_T3, R_T3, lo12(offset)));

‎lld/ELF/Arch/Mips.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -319,7 +319,7 @@ template <class ELFT> void MIPS<ELFT>::writePltHeader(uint8_t *buf) const {
319319
template <class ELFT>
320320
void MIPS<ELFT>::writePlt(uint8_t *buf, const Symbol &sym,
321321
uint64_t pltEntryAddr) const {
322-
uint64_t gotPltEntryAddr = sym.getGotPltVA();
322+
uint64_t gotPltEntryAddr = sym.getGotPltVA(ctx);
323323
if (isMicroMips(ctx)) {
324324
// Overwrite trap instructions written by Writer::writeTrapInstr.
325325
memset(buf, 0, pltEntrySize);

‎lld/ELF/Arch/PPC.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -79,7 +79,7 @@ void elf::writePPC32GlinkSection(Ctx &ctx, uint8_t *buf, size_t numEntries) {
7979
if (!ctx.arg.isPic) {
8080
for (const Symbol *sym :
8181
cast<PPC32GlinkSection>(*ctx.in.plt).canonical_plts) {
82-
writePPC32PltCallStub(ctx, buf, sym->getGotPltVA(), nullptr, 0);
82+
writePPC32PltCallStub(ctx, buf, sym->getGotPltVA(ctx), nullptr, 0);
8383
buf += 16;
8484
glink += 16;
8585
}
@@ -181,7 +181,7 @@ void PPC::writeIplt(uint8_t *buf, const Symbol &sym,
181181
uint64_t /*pltEntryAddr*/) const {
182182
// In -pie or -shared mode, assume r30 points to .got2+0x8000, and use a
183183
// .got2.plt_pic32. thunk.
184-
writePPC32PltCallStub(ctx, buf, sym.getGotPltVA(), sym.file, 0x8000);
184+
writePPC32PltCallStub(ctx, buf, sym.getGotPltVA(ctx), sym.file, 0x8000);
185185
}
186186

187187
void PPC::writeGotHeader(uint8_t *buf) const {
@@ -194,14 +194,14 @@ void PPC::writeGotHeader(uint8_t *buf) const {
194194
void PPC::writeGotPlt(uint8_t *buf, const Symbol &s) const {
195195
// Address of the symbol resolver stub in .glink .
196196
write32(buf,
197-
ctx.in.plt->getVA() + ctx.in.plt->headerSize + 4 * s.getPltIdx());
197+
ctx.in.plt->getVA() + ctx.in.plt->headerSize + 4 * s.getPltIdx(ctx));
198198
}
199199

200200
bool PPC::needsThunk(RelExpr expr, RelType type, const InputFile *file,
201201
uint64_t branchAddr, const Symbol &s, int64_t a) const {
202202
if (type != R_PPC_LOCAL24PC && type != R_PPC_REL24 && type != R_PPC_PLTREL24)
203203
return false;
204-
if (s.isInPlt())
204+
if (s.isInPlt(ctx))
205205
return true;
206206
if (s.isUndefWeak())
207207
return false;

‎lld/ELF/Arch/PPC64.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1161,14 +1161,14 @@ void PPC64::writePltHeader(uint8_t *buf) const {
11611161

11621162
void PPC64::writePlt(uint8_t *buf, const Symbol &sym,
11631163
uint64_t /*pltEntryAddr*/) const {
1164-
int32_t offset = pltHeaderSize + sym.getPltIdx() * pltEntrySize;
1164+
int32_t offset = pltHeaderSize + sym.getPltIdx(ctx) * pltEntrySize;
11651165
// bl __glink_PLTresolve
11661166
write32(buf, 0x48000000 | ((-offset) & 0x03FFFFFc));
11671167
}
11681168

11691169
void PPC64::writeIplt(uint8_t *buf, const Symbol &sym,
11701170
uint64_t /*pltEntryAddr*/) const {
1171-
writePPC64LoadAndBranch(buf, sym.getGotPltVA() - getPPC64TocBase(ctx));
1171+
writePPC64LoadAndBranch(buf, sym.getGotPltVA(ctx) - getPPC64TocBase(ctx));
11721172
}
11731173

11741174
static std::pair<RelType, uint64_t> toAddr16Rel(RelType type, uint64_t val) {
@@ -1429,7 +1429,7 @@ bool PPC64::needsThunk(RelExpr expr, RelType type, const InputFile *file,
14291429
return false;
14301430

14311431
// If a function is in the Plt it needs to be called with a call-stub.
1432-
if (s.isInPlt())
1432+
if (s.isInPlt(ctx))
14331433
return true;
14341434

14351435
// This check looks at the st_other bits of the callee with relocation

‎lld/ELF/Arch/RISCV.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -247,7 +247,7 @@ void RISCV::writePlt(uint8_t *buf, const Symbol &sym,
247247
// l[wd] t3, %pcrel_lo(1b)(t3)
248248
// jalr t1, t3
249249
// nop
250-
uint32_t offset = sym.getGotPltVA() - pltEntryAddr;
250+
uint32_t offset = sym.getGotPltVA(ctx) - pltEntryAddr;
251251
write32le(buf + 0, utype(AUIPC, X_T3, hi20(offset)));
252252
write32le(buf + 4, itype(ctx.arg.is64 ? LD : LW, X_T3, X_T3, lo12(offset)));
253253
write32le(buf + 8, itype(JALR, X_T1, X_T3, 0));
@@ -737,7 +737,7 @@ static void relaxCall(Ctx &ctx, const InputSection &sec, size_t i, uint64_t loc,
737737
const uint64_t insnPair = read64le(sec.content().data() + r.offset);
738738
const uint32_t rd = extractBits(insnPair, 32 + 11, 32 + 7);
739739
const uint64_t dest =
740-
(r.expr == R_PLT_PC ? sym.getPltVA() : sym.getVA()) + r.addend;
740+
(r.expr == R_PLT_PC ? sym.getPltVA(ctx) : sym.getVA()) + r.addend;
741741
const int64_t displace = dest - loc;
742742

743743
if (rvc && isInt<12>(displace) && rd == 0) {

‎lld/ELF/Arch/SystemZ.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -183,7 +183,7 @@ void SystemZ::writeGotHeader(uint8_t *buf) const {
183183
}
184184

185185
void SystemZ::writeGotPlt(uint8_t *buf, const Symbol &s) const {
186-
write64be(buf, s.getPltVA() + 14);
186+
write64be(buf, s.getPltVA(ctx) + 14);
187187
}
188188

189189
void SystemZ::writeIgotPlt(uint8_t *buf, const Symbol &s) const {
@@ -227,9 +227,9 @@ void SystemZ::writePlt(uint8_t *buf, const Symbol &sym,
227227
};
228228
memcpy(buf, inst, sizeof(inst));
229229

230-
write32be(buf + 2, (sym.getGotPltVA() - pltEntryAddr) >> 1);
230+
write32be(buf + 2, (sym.getGotPltVA(ctx) - pltEntryAddr) >> 1);
231231
write32be(buf + 24, (ctx.in.plt->getVA() - pltEntryAddr - 22) >> 1);
232-
write32be(buf + 28, ctx.in.relaPlt->entsize * sym.getPltIdx());
232+
write32be(buf + 28, ctx.in.relaPlt->entsize * sym.getPltIdx(ctx));
233233
}
234234

235235
int64_t SystemZ::getImplicitAddend(const uint8_t *buf, RelType type) const {
@@ -451,7 +451,7 @@ bool SystemZ::relaxOnce(int pass) const {
451451
if (isInt<33>(v) && !(v & 1))
452452
continue;
453453
if (rel.sym->auxIdx == 0) {
454-
rel.sym->allocateAux();
454+
rel.sym->allocateAux(ctx);
455455
addGotEntry(ctx, *rel.sym);
456456
changed = true;
457457
}

‎lld/ELF/Arch/X86.cpp

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -170,7 +170,7 @@ void X86::writeGotPltHeader(uint8_t *buf) const {
170170
void X86::writeGotPlt(uint8_t *buf, const Symbol &s) const {
171171
// Entries in .got.plt initially points back to the corresponding
172172
// PLT entries with a fixed offset to skip the first instruction.
173-
write32le(buf, s.getPltVA() + 6);
173+
write32le(buf, s.getPltVA(ctx) + 6);
174174
}
175175

176176
void X86::writeIgotPlt(uint8_t *buf, const Symbol &s) const {
@@ -210,23 +210,23 @@ void X86::writePltHeader(uint8_t *buf) const {
210210

211211
void X86::writePlt(uint8_t *buf, const Symbol &sym,
212212
uint64_t pltEntryAddr) const {
213-
unsigned relOff = ctx.in.relaPlt->entsize * sym.getPltIdx();
213+
unsigned relOff = ctx.in.relaPlt->entsize * sym.getPltIdx(ctx);
214214
if (ctx.arg.isPic) {
215215
const uint8_t inst[] = {
216216
0xff, 0xa3, 0, 0, 0, 0, // jmp *foo@GOT(%ebx)
217217
0x68, 0, 0, 0, 0, // pushl $reloc_offset
218218
0xe9, 0, 0, 0, 0, // jmp .PLT0@PC
219219
};
220220
memcpy(buf, inst, sizeof(inst));
221-
write32le(buf + 2, sym.getGotPltVA() - ctx.in.gotPlt->getVA());
221+
write32le(buf + 2, sym.getGotPltVA(ctx) - ctx.in.gotPlt->getVA());
222222
} else {
223223
const uint8_t inst[] = {
224224
0xff, 0x25, 0, 0, 0, 0, // jmp *foo@GOT
225225
0x68, 0, 0, 0, 0, // pushl $reloc_offset
226226
0xe9, 0, 0, 0, 0, // jmp .PLT0@PC
227227
};
228228
memcpy(buf, inst, sizeof(inst));
229-
write32le(buf + 2, sym.getGotPltVA());
229+
write32le(buf + 2, sym.getGotPltVA(ctx));
230230
}
231231

232232
write32le(buf + 7, relOff);
@@ -527,8 +527,8 @@ class IntelIBT : public X86 {
527527
} // namespace
528528

529529
void IntelIBT::writeGotPlt(uint8_t *buf, const Symbol &s) const {
530-
uint64_t va =
531-
ctx.in.ibtPlt->getVA() + IBTPltHeaderSize + s.getPltIdx() * pltEntrySize;
530+
uint64_t va = ctx.in.ibtPlt->getVA() + IBTPltHeaderSize +
531+
s.getPltIdx(ctx) * pltEntrySize;
532532
write32le(buf, va);
533533
}
534534

@@ -541,7 +541,7 @@ void IntelIBT::writePlt(uint8_t *buf, const Symbol &sym,
541541
0x66, 0x0f, 0x1f, 0x44, 0, 0, // nop
542542
};
543543
memcpy(buf, inst, sizeof(inst));
544-
write32le(buf + 6, sym.getGotPltVA() - ctx.in.gotPlt->getVA());
544+
write32le(buf + 6, sym.getGotPltVA(ctx) - ctx.in.gotPlt->getVA());
545545
return;
546546
}
547547

@@ -551,7 +551,7 @@ void IntelIBT::writePlt(uint8_t *buf, const Symbol &sym,
551551
0x66, 0x0f, 0x1f, 0x44, 0, 0, // nop
552552
};
553553
memcpy(buf, inst, sizeof(inst));
554-
write32le(buf + 6, sym.getGotPltVA());
554+
write32le(buf + 6, sym.getGotPltVA(ctx));
555555
}
556556

557557
void IntelIBT::writeIBTPlt(uint8_t *buf, size_t numEntries) const {
@@ -600,7 +600,7 @@ RetpolinePic::RetpolinePic(Ctx &ctx) : X86(ctx) {
600600
}
601601

602602
void RetpolinePic::writeGotPlt(uint8_t *buf, const Symbol &s) const {
603-
write32le(buf, s.getPltVA() + 17);
603+
write32le(buf, s.getPltVA(ctx) + 17);
604604
}
605605

606606
void RetpolinePic::writePltHeader(uint8_t *buf) const {
@@ -626,7 +626,7 @@ void RetpolinePic::writePltHeader(uint8_t *buf) const {
626626

627627
void RetpolinePic::writePlt(uint8_t *buf, const Symbol &sym,
628628
uint64_t pltEntryAddr) const {
629-
unsigned relOff = ctx.in.relaPlt->entsize * sym.getPltIdx();
629+
unsigned relOff = ctx.in.relaPlt->entsize * sym.getPltIdx(ctx);
630630
const uint8_t insn[] = {
631631
0x50, // pushl %eax
632632
0x8b, 0x83, 0, 0, 0, 0, // mov foo@GOT(%ebx), %eax
@@ -640,7 +640,7 @@ void RetpolinePic::writePlt(uint8_t *buf, const Symbol &sym,
640640

641641
uint32_t ebx = ctx.in.gotPlt->getVA();
642642
unsigned off = pltEntryAddr - ctx.in.plt->getVA();
643-
write32le(buf + 3, sym.getGotPltVA() - ebx);
643+
write32le(buf + 3, sym.getGotPltVA(ctx) - ebx);
644644
write32le(buf + 8, -off - 12 + 32);
645645
write32le(buf + 13, -off - 17 + 18);
646646
write32le(buf + 18, relOff);
@@ -654,7 +654,7 @@ RetpolineNoPic::RetpolineNoPic(Ctx &ctx) : X86(ctx) {
654654
}
655655

656656
void RetpolineNoPic::writeGotPlt(uint8_t *buf, const Symbol &s) const {
657-
write32le(buf, s.getPltVA() + 16);
657+
write32le(buf, s.getPltVA(ctx) + 16);
658658
}
659659

660660
void RetpolineNoPic::writePltHeader(uint8_t *buf) const {
@@ -685,7 +685,7 @@ void RetpolineNoPic::writePltHeader(uint8_t *buf) const {
685685

686686
void RetpolineNoPic::writePlt(uint8_t *buf, const Symbol &sym,
687687
uint64_t pltEntryAddr) const {
688-
unsigned relOff = ctx.in.relaPlt->entsize * sym.getPltIdx();
688+
unsigned relOff = ctx.in.relaPlt->entsize * sym.getPltIdx(ctx);
689689
const uint8_t insn[] = {
690690
0x50, // 0: pushl %eax
691691
0xa1, 0, 0, 0, 0, // 1: mov foo_in_GOT, %eax
@@ -699,7 +699,7 @@ void RetpolineNoPic::writePlt(uint8_t *buf, const Symbol &sym,
699699
memcpy(buf, insn, sizeof(insn));
700700

701701
unsigned off = pltEntryAddr - ctx.in.plt->getVA();
702-
write32le(buf + 2, sym.getGotPltVA());
702+
write32le(buf + 2, sym.getGotPltVA(ctx));
703703
write32le(buf + 7, -off - 11 + 32);
704704
write32le(buf + 12, -off - 16 + 17);
705705
write32le(buf + 17, relOff);

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