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[RISCV] Use a switch instead of an if/else chain. NFC
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llvm/lib/Target/RISCV/RISCVInstrInfo.cpp

Lines changed: 10 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -3199,21 +3199,27 @@ std::string RISCVInstrInfo::createMIROperandComment(
31993199

32003200
// Print the full VType operand of vsetvli/vsetivli instructions, and the SEW
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// operand of vector codegen pseudos.
3202-
if (OpInfo.OperandType == RISCVOp::OPERAND_VTYPEI10 ||
3203-
OpInfo.OperandType == RISCVOp::OPERAND_VTYPEI11) {
3202+
switch (OpInfo.OperandType) {
3203+
case RISCVOp::OPERAND_VTYPEI10:
3204+
case RISCVOp::OPERAND_VTYPEI11: {
32043205
unsigned Imm = Op.getImm();
32053206
RISCVVType::printVType(Imm, OS);
3206-
} else if (OpInfo.OperandType == RISCVOp::OPERAND_SEW) {
3207+
break;
3208+
}
3209+
case RISCVOp::OPERAND_SEW: {
32073210
unsigned Log2SEW = Op.getImm();
32083211
unsigned SEW = Log2SEW ? 1 << Log2SEW : 8;
32093212
assert(RISCVVType::isValidSEW(SEW) && "Unexpected SEW");
32103213
OS << "e" << SEW;
3211-
} else if (OpInfo.OperandType == RISCVOp::OPERAND_VEC_POLICY) {
3214+
break;
3215+
}
3216+
case RISCVOp::OPERAND_VEC_POLICY:
32123217
unsigned Policy = Op.getImm();
32133218
assert(Policy <= (RISCVII::TAIL_AGNOSTIC | RISCVII::MASK_AGNOSTIC) &&
32143219
"Invalid Policy Value");
32153220
OS << (Policy & RISCVII::TAIL_AGNOSTIC ? "ta" : "tu") << ", "
32163221
<< (Policy & RISCVII::MASK_AGNOSTIC ? "ma" : "mu");
3222+
break;
32173223
}
32183224

32193225
return Comment;

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