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[NFC][AMDGPU] Clean-up feature parsing for AMDGCNSPIRV. (#123519)
When we did the initial AMDGCNSPIRV commits we left the initialisation of the feature map in a relatively disorderly state. This change corrects that oversight: - We make sure that AMDGCNSPIRV actually advertises the union of all AMDGCN features, as some were not included; - We keep feature initialisation in sorted order to make it easy to pick an insertion point when features are added in the future.
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clang/test/CodeGenCXX/dynamic-cast-address-space.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -112,9 +112,9 @@ const B& f(A *a) {
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// CHECK: attributes #[[ATTR3]] = { nounwind }
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// CHECK: attributes #[[ATTR4]] = { noreturn }
114114
//.
115-
// WITH-NONZERO-DEFAULT-AS: attributes #[[ATTR0]] = { mustprogress noinline optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+16-bit-insts,+atomic-buffer-global-pk-add-f16-insts,+atomic-ds-pk-add-16-insts,+atomic-fadd-rtn-insts,+atomic-flat-pk-add-16-insts,+atomic-global-pk-add-bf16-inst,+ci-insts,+dl-insts,+dot1-insts,+dot10-insts,+dot11-insts,+dot2-insts,+dot3-insts,+dot4-insts,+dot5-insts,+dot7-insts,+dot8-insts,+dot9-insts,+dpp,+fp8-conversion-insts,+fp8-insts,+gfx10-3-insts,+gfx10-insts,+gfx11-insts,+gfx12-insts,+gfx8-insts,+gfx9-insts,+gfx90a-insts,+gfx940-insts,+gws,+image-insts,+mai-insts,+s-memrealtime,+s-memtime-inst,+wavefrontsize32,+wavefrontsize64" }
115+
// WITH-NONZERO-DEFAULT-AS: attributes #[[ATTR0]] = { mustprogress noinline optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+16-bit-insts,+ashr-pk-insts,+atomic-buffer-global-pk-add-f16-insts,+atomic-buffer-pk-add-bf16-inst,+atomic-ds-pk-add-16-insts,+atomic-fadd-rtn-insts,+atomic-flat-pk-add-16-insts,+atomic-global-pk-add-bf16-inst,+bf8-cvt-scale-insts,+bitop3-insts,+ci-insts,+dl-insts,+dot1-insts,+dot10-insts,+dot11-insts,+dot12-insts,+dot13-insts,+dot2-insts,+dot3-insts,+dot4-insts,+dot5-insts,+dot6-insts,+dot7-insts,+dot8-insts,+dot9-insts,+dpp,+f16bf16-to-fp6bf6-cvt-scale-insts,+f32-to-f16bf16-cvt-sr-insts,+fp4-cvt-scale-insts,+fp6bf6-cvt-scale-insts,+fp8-conversion-insts,+fp8-cvt-scale-insts,+fp8-insts,+gfx10-3-insts,+gfx10-insts,+gfx11-insts,+gfx12-insts,+gfx8-insts,+gfx9-insts,+gfx90a-insts,+gfx940-insts,+gfx950-insts,+gws,+image-insts,+mai-insts,+permlane16-swap,+permlane32-swap,+prng-inst,+s-memrealtime,+s-memtime-inst,+wavefrontsize32,+wavefrontsize64" }
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// WITH-NONZERO-DEFAULT-AS: attributes #[[ATTR1:[0-9]+]] = { nounwind willreturn memory(read) }
117-
// WITH-NONZERO-DEFAULT-AS: attributes #[[ATTR2:[0-9]+]] = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+16-bit-insts,+atomic-buffer-global-pk-add-f16-insts,+atomic-ds-pk-add-16-insts,+atomic-fadd-rtn-insts,+atomic-flat-pk-add-16-insts,+atomic-global-pk-add-bf16-inst,+ci-insts,+dl-insts,+dot1-insts,+dot10-insts,+dot11-insts,+dot2-insts,+dot3-insts,+dot4-insts,+dot5-insts,+dot7-insts,+dot8-insts,+dot9-insts,+dpp,+fp8-conversion-insts,+fp8-insts,+gfx10-3-insts,+gfx10-insts,+gfx11-insts,+gfx12-insts,+gfx8-insts,+gfx9-insts,+gfx90a-insts,+gfx940-insts,+gws,+image-insts,+mai-insts,+s-memrealtime,+s-memtime-inst,+wavefrontsize32,+wavefrontsize64" }
117+
// WITH-NONZERO-DEFAULT-AS: attributes #[[ATTR2:[0-9]+]] = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+16-bit-insts,+ashr-pk-insts,+atomic-buffer-global-pk-add-f16-insts,+atomic-buffer-pk-add-bf16-inst,+atomic-ds-pk-add-16-insts,+atomic-fadd-rtn-insts,+atomic-flat-pk-add-16-insts,+atomic-global-pk-add-bf16-inst,+bf8-cvt-scale-insts,+bitop3-insts,+ci-insts,+dl-insts,+dot1-insts,+dot10-insts,+dot11-insts,+dot12-insts,+dot13-insts,+dot2-insts,+dot3-insts,+dot4-insts,+dot5-insts,+dot6-insts,+dot7-insts,+dot8-insts,+dot9-insts,+dpp,+f16bf16-to-fp6bf6-cvt-scale-insts,+f32-to-f16bf16-cvt-sr-insts,+fp4-cvt-scale-insts,+fp6bf6-cvt-scale-insts,+fp8-conversion-insts,+fp8-cvt-scale-insts,+fp8-insts,+gfx10-3-insts,+gfx10-insts,+gfx11-insts,+gfx12-insts,+gfx8-insts,+gfx9-insts,+gfx90a-insts,+gfx940-insts,+gfx950-insts,+gws,+image-insts,+mai-insts,+permlane16-swap,+permlane32-swap,+prng-inst,+s-memrealtime,+s-memtime-inst,+wavefrontsize32,+wavefrontsize64" }
118118
// WITH-NONZERO-DEFAULT-AS: attributes #[[ATTR3]] = { nounwind }
119119
// WITH-NONZERO-DEFAULT-AS: attributes #[[ATTR4]] = { noreturn }
120120
//.

llvm/lib/TargetParser/TargetParser.cpp

Lines changed: 26 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -323,43 +323,59 @@ void AMDGPU::fillAMDGPUFeatureMap(StringRef GPU, const Triple &T,
323323
StringMap<bool> &Features) {
324324
// XXX - What does the member GPU mean if device name string passed here?
325325
if (T.isSPIRV() && T.getOS() == Triple::OSType::AMDHSA) {
326-
// AMDGCN SPIRV must support the union of all AMDGCN features.
326+
// AMDGCN SPIRV must support the union of all AMDGCN features. This list
327+
// should be kept in sorted order and updated whenever new features are
328+
// added.
329+
Features["16-bit-insts"] = true;
330+
Features["ashr-pk-insts"] = true;
331+
Features["atomic-buffer-pk-add-bf16-inst"] = true;
332+
Features["atomic-buffer-global-pk-add-f16-insts"] = true;
327333
Features["atomic-ds-pk-add-16-insts"] = true;
334+
Features["atomic-fadd-rtn-insts"] = true;
328335
Features["atomic-flat-pk-add-16-insts"] = true;
329-
Features["atomic-buffer-global-pk-add-f16-insts"] = true;
330336
Features["atomic-global-pk-add-bf16-inst"] = true;
331-
Features["atomic-fadd-rtn-insts"] = true;
337+
Features["bf8-cvt-scale-insts"] = true;
338+
Features["bitop3-insts"] = true;
332339
Features["ci-insts"] = true;
340+
Features["dl-insts"] = true;
333341
Features["dot1-insts"] = true;
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Features["dot2-insts"] = true;
335343
Features["dot3-insts"] = true;
336344
Features["dot4-insts"] = true;
337345
Features["dot5-insts"] = true;
346+
Features["dot6-insts"] = true;
338347
Features["dot7-insts"] = true;
339348
Features["dot8-insts"] = true;
340349
Features["dot9-insts"] = true;
341350
Features["dot10-insts"] = true;
342351
Features["dot11-insts"] = true;
343-
Features["dl-insts"] = true;
344-
Features["16-bit-insts"] = true;
352+
Features["dot12-insts"] = true;
353+
Features["dot13-insts"] = true;
345354
Features["dpp"] = true;
355+
Features["f16bf16-to-fp6bf6-cvt-scale-insts"] = true;
356+
Features["f32-to-f16bf16-cvt-sr-insts"] = true;
357+
Features["fp4-cvt-scale-insts"] = true;
358+
Features["fp6bf6-cvt-scale-insts"] = true;
359+
Features["fp8-insts"] = true;
360+
Features["fp8-conversion-insts"] = true;
361+
Features["fp8-cvt-scale-insts"] = true;
346362
Features["gfx8-insts"] = true;
347363
Features["gfx9-insts"] = true;
348364
Features["gfx90a-insts"] = true;
349365
Features["gfx940-insts"] = true;
366+
Features["gfx950-insts"] = true;
350367
Features["gfx10-insts"] = true;
351368
Features["gfx10-3-insts"] = true;
352369
Features["gfx11-insts"] = true;
353370
Features["gfx12-insts"] = true;
371+
Features["gws"] = true;
354372
Features["image-insts"] = true;
355-
Features["fp8-conversion-insts"] = true;
356373
Features["s-memrealtime"] = true;
357374
Features["s-memtime-inst"] = true;
358-
Features["gws"] = true;
359-
Features["fp8-insts"] = true;
360-
Features["fp8-conversion-insts"] = true;
361-
Features["atomic-ds-pk-add-16-insts"] = true;
362375
Features["mai-insts"] = true;
376+
Features["permlane16-swap"] = true;
377+
Features["permlane32-swap"] = true;
378+
Features["prng-inst"] = true;
363379
Features["wavefrontsize32"] = true;
364380
Features["wavefrontsize64"] = true;
365381
} else if (T.isAMDGCN()) {

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