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[VPlan] Use variadic isa<> in a few more places. NFC (#119538)
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3 files changed

+7
-9
lines changed

3 files changed

+7
-9
lines changed

llvm/lib/Transforms/Vectorize/VPlan.cpp

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -310,9 +310,8 @@ Value *VPTransformState::get(VPValue *Def, bool NeedsScalar) {
310310
if (!hasScalarValue(Def, LastLane)) {
311311
// At the moment, VPWidenIntOrFpInductionRecipes, VPScalarIVStepsRecipes and
312312
// VPExpandSCEVRecipes can also be uniform.
313-
assert((isa<VPWidenIntOrFpInductionRecipe>(Def->getDefiningRecipe()) ||
314-
isa<VPScalarIVStepsRecipe>(Def->getDefiningRecipe()) ||
315-
isa<VPExpandSCEVRecipe>(Def->getDefiningRecipe())) &&
313+
assert((isa<VPWidenIntOrFpInductionRecipe, VPScalarIVStepsRecipe,
314+
VPExpandSCEVRecipe>(Def->getDefiningRecipe())) &&
316315
"unexpected recipe found to be invariant");
317316
IsUniform = true;
318317
LastLane = 0;
@@ -361,7 +360,7 @@ void VPTransformState::addNewMetadata(Instruction *To,
361360
const Instruction *Orig) {
362361
// If the loop was versioned with memchecks, add the corresponding no-alias
363362
// metadata.
364-
if (LVer && (isa<LoadInst>(Orig) || isa<StoreInst>(Orig)))
363+
if (LVer && isa<LoadInst, StoreInst>(Orig))
365364
LVer->annotateInstWithNoAlias(To, Orig);
366365
}
367366

@@ -1028,8 +1027,7 @@ void VPlan::execute(VPTransformState *State) {
10281027
if (isa<VPWidenPHIRecipe>(&R))
10291028
continue;
10301029

1031-
if (isa<VPWidenPointerInductionRecipe>(&R) ||
1032-
isa<VPWidenIntOrFpInductionRecipe>(&R)) {
1030+
if (isa<VPWidenPointerInductionRecipe, VPWidenIntOrFpInductionRecipe>(&R)) {
10331031
PHINode *Phi = nullptr;
10341032
if (isa<VPWidenIntOrFpInductionRecipe>(&R)) {
10351033
Phi = cast<PHINode>(State->get(R.getVPSingleValue()));

llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -127,7 +127,7 @@ Type *VPTypeAnalysis::inferScalarTypeForRecipe(const VPWidenCallRecipe *R) {
127127
}
128128

129129
Type *VPTypeAnalysis::inferScalarTypeForRecipe(const VPWidenMemoryRecipe *R) {
130-
assert((isa<VPWidenLoadRecipe>(R) || isa<VPWidenLoadEVLRecipe>(R)) &&
130+
assert((isa<VPWidenLoadRecipe, VPWidenLoadEVLRecipe>(R)) &&
131131
"Store recipes should not define any values");
132132
return cast<LoadInst>(&R->getIngredient())->getType();
133133
}

llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1687,8 +1687,8 @@ void VPlanTransforms::dropPoisonGeneratingRecipes(
16871687
// instruction. Widen memory instructions involved in address computation
16881688
// will lead to gather/scatter instructions, which don't need to be
16891689
// handled.
1690-
if (isa<VPWidenMemoryRecipe>(CurRec) || isa<VPInterleaveRecipe>(CurRec) ||
1691-
isa<VPScalarIVStepsRecipe>(CurRec) || isa<VPHeaderPHIRecipe>(CurRec))
1690+
if (isa<VPWidenMemoryRecipe, VPInterleaveRecipe, VPScalarIVStepsRecipe,
1691+
VPHeaderPHIRecipe>(CurRec))
16921692
continue;
16931693

16941694
// This recipe contributes to the address computation of a widen

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