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[ELF] Move target to Ctx. NFC
Ctx was introduced in March 2022 as a more suitable place for such singletons. Follow-up to driver (2022-10) and script (2024-08).
1 parent 5f6172f commit b4feb26

21 files changed

+245
-231
lines changed

‎lld/ELF/AArch64ErrataFix.cpp

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -413,12 +413,12 @@ void Patch843419Section::writeTo(uint8_t *buf) {
413413
write32le(buf, read32le(patchee->content().begin() + patcheeOffset));
414414

415415
// Apply any relocation transferred from the original patchee section.
416-
target->relocateAlloc(*this, buf);
416+
ctx.target->relocateAlloc(*this, buf);
417417

418418
// Return address is the next instruction after the one we have just copied.
419419
uint64_t s = getLDSTAddr() + 4;
420420
uint64_t p = patchSym->getVA() + 4;
421-
target->relocateNoSym(buf + 4, R_AARCH64_JUMP26, s - p);
421+
ctx.target->relocateNoSym(buf + 4, R_AARCH64_JUMP26, s - p);
422422
}
423423

424424
void AArch64Err843419Patcher::init() {
@@ -483,7 +483,8 @@ void AArch64Err843419Patcher::insertPatches(
483483
InputSectionDescription &isd, std::vector<Patch843419Section *> &patches) {
484484
uint64_t isecLimit;
485485
uint64_t prevIsecLimit = isd.sections.front()->outSecOff;
486-
uint64_t patchUpperBound = prevIsecLimit + target->getThunkSectionSpacing();
486+
uint64_t patchUpperBound =
487+
prevIsecLimit + ctx.target->getThunkSectionSpacing();
487488
uint64_t outSecAddr = isd.sections.front()->getParent()->addr;
488489

489490
// Set the outSecOff of patches to the place where we want to insert them.
@@ -500,7 +501,7 @@ void AArch64Err843419Patcher::insertPatches(
500501
(*patchIt)->outSecOff = prevIsecLimit;
501502
++patchIt;
502503
}
503-
patchUpperBound = prevIsecLimit + target->getThunkSectionSpacing();
504+
patchUpperBound = prevIsecLimit + ctx.target->getThunkSectionSpacing();
504505
}
505506
prevIsecLimit = isecLimit;
506507
}

‎lld/ELF/ARMErrataFix.cpp

Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -157,11 +157,11 @@ static uint64_t getThumbDestAddr(uint64_t sourceAddr, uint32_t instr) {
157157
write16le(buf + 2, instr & 0x0000ffff);
158158
int64_t offset;
159159
if (isBcc(instr))
160-
offset = target->getImplicitAddend(buf, R_ARM_THM_JUMP19);
160+
offset = ctx.target->getImplicitAddend(buf, R_ARM_THM_JUMP19);
161161
else if (isB(instr))
162-
offset = target->getImplicitAddend(buf, R_ARM_THM_JUMP24);
162+
offset = ctx.target->getImplicitAddend(buf, R_ARM_THM_JUMP24);
163163
else
164-
offset = target->getImplicitAddend(buf, R_ARM_THM_CALL);
164+
offset = ctx.target->getImplicitAddend(buf, R_ARM_THM_CALL);
165165
// A BLX instruction from Thumb to Arm may have an address that is
166166
// not 4-byte aligned. As Arm instructions are always 4-byte aligned
167167
// the instruction is calculated (from Arm ARM):
@@ -182,7 +182,7 @@ void Patch657417Section::writeTo(uint8_t *buf) {
182182
write32le(buf, 0x9000f000);
183183
// If we have a relocation then apply it.
184184
if (!relocs().empty()) {
185-
target->relocateAlloc(*this, buf);
185+
ctx.target->relocateAlloc(*this, buf);
186186
return;
187187
}
188188

@@ -197,7 +197,8 @@ void Patch657417Section::writeTo(uint8_t *buf) {
197197
// state with a PC Bias of 4.
198198
uint64_t pcBias = isBLX(instr) ? 8 : 4;
199199
uint64_t p = getVA(pcBias);
200-
target->relocateNoSym(buf, isARM ? R_ARM_JUMP24 : R_ARM_THM_JUMP24, s - p);
200+
ctx.target->relocateNoSym(buf, isARM ? R_ARM_JUMP24 : R_ARM_THM_JUMP24,
201+
s - p);
201202
}
202203

203204
// Given a branch instruction spanning two 4KiB regions, at offset off from the
@@ -233,7 +234,7 @@ static bool patchInRange(const InputSection *isec, uint64_t off,
233234
// after isec. As there can be more than one patch in the patch section we
234235
// add 0x100 as contingency to account for worst case of 1 branch every 4KiB
235236
// for a 1 MiB range.
236-
return target->inBranchRange(
237+
return ctx.target->inBranchRange(
237238
isBcc(instr) ? R_ARM_THM_JUMP19 : R_ARM_THM_JUMP24, isec->getVA(off),
238239
isec->getVA() + isec->getSize() + 0x100);
239240
}

‎lld/ELF/Arch/AArch64.cpp

Lines changed: 8 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -784,7 +784,7 @@ bool AArch64Relaxer::tryRelaxAdrpAdd(const Relocation &adrpRel,
784784
write32le(buf + adrpRel.offset, 0xd503201f);
785785
// adr x_<dest_reg>
786786
write32le(buf + adrRel.offset, 0x10000000 | adrpDestReg);
787-
target->relocate(buf + adrRel.offset, adrRel, val);
787+
ctx.target->relocate(buf + adrRel.offset, adrRel, val);
788788
return true;
789789
}
790790

@@ -854,11 +854,13 @@ bool AArch64Relaxer::tryRelaxAdrpLdr(const Relocation &adrpRel,
854854
// add x_<dest reg>, x_<dest reg>
855855
write32le(buf + addRel.offset, 0x91000000 | adrpDestReg | (adrpDestReg << 5));
856856

857-
target->relocate(buf + adrpSymRel.offset, adrpSymRel,
858-
SignExtend64(getAArch64Page(sym.getVA()) -
859-
getAArch64Page(secAddr + adrpSymRel.offset),
860-
64));
861-
target->relocate(buf + addRel.offset, addRel, SignExtend64(sym.getVA(), 64));
857+
ctx.target->relocate(
858+
buf + adrpSymRel.offset, adrpSymRel,
859+
SignExtend64(getAArch64Page(sym.getVA()) -
860+
getAArch64Page(secAddr + adrpSymRel.offset),
861+
64));
862+
ctx.target->relocate(buf + addRel.offset, addRel,
863+
SignExtend64(sym.getVA(), 64));
862864
tryRelaxAdrpAdd(adrpSymRel, addRel, secAddr, buf);
863865
return true;
864866
}

‎lld/ELF/Arch/ARM.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1386,9 +1386,9 @@ void ArmCmseSGSection::writeTo(uint8_t *buf) {
13861386
write16(p + 2, 0xe97f);
13871387
write16(p + 4, 0xf000); // B.W S
13881388
write16(p + 6, 0xb000);
1389-
target->relocateNoSym(p + 4, R_ARM_THM_JUMP24,
1390-
s->acleSeSym->getVA() -
1391-
(getVA() + s->offset + s->size));
1389+
ctx.target->relocateNoSym(p + 4, R_ARM_THM_JUMP24,
1390+
s->acleSeSym->getVA() -
1391+
(getVA() + s->offset + s->size));
13921392
}
13931393
}
13941394

‎lld/ELF/Arch/LoongArch.cpp

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -349,7 +349,8 @@ void LoongArch::writePltHeader(uint8_t *buf) const {
349349
write32le(buf + 0, insn(PCADDU12I, R_T2, hi20(offset), 0));
350350
write32le(buf + 4, insn(sub, R_T1, R_T1, R_T3));
351351
write32le(buf + 8, insn(ld, R_T3, R_T2, lo12(offset)));
352-
write32le(buf + 12, insn(addi, R_T1, R_T1, lo12(-target->pltHeaderSize - 12)));
352+
write32le(buf + 12,
353+
insn(addi, R_T1, R_T1, lo12(-ctx.target->pltHeaderSize - 12)));
353354
write32le(buf + 16, insn(addi, R_T0, R_T2, lo12(offset)));
354355
write32le(buf + 20, insn(srli, R_T1, R_T1, config->is64 ? 1 : 2));
355356
write32le(buf + 24, insn(ld, R_T0, R_T0, config->wordsize));
@@ -374,8 +375,8 @@ void LoongArch::writePlt(uint8_t *buf, const Symbol &sym,
374375
}
375376

376377
RelType LoongArch::getDynRel(RelType type) const {
377-
return type == target->symbolicRel ? type
378-
: static_cast<RelType>(R_LARCH_NONE);
378+
return type == ctx.target->symbolicRel ? type
379+
: static_cast<RelType>(R_LARCH_NONE);
379380
}
380381

381382
RelExpr LoongArch::getRelExpr(const RelType type, const Symbol &s,

‎lld/ELF/Arch/PPC64.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -409,8 +409,8 @@ static bool tryRelaxPPC64TocIndirection(const Relocation &rel,
409409
return false;
410410

411411
// Add PPC64TocOffset that will be subtracted by PPC64::relocate().
412-
static_cast<const PPC64 &>(*target).relaxGot(bufLoc, rel,
413-
tocRelative + ppc64TocOffset);
412+
static_cast<const PPC64 &>(*ctx.target)
413+
.relaxGot(bufLoc, rel, tocRelative + ppc64TocOffset);
414414
return true;
415415
}
416416

‎lld/ELF/Arch/RISCV.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -235,7 +235,7 @@ void RISCV::writePltHeader(uint8_t *buf) const {
235235
write32le(buf + 0, utype(AUIPC, X_T2, hi20(offset)));
236236
write32le(buf + 4, rtype(SUB, X_T1, X_T1, X_T3));
237237
write32le(buf + 8, itype(load, X_T3, X_T2, lo12(offset)));
238-
write32le(buf + 12, itype(ADDI, X_T1, X_T1, -target->pltHeaderSize - 12));
238+
write32le(buf + 12, itype(ADDI, X_T1, X_T1, -ctx.target->pltHeaderSize - 12));
239239
write32le(buf + 16, itype(ADDI, X_T0, X_T2, lo12(offset)));
240240
write32le(buf + 20, itype(SRLI, X_T1, X_T1, config->is64 ? 1 : 2));
241241
write32le(buf + 24, itype(load, X_T0, X_T0, config->wordsize));
@@ -256,8 +256,8 @@ void RISCV::writePlt(uint8_t *buf, const Symbol &sym,
256256
}
257257

258258
RelType RISCV::getDynRel(RelType type) const {
259-
return type == target->symbolicRel ? type
260-
: static_cast<RelType>(R_RISCV_NONE);
259+
return type == ctx.target->symbolicRel ? type
260+
: static_cast<RelType>(R_RISCV_NONE);
261261
}
262262

263263
RelExpr RISCV::getRelExpr(const RelType type, const Symbol &s,

‎lld/ELF/Config.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -47,6 +47,7 @@ class Symbol;
4747
class BitcodeCompiler;
4848
class OutputSection;
4949
class LinkerScript;
50+
class TargetInfo;
5051
struct Partition;
5152
struct PhdrEntry;
5253

@@ -485,6 +486,7 @@ struct DuplicateSymbol {
485486
struct Ctx {
486487
LinkerDriver driver;
487488
LinkerScript *script;
489+
TargetInfo *target;
488490

489491
// These variables are initialized by Writer and should not be used before
490492
// Writer is initialized.

‎lld/ELF/Driver.cpp

Lines changed: 9 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -94,6 +94,7 @@ void elf::errorOrWarn(const Twine &msg) {
9494
void Ctx::reset() {
9595
driver = LinkerDriver();
9696
script = nullptr;
97+
target = nullptr;
9798

9899
bufferStart = nullptr;
99100
mainPart = nullptr;
@@ -2065,13 +2066,13 @@ void LinkerDriver::inferMachineType() {
20652066
// each target.
20662067
static uint64_t getMaxPageSize(opt::InputArgList &args) {
20672068
uint64_t val = args::getZOptionValue(args, OPT_z, "max-page-size",
2068-
target->defaultMaxPageSize);
2069+
ctx.target->defaultMaxPageSize);
20692070
if (!isPowerOf2_64(val)) {
20702071
error("max-page-size: value isn't a power of 2");
2071-
return target->defaultMaxPageSize;
2072+
return ctx.target->defaultMaxPageSize;
20722073
}
20732074
if (config->nmagic || config->omagic) {
2074-
if (val != target->defaultMaxPageSize)
2075+
if (val != ctx.target->defaultMaxPageSize)
20752076
warn("-z max-page-size set, but paging disabled by omagic or nmagic");
20762077
return 1;
20772078
}
@@ -2082,13 +2083,13 @@ static uint64_t getMaxPageSize(opt::InputArgList &args) {
20822083
// each target.
20832084
static uint64_t getCommonPageSize(opt::InputArgList &args) {
20842085
uint64_t val = args::getZOptionValue(args, OPT_z, "common-page-size",
2085-
target->defaultCommonPageSize);
2086+
ctx.target->defaultCommonPageSize);
20862087
if (!isPowerOf2_64(val)) {
20872088
error("common-page-size: value isn't a power of 2");
2088-
return target->defaultCommonPageSize;
2089+
return ctx.target->defaultCommonPageSize;
20892090
}
20902091
if (config->nmagic || config->omagic) {
2091-
if (val != target->defaultCommonPageSize)
2092+
if (val != ctx.target->defaultCommonPageSize)
20922093
warn("-z common-page-size set, but paging disabled by omagic or nmagic");
20932094
return 1;
20942095
}
@@ -3106,9 +3107,9 @@ template <class ELFT> void LinkerDriver::link(opt::InputArgList &args) {
31063107
// The Target instance handles target-specific stuff, such as applying
31073108
// relocations or writing a PLT section. It also contains target-dependent
31083109
// values such as a default image base address.
3109-
target = getTarget();
3110+
ctx.target = getTarget();
31103111

3111-
config->eflags = target->calcEFlags();
3112+
config->eflags = ctx.target->calcEFlags();
31123113
// maxPageSize (sometimes called abi page size) is the maximum page size that
31133114
// the output can be run on. For example if the OS can use 4k or 64k page
31143115
// sizes then maxPageSize must be 64k for the output to be useable on both.

‎lld/ELF/InputSection.cpp

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -434,7 +434,7 @@ void InputSection::copyRelocations(uint8_t *buf) {
434434
template <class ELFT, class RelTy, class RelIt>
435435
void InputSection::copyRelocations(uint8_t *buf,
436436
llvm::iterator_range<RelIt> rels) {
437-
const TargetInfo &target = *elf::target;
437+
const TargetInfo &target = *elf::ctx.target;
438438
InputSectionBase *sec = getRelocatedSection();
439439
(void)sec->contentMaybeDecompress(); // uncompress if needed
440440

@@ -950,7 +950,7 @@ uint64_t InputSectionBase::getRelocTargetVA(const InputFile *file, RelType type,
950950
template <class ELFT, class RelTy>
951951
void InputSection::relocateNonAlloc(uint8_t *buf, Relocs<RelTy> rels) {
952952
const unsigned bits = sizeof(typename ELFT::uint) * 8;
953-
const TargetInfo &target = *elf::target;
953+
const TargetInfo &target = *elf::ctx.target;
954954
const auto emachine = config->emachine;
955955
const bool isDebug = isDebugSection(*this);
956956
const bool isDebugLine = isDebug && name == ".debug_line";
@@ -1103,7 +1103,7 @@ void InputSectionBase::relocate(uint8_t *buf, uint8_t *bufEnd) {
11031103
adjustSplitStackFunctionPrologues<ELFT>(buf, bufEnd);
11041104

11051105
if (flags & SHF_ALLOC) {
1106-
target->relocateAlloc(*this, buf);
1106+
ctx.target->relocateAlloc(*this, buf);
11071107
return;
11081108
}
11091109

@@ -1198,8 +1198,8 @@ void InputSectionBase::adjustSplitStackFunctionPrologues(uint8_t *buf,
11981198

11991199
if (Defined *f = getEnclosingFunction(rel.offset)) {
12001200
prologues.insert(f);
1201-
if (target->adjustPrologueForCrossSplitStack(buf + f->value, end,
1202-
f->stOther))
1201+
if (ctx.target->adjustPrologueForCrossSplitStack(buf + f->value, end,
1202+
f->stOther))
12031203
continue;
12041204
if (!getFile<ELFT>()->someNoSplitStack)
12051205
error(lld::toString(this) + ": " + f->getName() +
@@ -1208,7 +1208,7 @@ void InputSectionBase::adjustSplitStackFunctionPrologues(uint8_t *buf,
12081208
}
12091209
}
12101210

1211-
if (target->needsMoreStackNonSplit)
1211+
if (ctx.target->needsMoreStackNonSplit)
12121212
switchMorestackCallsToMorestackNonSplit(prologues, morestackCalls);
12131213
}
12141214

‎lld/ELF/LinkerScript.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1487,7 +1487,7 @@ LinkerScript::assignAddresses() {
14871487
dot = config->imageBase.value_or(0);
14881488
} else {
14891489
// Assign addresses to headers right now.
1490-
dot = target->getImageBase();
1490+
dot = ctx.target->getImageBase();
14911491
ctx.out.elfHeader->addr = dot;
14921492
ctx.out.programHeaders->addr = dot + ctx.out.elfHeader->size;
14931493
dot += getHeaderSize();

‎lld/ELF/MarkLive.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -75,8 +75,8 @@ template <class ELFT> class MarkLive {
7575
template <class ELFT>
7676
static uint64_t getAddend(InputSectionBase &sec,
7777
const typename ELFT::Rel &rel) {
78-
return target->getImplicitAddend(sec.content().begin() + rel.r_offset,
79-
rel.getType(config->isMips64EL));
78+
return ctx.target->getImplicitAddend(sec.content().begin() + rel.r_offset,
79+
rel.getType(config->isMips64EL));
8080
}
8181

8282
template <class ELFT>

‎lld/ELF/OutputSections.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -278,7 +278,7 @@ static void nopInstrFill(uint8_t *buf, size_t size) {
278278
unsigned i = 0;
279279
if (size == 0)
280280
return;
281-
std::vector<std::vector<uint8_t>> nopFiller = *target->nopInstrs;
281+
std::vector<std::vector<uint8_t>> nopFiller = *ctx.target->nopInstrs;
282282
unsigned num = size / nopFiller.back().size();
283283
for (unsigned c = 0; c < num; ++c) {
284284
memcpy(buf + i, nopFiller.back().data(), nopFiller.back().size());
@@ -541,7 +541,7 @@ void OutputSection::writeTo(uint8_t *buf, parallel::TaskGroup &tg) {
541541
else
542542
end = buf + sections[i + 1]->outSecOff;
543543
if (isec->nopFiller) {
544-
assert(target->nopInstrs);
544+
assert(ctx.target->nopInstrs);
545545
nopInstrFill(start, end - start);
546546
} else
547547
fill(start, end - start, filler);
@@ -857,7 +857,7 @@ std::array<uint8_t, 4> OutputSection::getFiller() {
857857
if (filler)
858858
return *filler;
859859
if (flags & SHF_EXECINSTR)
860-
return target->trapInstr;
860+
return ctx.target->trapInstr;
861861
return {0, 0, 0, 0};
862862
}
863863

@@ -890,7 +890,7 @@ void OutputSection::checkDynRelAddends(const uint8_t *bufStart) {
890890
int64_t writtenAddend =
891891
relOsec->type == SHT_NOBITS
892892
? 0
893-
: target->getImplicitAddend(relocTarget, rel.type);
893+
: ctx.target->getImplicitAddend(relocTarget, rel.type);
894894
if (addend != writtenAddend)
895895
internalLinkerError(
896896
getErrorLocation(relocTarget),

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