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[ARM][AArch64] Require appropriate features for crypto algorithms
This patch changes the AArch32 crypto instructions (sha2 and aes) to require the specific sha2 or aes features. These features have already been implemented and can be controlled through the command line, but do not have the expected result (i.e. `+noaes` will not disable aes instructions). The crypto feature retains its existing meaning of both sha2 and aes. Several small changes are included due to the knock-on effect this has: - The AArch32 driver has been modified to ensure sha2/aes is correctly set based on arch/cpu/fpu selection and feature ordering. - Crypto extensions are permitted for AArch32 v8-R profile, but not enabled by default. - ACLE feature macros have been updated with the fine grained crypto algorithms. These are also used by AArch64. - Various tests updated due to the change in feature lists and macros. Reviewed By: lenary Differential Revision: https://reviews.llvm.org/D99079
1 parent 511ffe1 commit b8baa2a

27 files changed

+480
-231
lines changed

‎clang/include/clang/Basic/arm_neon.td

+12-1
Original file line numberDiff line numberDiff line change
@@ -1117,12 +1117,14 @@ def VEXT_A64 : WInst<"vext", "...I", "dQdPlQPl">;
11171117

11181118
////////////////////////////////////////////////////////////////////////////////
11191119
// Crypto
1120-
let ArchGuard = "__ARM_ARCH >= 8 && defined(__ARM_FEATURE_CRYPTO)" in {
1120+
let ArchGuard = "__ARM_ARCH >= 8 && defined(__ARM_FEATURE_AES)" in {
11211121
def AESE : SInst<"vaese", "...", "QUc">;
11221122
def AESD : SInst<"vaesd", "...", "QUc">;
11231123
def AESMC : SInst<"vaesmc", "..", "QUc">;
11241124
def AESIMC : SInst<"vaesimc", "..", "QUc">;
1125+
}
11251126

1127+
let ArchGuard = "__ARM_ARCH >= 8 && defined(__ARM_FEATURE_SHA2)" in {
11261128
def SHA1H : SInst<"vsha1h", "11", "Ui">;
11271129
def SHA1SU1 : SInst<"vsha1su1", "...", "QUi">;
11281130
def SHA256SU0 : SInst<"vsha256su0", "...", "QUi">;
@@ -1134,28 +1136,37 @@ def SHA1SU0 : SInst<"vsha1su0", "....", "QUi">;
11341136
def SHA256H : SInst<"vsha256h", "....", "QUi">;
11351137
def SHA256H2 : SInst<"vsha256h2", "....", "QUi">;
11361138
def SHA256SU1 : SInst<"vsha256su1", "....", "QUi">;
1139+
}
11371140

1141+
let ArchGuard = "__ARM_ARCH >= 8 && defined(__ARM_FEATURE_SHA3) && defined(__aarch64__)" in {
11381142
def BCAX : SInst<"vbcax", "....", "QUcQUsQUiQUlQcQsQiQl">;
11391143
def EOR3 : SInst<"veor3", "....", "QUcQUsQUiQUlQcQsQiQl">;
11401144
def RAX1 : SInst<"vrax1", "...", "QUl">;
11411145

11421146
let isVXAR = 1 in {
11431147
def XAR : SInst<"vxar", "...I", "QUl">;
11441148
}
1149+
}
1150+
1151+
let ArchGuard = "__ARM_ARCH >= 8 && defined(__ARM_FEATURE_SHA512) && defined(__aarch64__)" in {
11451152

11461153
def SHA512SU0 : SInst<"vsha512su0", "...", "QUl">;
11471154
def SHA512su1 : SInst<"vsha512su1", "....", "QUl">;
11481155
def SHA512H : SInst<"vsha512h", "....", "QUl">;
11491156
def SHA512H2 : SInst<"vsha512h2", "....", "QUl">;
1157+
}
11501158

1159+
let ArchGuard = "__ARM_ARCH >= 8 && defined(__ARM_FEATURE_SM3) && defined(__aarch64__)" in {
11511160
def SM3SS1 : SInst<"vsm3ss1", "....", "QUi">;
11521161
def SM3TT1A : SInst<"vsm3tt1a", "....I", "QUi">;
11531162
def SM3TT1B : SInst<"vsm3tt1b", "....I", "QUi">;
11541163
def SM3TT2A : SInst<"vsm3tt2a", "....I", "QUi">;
11551164
def SM3TT2B : SInst<"vsm3tt2b", "....I", "QUi">;
11561165
def SM3PARTW1 : SInst<"vsm3partw1", "....", "QUi">;
11571166
def SM3PARTW2 : SInst<"vsm3partw2", "....", "QUi">;
1167+
}
11581168

1169+
let ArchGuard = "__ARM_ARCH >= 8 && defined(__ARM_FEATURE_SM4) && defined(__aarch64__)" in {
11591170
def SM4E : SInst<"vsm4e", "...", "QUi">;
11601171
def SM4EKEY : SInst<"vsm4ekey", "...", "QUi">;
11611172
}

‎clang/lib/Basic/Targets/AArch64.cpp

+33-1
Original file line numberDiff line numberDiff line change
@@ -287,9 +287,27 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts,
287287
if (HasCRC)
288288
Builder.defineMacro("__ARM_FEATURE_CRC32", "1");
289289

290-
if (HasCrypto)
290+
// The __ARM_FEATURE_CRYPTO is deprecated in favor of finer grained feature
291+
// macros for AES, SHA2, SHA3 and SM4
292+
if (HasCrypto || (HasAES && HasSHA2))
291293
Builder.defineMacro("__ARM_FEATURE_CRYPTO", "1");
292294

295+
if (HasAES)
296+
Builder.defineMacro("__ARM_FEATURE_AES", "1");
297+
298+
if (HasSHA2)
299+
Builder.defineMacro("__ARM_FEATURE_SHA2", "1");
300+
301+
if (HasSHA3) {
302+
Builder.defineMacro("__ARM_FEATURE_SHA3", "1");
303+
Builder.defineMacro("__ARM_FEATURE_SHA512", "1");
304+
}
305+
306+
if (HasSM4) {
307+
Builder.defineMacro("__ARM_FEATURE_SM3", "1");
308+
Builder.defineMacro("__ARM_FEATURE_SM4", "1");
309+
}
310+
293311
if (HasUnaligned)
294312
Builder.defineMacro("__ARM_FEATURE_UNALIGNED", "1");
295313

@@ -421,6 +439,10 @@ bool AArch64TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
421439
FPU = FPUMode;
422440
HasCRC = false;
423441
HasCrypto = false;
442+
HasAES = false;
443+
HasSHA2 = false;
444+
HasSHA3 = false;
445+
HasSM4 = false;
424446
HasUnaligned = true;
425447
HasFullFP16 = false;
426448
HasDotProd = false;
@@ -490,6 +512,16 @@ bool AArch64TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
490512
HasCRC = true;
491513
if (Feature == "+crypto")
492514
HasCrypto = true;
515+
if (Feature == "+aes")
516+
HasAES = true;
517+
if (Feature == "+sha2")
518+
HasSHA2 = true;
519+
if (Feature == "+sha3") {
520+
HasSHA2 = true;
521+
HasSHA3 = true;
522+
}
523+
if (Feature == "+sm4")
524+
HasSM4 = true;
493525
if (Feature == "+strict-align")
494526
HasUnaligned = false;
495527
if (Feature == "+v8.1a")

‎clang/lib/Basic/Targets/AArch64.h

+4
Original file line numberDiff line numberDiff line change
@@ -30,6 +30,10 @@ class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public TargetInfo {
3030
unsigned FPU;
3131
bool HasCRC;
3232
bool HasCrypto;
33+
bool HasAES;
34+
bool HasSHA2;
35+
bool HasSHA3;
36+
bool HasSM4;
3337
bool HasUnaligned;
3438
bool HasFullFP16;
3539
bool HasDotProd;

‎clang/lib/Basic/Targets/ARM.cpp

+13-1
Original file line numberDiff line numberDiff line change
@@ -428,6 +428,8 @@ bool ARMTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
428428
MVE = 0;
429429
CRC = 0;
430430
Crypto = 0;
431+
SHA2 = 0;
432+
AES = 0;
431433
DSP = 0;
432434
Unaligned = 1;
433435
SoftFloat = false;
@@ -478,6 +480,10 @@ bool ARMTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
478480
CRC = 1;
479481
} else if (Feature == "+crypto") {
480482
Crypto = 1;
483+
} else if (Feature == "+sha2") {
484+
SHA2 = 1;
485+
} else if (Feature == "+aes") {
486+
AES = 1;
481487
} else if (Feature == "+dsp") {
482488
DSP = 1;
483489
} else if (Feature == "+fp64") {
@@ -641,8 +647,14 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts,
641647

642648
if (ArchVersion >= 8) {
643649
// ACLE 6.5.7 Crypto Extension
644-
if (Crypto)
650+
// The __ARM_FEATURE_CRYPTO is deprecated in favor of finer grained
651+
// feature macros for AES and SHA2
652+
if (Crypto || (SHA2 && AES))
645653
Builder.defineMacro("__ARM_FEATURE_CRYPTO", "1");
654+
if (SHA2)
655+
Builder.defineMacro("__ARM_FEATURE_SHA2", "1");
656+
if (AES)
657+
Builder.defineMacro("__ARM_FEATURE_AES", "1");
646658
// ACLE 6.5.8 CRC32 Extension
647659
if (CRC)
648660
Builder.defineMacro("__ARM_FEATURE_CRC32", "1");

‎clang/lib/Basic/Targets/ARM.h

+2
Original file line numberDiff line numberDiff line change
@@ -72,6 +72,8 @@ class LLVM_LIBRARY_VISIBILITY ARMTargetInfo : public TargetInfo {
7272

7373
unsigned CRC : 1;
7474
unsigned Crypto : 1;
75+
unsigned SHA2 : 1;
76+
unsigned AES : 1;
7577
unsigned DSP : 1;
7678
unsigned Unaligned : 1;
7779
unsigned DotProd : 1;

‎clang/lib/Driver/ToolChains/Arch/ARM.cpp

+68-25
Original file line numberDiff line numberDiff line change
@@ -541,6 +541,14 @@ void arm::getARMTargetFeatures(const Driver &D, const llvm::Triple &Triple,
541541
if (!llvm::ARM::getFPUFeatures(FPUID, Features))
542542
D.Diag(clang::diag::err_drv_clang_unsupported)
543543
<< std::string("-mfpu=") + AndroidFPU;
544+
} else {
545+
if (!ForAS) {
546+
std::string CPU = arm::getARMTargetCPU(CPUName, ArchName, Triple);
547+
llvm::ARM::ArchKind ArchKind =
548+
arm::getLLVMArchKindForARM(CPU, ArchName, Triple);
549+
FPUID = llvm::ARM::getDefaultFPU(CPU, ArchKind);
550+
(void)llvm::ARM::getFPUFeatures(FPUID, Features);
551+
}
544552
}
545553

546554
// Now we've finished accumulating features from arch, cpu and fpu,
@@ -618,34 +626,69 @@ void arm::getARMTargetFeatures(const Driver &D, const llvm::Triple &Triple,
618626
Features.push_back("-crc");
619627
}
620628

621-
// For Arch >= ARMv8.0 && A profile: crypto = sha2 + aes
629+
// For Arch >= ARMv8.0 && A or R profile: crypto = sha2 + aes
630+
// Rather than replace within the feature vector, determine whether each
631+
// algorithm is enabled and append this to the end of the vector.
632+
// The algorithms can be controlled by their specific feature or the crypto
633+
// feature, so their status can be determined by the last occurance of
634+
// either in the vector. This allows one to supercede the other.
635+
// e.g. +crypto+noaes in -march/-mcpu should enable sha2, but not aes
622636
// FIXME: this needs reimplementation after the TargetParser rewrite
623-
auto CryptoIt = llvm::find_if(llvm::reverse(Features), [](const StringRef F) {
624-
return F.contains("crypto");
625-
});
626-
if (CryptoIt != Features.rend()) {
627-
if (CryptoIt->take_front() == "+") {
628-
StringRef ArchSuffix = arm::getLLVMArchSuffixForARM(
629-
arm::getARMTargetCPU(CPUName, ArchName, Triple), ArchName, Triple);
630-
if (llvm::ARM::parseArchVersion(ArchSuffix) >= 8 &&
631-
llvm::ARM::parseArchProfile(ArchSuffix) ==
632-
llvm::ARM::ProfileKind::A) {
633-
if (ArchName.find_lower("+nosha2") == StringRef::npos &&
634-
CPUName.find_lower("+nosha2") == StringRef::npos)
635-
Features.push_back("+sha2");
636-
if (ArchName.find_lower("+noaes") == StringRef::npos &&
637-
CPUName.find_lower("+noaes") == StringRef::npos)
638-
Features.push_back("+aes");
639-
} else {
637+
bool HasSHA2 = false;
638+
bool HasAES = false;
639+
const auto ItSHA2 =
640+
llvm::find_if(llvm::reverse(Features), [](const StringRef F) {
641+
return F.contains("crypto") || F.contains("sha2");
642+
});
643+
const auto ItAES =
644+
llvm::find_if(llvm::reverse(Features), [](const StringRef F) {
645+
return F.contains("crypto") || F.contains("aes");
646+
});
647+
const bool FoundSHA2 = ItSHA2 != Features.rend();
648+
const bool FoundAES = ItAES != Features.rend();
649+
if (FoundSHA2)
650+
HasSHA2 = ItSHA2->take_front() == "+";
651+
if (FoundAES)
652+
HasAES = ItAES->take_front() == "+";
653+
if (FoundSHA2 || FoundAES) {
654+
if (HasSHA2 && HasAES)
655+
Features.push_back("+crypto");
656+
else
657+
Features.push_back("-crypto");
658+
if (HasSHA2)
659+
Features.push_back("+sha2");
660+
else
661+
Features.push_back("-sha2");
662+
if (HasAES)
663+
Features.push_back("+aes");
664+
else
665+
Features.push_back("-aes");
666+
}
667+
668+
if (HasSHA2 || HasAES) {
669+
StringRef ArchSuffix = arm::getLLVMArchSuffixForARM(
670+
arm::getARMTargetCPU(CPUName, ArchName, Triple), ArchName, Triple);
671+
llvm::ARM::ProfileKind ArchProfile =
672+
llvm::ARM::parseArchProfile(ArchSuffix);
673+
if (!((llvm::ARM::parseArchVersion(ArchSuffix) >= 8) &&
674+
(ArchProfile == llvm::ARM::ProfileKind::A ||
675+
ArchProfile == llvm::ARM::ProfileKind::R))) {
676+
if (HasSHA2)
677+
D.Diag(clang::diag::warn_target_unsupported_extension)
678+
<< "sha2"
679+
<< llvm::ARM::getArchName(llvm::ARM::parseArch(ArchSuffix));
680+
if (HasAES)
640681
D.Diag(clang::diag::warn_target_unsupported_extension)
641-
<< "crypto"
682+
<< "aes"
642683
<< llvm::ARM::getArchName(llvm::ARM::parseArch(ArchSuffix));
643-
// With -fno-integrated-as -mfpu=crypto-neon-fp-armv8 some assemblers such as the GNU assembler
644-
// will permit the use of crypto instructions as the fpu will override the architecture.
645-
// We keep the crypto feature in this case to preserve compatibility.
646-
// In all other cases we remove the crypto feature.
647-
if (!Args.hasArg(options::OPT_fno_integrated_as))
648-
Features.push_back("-crypto");
684+
// With -fno-integrated-as -mfpu=crypto-neon-fp-armv8 some assemblers such
685+
// as the GNU assembler will permit the use of crypto instructions as the
686+
// fpu will override the architecture. We keep the crypto feature in this
687+
// case to preserve compatibility. In all other cases we remove the crypto
688+
// feature.
689+
if (!Args.hasArg(options::OPT_fno_integrated_as)) {
690+
Features.push_back("-sha2");
691+
Features.push_back("-aes");
649692
}
650693
}
651694
}

‎clang/test/CodeGen/aarch64-neon-range-checks.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
// RUN: %clang_cc1 -triple aarch64-linux-gnu -target-feature +neon -target-feature +crypto -verify %s
1+
// RUN: %clang_cc1 -triple aarch64-linux-gnu -target-feature +neon -target-feature +sha3 -target-feature +sm4 -verify %s
22

33
#include <arm_neon.h>
44

‎clang/test/CodeGen/aarch64-neon-sha3.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
22
// RUN: %clang_cc1 -triple aarch64-linux-gnu -target-feature +neon \
3-
// RUN: -target-feature +crypto -S -emit-llvm -o - %s \
3+
// RUN: -target-feature +sha3 -S -emit-llvm -o - %s \
44
// RUN: | FileCheck %s
55

66
#include <arm_neon.h>

‎clang/test/CodeGen/aarch64-neon-sm4-sm3.c

+1-4
Original file line numberDiff line numberDiff line change
@@ -1,13 +1,10 @@
11
// RUN: %clang_cc1 -triple aarch64-linux-gnu -target-feature +neon \
2-
// RUN: -target-feature +crypto -S -emit-llvm -o - %s \
2+
// RUN: -target-feature +sm4 -S -emit-llvm -o - %s \
33
// RUN: | FileCheck %s
44

55
// RUN: not %clang_cc1 -triple aarch64-linux-gnu -target-feature +neon \
66
// RUN: -S -emit-llvm -o - %s 2>&1 | FileCheck --check-prefix=CHECK-NO-CRYPTO %s
77

8-
//The front-end requires the addition of both +crypto and +sm4 in the
9-
// command line, however the back-end requires only +sm4 (includes sm4&sm3)
10-
118
#include <arm_neon.h>
129

1310
void test_vsm3partw1(uint32x4_t a, uint32x4_t b, uint32x4_t c) {

‎clang/test/CodeGen/arm-target-features.c

+3-3
Original file line numberDiff line numberDiff line change
@@ -26,14 +26,14 @@
2626
// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a72 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
2727
// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a73 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
2828
// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu exynos-m3 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
29-
// CHECK-BASIC-V8: "target-features"="+armv8-a,+crc,+crypto,+d32,+dsp,+fp-armv8,+fp-armv8d16,+fp-armv8d16sp,+fp-armv8sp,+fp16,+fp64,+hwdiv,+hwdiv-arm,+neon,+thumb-mode,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,+vfp4,+vfp4d16,+vfp4d16sp,+vfp4sp"
29+
// CHECK-BASIC-V8: "target-features"="+aes,+armv8-a,+crc,+d32,+dsp,+fp-armv8,+fp-armv8d16,+fp-armv8d16sp,+fp-armv8sp,+fp16,+fp64,+hwdiv,+hwdiv-arm,+neon,+sha2,+thumb-mode,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,+vfp4,+vfp4d16,+vfp4d16sp,+vfp4sp"
3030

3131
// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu exynos-m4 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V82
3232
// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu exynos-m5 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V82
33-
// CHECK-BASIC-V82: "target-features"="+armv8.2-a,+crc,+crypto,+d32,+dotprod,+dsp,+fp-armv8,+fp-armv8d16,+fp-armv8d16sp,+fp-armv8sp,+fp16,+fp64,+fullfp16,+hwdiv,+hwdiv-arm,+neon,+ras,+thumb-mode,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,+vfp4,+vfp4d16,+vfp4d16sp,+vfp4sp"
33+
// CHECK-BASIC-V82: "target-features"="+aes,+armv8.2-a,+crc,+d32,+dotprod,+dsp,+fp-armv8,+fp-armv8d16,+fp-armv8d16sp,+fp-armv8sp,+fp16,+fp64,+fullfp16,+hwdiv,+hwdiv-arm,+neon,+ras,+sha2,+thumb-mode,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,+vfp4,+vfp4d16,+vfp4d16sp,+vfp4sp"
3434

3535
// RUN: %clang_cc1 -triple armv8-linux-gnueabi -target-cpu cortex-a53 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8-ARM
36-
// CHECK-BASIC-V8-ARM: "target-features"="+armv8-a,+crc,+crypto,+d32,+dsp,+fp-armv8,+fp-armv8d16,+fp-armv8d16sp,+fp-armv8sp,+fp16,+fp64,+hwdiv,+hwdiv-arm,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,+vfp4,+vfp4d16,+vfp4d16sp,+vfp4sp,-thumb-mode"
36+
// CHECK-BASIC-V8-ARM: "target-features"="+aes,+armv8-a,+crc,+d32,+dsp,+fp-armv8,+fp-armv8d16,+fp-armv8d16sp,+fp-armv8sp,+fp16,+fp64,+hwdiv,+hwdiv-arm,+neon,+sha2,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,+vfp4,+vfp4d16,+vfp4d16sp,+vfp4sp,-thumb-mode"
3737

3838
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-r5 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP3-D16-DIV
3939
// CHECK-VFP3-D16-DIV: "target-features"="+armv7-r,+dsp,+fp64,+hwdiv,+hwdiv-arm,+thumb-mode,+vfp2,+vfp2sp,+vfp3d16,+vfp3d16sp"

‎clang/test/CodeGen/arm64_crypto.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
1-
// RUN: %clang_cc1 -triple arm64-apple-ios7.0 -target-feature +neon -target-feature +crypto -ffreestanding -Os -S -o - %s | FileCheck %s
2-
// RUN: %clang_cc1 -triple arm64-apple-ios7.0 -target-feature +neon -target-feature +crypto -ffreestanding -fexperimental-new-pass-manager -Os -S -o - %s | FileCheck %s
1+
// RUN: %clang_cc1 -triple arm64-apple-ios7.0 -target-feature +neon -target-feature +aes -target-feature +sha2 -ffreestanding -Os -S -o - %s | FileCheck %s
2+
// RUN: %clang_cc1 -triple arm64-apple-ios7.0 -target-feature +neon -target-feature +aes -target-feature +sha2 -ffreestanding -fexperimental-new-pass-manager -Os -S -o - %s | FileCheck %s
33
// REQUIRES: aarch64-registered-target
44

55
#include <arm_neon.h>

‎clang/test/CodeGen/neon-crypto.c

+4-2
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,10 @@
11
// RUN: %clang_cc1 -triple arm-none-linux-gnueabi -target-feature +neon \
2-
// RUN: -target-feature +crypto -target-cpu cortex-a57 -emit-llvm -O1 -o - %s | FileCheck %s
2+
// RUN: -target-feature +sha2 -target-feature +aes \
3+
// RUN: -target-cpu cortex-a57 -emit-llvm -O1 -o - %s | FileCheck %s
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// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \
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// RUN: -target-feature +crypto -emit-llvm -O1 -o - %s | FileCheck %s
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// RUN: -target-feature +sha2 -target-feature +aes \
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// RUN: -emit-llvm -O1 -o - %s | FileCheck %s
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// RUN: not %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \
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// RUN: -S -O3 -o - %s 2>&1 | FileCheck --check-prefix=CHECK-NO-CRYPTO %s
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‎clang/test/Driver/aarch64-cpus.c

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Original file line numberDiff line numberDiff line change
@@ -483,12 +483,6 @@
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// MCPU-MTUNE-THUNDERX2T99: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "thunderx2t99"
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// MCPU-MTUNE-THUNDERX3T110: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "thunderx3t110"
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// RUN: %clang -target armv8a-arm-none-eabi -mcpu=cortex-a78c -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CORTEX-A78C %s
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// RUN: %clang -target armv8a-arm-none-eabi -mcpu=cortex-a78c -mfpu=crypto-neon-fp-armv8 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CORTEX-A78C-MFPU %s
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// CHECK-CORTEX-A78C: "-cc1"{{.*}} "-triple" "armv8.2a-{{.*}} "-target-cpu" "cortex-a78c"
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// CHECK-CORTEX-A78C-MFPU: "-cc1"{{.*}} "-target-feature" "+fp-armv8"
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// CHECK-CORTEX-A78C-MFPU: "-target-feature" "+crypto"
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// RUN: %clang -target aarch64 -march=armv8.1a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV81A %s
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// RUN: %clang -target aarch64 -march=armv8.1-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV81A %s
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// RUN: %clang -target aarch64 -mlittle-endian -march=armv8.1a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV81A %s

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