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[PowerPC] Define SchedModel for Power8
PowerPC subtargets prior to Power9 use the 'legacy' itinerary way to provide scheduling information. This patch re-writes the tablegen file to define the scheduling information in the new SchedModel way, which can bring improvements to some benchmarks. Reviewed By: shchenz Differential Revision: https://reviews.llvm.org/D154488
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283 files changed

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‎llvm/lib/Target/PowerPC/PPCScheduleP8.td

Lines changed: 320 additions & 396 deletions
Large diffs are not rendered by default.

‎llvm/test/CodeGen/PowerPC/2006-07-07-ComputeMaskedBits.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -9,14 +9,14 @@ define i32 @test(i32 %i) {
99
; CHECK: # %bb.0:
1010
; CHECK-NEXT: addis 4, 2, .LC0@toc@ha
1111
; CHECK-NEXT: extsw 3, 3
12-
; CHECK-NEXT: addis 5, 2, .LC1@toc@ha
1312
; CHECK-NEXT: ld 4, .LC0@toc@l(4)
1413
; CHECK-NEXT: ld 4, 0(4)
1514
; CHECK-NEXT: lbzx 3, 4, 3
16-
; CHECK-NEXT: ld 4, .LC1@toc@l(5)
15+
; CHECK-NEXT: addis 4, 2, .LC1@toc@ha
16+
; CHECK-NEXT: ld 4, .LC1@toc@l(4)
1717
; CHECK-NEXT: subfic 3, 3, 1
18-
; CHECK-NEXT: ld 4, 0(4)
1918
; CHECK-NEXT: extsw 3, 3
19+
; CHECK-NEXT: ld 4, 0(4)
2020
; CHECK-NEXT: sldi 3, 3, 2
2121
; CHECK-NEXT: lwzx 3, 4, 3
2222
; CHECK-NEXT: blr

‎llvm/test/CodeGen/PowerPC/BreakableToken-reduced.ll

Lines changed: 21 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -202,58 +202,52 @@ define void @_ZN5clang6format22BreakableStringLiteral11insertBreakEjjSt4pairImjE
202202
; CHECK-LABEL: _ZN5clang6format22BreakableStringLiteral11insertBreakEjjSt4pairImjERNS0_17WhitespaceManagerE:
203203
; CHECK: # %bb.0: # %entry
204204
; CHECK-NEXT: ld 10, 56(3)
205-
; CHECK-NEXT: lwz 0, 40(3)
205+
; CHECK-NEXT: lwz 4, 40(3)
206206
; CHECK-NEXT: mr 12, 8
207207
; CHECK-NEXT: cmpldi 10, 0
208208
; CHECK-NEXT: beq 0, .LBB0_2
209209
; CHECK-NEXT: # %bb.1: # %if.end.i.i
210210
; CHECK-NEXT: ld 9, 48(3)
211-
; CHECK-NEXT: lbz 4, 0(9)
212-
; CHECK-NEXT: cmpwi 4, 64
211+
; CHECK-NEXT: lbz 8, 0(9)
212+
; CHECK-NEXT: cmpwi 8, 64
213213
; CHECK-NEXT: b .LBB0_3
214214
; CHECK-NEXT: .LBB0_2: # %entry._ZNK4llvm9StringRef10startswithES0_.exit_crit_edge
215215
; CHECK-NEXT: ld 9, 48(3)
216216
; CHECK-NEXT: crxor 2, 2, 2
217217
; CHECK-NEXT: .LBB0_3: # %_ZNK4llvm9StringRef10startswithES0_.exit
218-
; CHECK-NEXT: mflr 4
219-
; CHECK-NEXT: .cfi_def_cfa_offset 160
218+
; CHECK-NEXT: mflr 0
219+
; CHECK-NEXT: .cfi_def_cfa_offset 144
220220
; CHECK-NEXT: .cfi_offset lr, 16
221-
; CHECK-NEXT: .cfi_offset r28, -32
222-
; CHECK-NEXT: .cfi_offset r29, -24
223221
; CHECK-NEXT: .cfi_offset r30, -16
224-
; CHECK-NEXT: std 28, -32(1) # 8-byte Folded Spill
225-
; CHECK-NEXT: std 29, -24(1) # 8-byte Folded Spill
226222
; CHECK-NEXT: std 30, -16(1) # 8-byte Folded Spill
227-
; CHECK-NEXT: stdu 1, -160(1)
228-
; CHECK-NEXT: std 4, 176(1)
223+
; CHECK-NEXT: stdu 1, -144(1)
229224
; CHECK-NEXT: li 8, 0
230225
; CHECK-NEXT: li 11, 1
226+
; CHECK-NEXT: std 0, 160(1)
231227
; CHECK-NEXT: add 5, 6, 5
232-
; CHECK-NEXT: iseleq 30, 11, 8
228+
; CHECK-NEXT: lbz 30, 20(3)
229+
; CHECK-NEXT: clrldi 6, 7, 32
230+
; CHECK-NEXT: iseleq 8, 11, 8
233231
; CHECK-NEXT: ld 11, 64(3)
234-
; CHECK-NEXT: lbz 29, 20(3)
235-
; CHECK-NEXT: lwz 28, 16(3)
236232
; CHECK-NEXT: add 5, 5, 10
233+
; CHECK-NEXT: clrldi 5, 5, 32
234+
; CHECK-NEXT: mr 7, 11
235+
; CHECK-NEXT: sub 0, 4, 8
237236
; CHECK-NEXT: ld 4, 8(3)
238237
; CHECK-NEXT: ld 8, 72(3)
239-
; CHECK-NEXT: sub 3, 0, 30
240-
; CHECK-NEXT: clrldi 5, 5, 32
241-
; CHECK-NEXT: li 0, 1
242-
; CHECK-NEXT: clrldi 6, 7, 32
243-
; CHECK-NEXT: extsw 30, 3
238+
; CHECK-NEXT: lwz 3, 16(3)
239+
; CHECK-NEXT: std 30, 96(1)
240+
; CHECK-NEXT: extsw 0, 0
241+
; CHECK-NEXT: std 3, 112(1)
242+
; CHECK-NEXT: li 3, 1
243+
; CHECK-NEXT: std 0, 120(1)
244+
; CHECK-NEXT: std 3, 104(1)
244245
; CHECK-NEXT: mr 3, 12
245-
; CHECK-NEXT: mr 7, 11
246-
; CHECK-NEXT: std 0, 104(1)
247-
; CHECK-NEXT: std 28, 112(1)
248-
; CHECK-NEXT: std 29, 96(1)
249-
; CHECK-NEXT: std 30, 120(1)
250246
; CHECK-NEXT: bl _ZN5clang6format17WhitespaceManager24replaceWhitespaceInTokenERKNS0_11FormatTokenEjjN4llvm9StringRefES6_bjji
251247
; CHECK-NEXT: nop
252-
; CHECK-NEXT: addi 1, 1, 160
248+
; CHECK-NEXT: addi 1, 1, 144
253249
; CHECK-NEXT: ld 0, 16(1)
254250
; CHECK-NEXT: ld 30, -16(1) # 8-byte Folded Reload
255-
; CHECK-NEXT: ld 29, -24(1) # 8-byte Folded Reload
256-
; CHECK-NEXT: ld 28, -32(1) # 8-byte Folded Reload
257251
; CHECK-NEXT: mtlr 0
258252
; CHECK-NEXT: blr
259253
entry:

‎llvm/test/CodeGen/PowerPC/CSR-fit.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -21,8 +21,8 @@ define dso_local signext i32 @caller1(i32 signext %a, i32 signext %b) local_unna
2121
; CHECK-PWR8-NEXT: #APP
2222
; CHECK-PWR8-NEXT: add r3, r3, r4
2323
; CHECK-PWR8-NEXT: #NO_APP
24-
; CHECK-PWR8-NEXT: std r0, 192(r1)
2524
; CHECK-PWR8-NEXT: extsw r3, r3
25+
; CHECK-PWR8-NEXT: std r0, 192(r1)
2626
; CHECK-PWR8-NEXT: bl callee
2727
; CHECK-PWR8-NEXT: nop
2828
; CHECK-PWR8-NEXT: addi r1, r1, 176
@@ -75,8 +75,8 @@ define dso_local signext i32 @caller2(i32 signext %a, i32 signext %b) local_unna
7575
; CHECK-PWR8-NEXT: #APP
7676
; CHECK-PWR8-NEXT: add r3, r3, r4
7777
; CHECK-PWR8-NEXT: #NO_APP
78-
; CHECK-PWR8-NEXT: std r0, 192(r1)
7978
; CHECK-PWR8-NEXT: extsw r3, r3
79+
; CHECK-PWR8-NEXT: std r0, 192(r1)
8080
; CHECK-PWR8-NEXT: bl callee
8181
; CHECK-PWR8-NEXT: nop
8282
; CHECK-PWR8-NEXT: addi r1, r1, 176

‎llvm/test/CodeGen/PowerPC/CompareEliminationSpillIssue.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -42,10 +42,10 @@ entry:
4242
; CHECK: extsw r3,
4343
; CHECK: bl call
4444
; CHECK: sub r3,
45-
; CHECK: rldicl r3, r3, 1, 63
4645
; CHECK: std r3, [[OFF:[0-9]+]](r1)
4746
; CHECK: #APP
4847
; CHECK: ld r3, [[OFF]](r1)
48+
; CHECK: rldicl r3, r3, 1, 63
4949
; CHECK: xori r3, r3, 1
5050
; CHECK: blr
5151

‎llvm/test/CodeGen/PowerPC/P10-stack-alignment.ll

Lines changed: 11 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -22,15 +22,15 @@ define dso_local signext i32 @test_32byte_vector() nounwind {
2222
; CHECK-LE-NEXT: subfic r0, r0, -96
2323
; CHECK-LE-NEXT: stdux r1, r1, r0
2424
; CHECK-LE-NEXT: addis r3, r2, .LCPI0_0@toc@ha
25-
; CHECK-LE-NEXT: addis r4, r2, .LCPI0_1@toc@ha
2625
; CHECK-LE-NEXT: addi r3, r3, .LCPI0_0@toc@l
27-
; CHECK-LE-NEXT: addi r4, r4, .LCPI0_1@toc@l
2826
; CHECK-LE-NEXT: lxvd2x vs0, 0, r3
29-
; CHECK-LE-NEXT: lxvd2x vs1, 0, r4
30-
; CHECK-LE-NEXT: addi r4, r1, 48
27+
; CHECK-LE-NEXT: addi r3, r1, 48
28+
; CHECK-LE-NEXT: stxvd2x vs0, 0, r3
29+
; CHECK-LE-NEXT: addis r3, r2, .LCPI0_1@toc@ha
30+
; CHECK-LE-NEXT: addi r3, r3, .LCPI0_1@toc@l
31+
; CHECK-LE-NEXT: lxvd2x vs0, 0, r3
3132
; CHECK-LE-NEXT: addi r3, r1, 32
32-
; CHECK-LE-NEXT: stxvd2x vs0, 0, r4
33-
; CHECK-LE-NEXT: stxvd2x vs1, 0, r3
33+
; CHECK-LE-NEXT: stxvd2x vs0, 0, r3
3434
; CHECK-LE-NEXT: bl test
3535
; CHECK-LE-NEXT: nop
3636
; CHECK-LE-NEXT: lwa r3, 32(r1)
@@ -158,25 +158,24 @@ define dso_local void @test_Array() nounwind {
158158
; CHECK-LE: # %bb.0: # %entry
159159
; CHECK-LE-NEXT: mflr r0
160160
; CHECK-LE-NEXT: stdu r1, -176(r1)
161-
; CHECK-LE-NEXT: addis r4, r2, Arr1@toc@ha
162161
; CHECK-LE-NEXT: li r3, 0
163-
; CHECK-LE-NEXT: std r0, 192(r1)
162+
; CHECK-LE-NEXT: addis r4, r2, Arr1@toc@ha
164163
; CHECK-LE-NEXT: li r6, 65
164+
; CHECK-LE-NEXT: std r0, 192(r1)
165165
; CHECK-LE-NEXT: addi r5, r1, 46
166-
; CHECK-LE-NEXT: addi r4, r4, Arr1@toc@l
167166
; CHECK-LE-NEXT: stw r3, 44(r1)
168-
; CHECK-LE-NEXT: addi r4, r4, -1
167+
; CHECK-LE-NEXT: addi r4, r4, Arr1@toc@l
169168
; CHECK-LE-NEXT: mtctr r6
169+
; CHECK-LE-NEXT: addi r4, r4, -1
170170
; CHECK-LE-NEXT: bdz .LBB2_2
171171
; CHECK-LE-NEXT: .p2align 5
172172
; CHECK-LE-NEXT: .LBB2_1: # %for.body
173173
; CHECK-LE-NEXT: #
174174
; CHECK-LE-NEXT: lbz r6, 1(r4)
175-
; CHECK-LE-NEXT: addi r7, r5, 2
176175
; CHECK-LE-NEXT: addi r4, r4, 1
177176
; CHECK-LE-NEXT: addi r3, r3, 1
178177
; CHECK-LE-NEXT: sth r6, 2(r5)
179-
; CHECK-LE-NEXT: mr r5, r7
178+
; CHECK-LE-NEXT: addi r5, r5, 2
180179
; CHECK-LE-NEXT: bdnz .LBB2_1
181180
; CHECK-LE-NEXT: .LBB2_2: # %for.cond.cleanup
182181
; CHECK-LE-NEXT: addi r3, r1, 48

‎llvm/test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,8 +19,8 @@ define signext i32 @main() nounwind {
1919
; CHECK-NEXT: addi 6, 1, 46
2020
; CHECK-NEXT: sth 3, 46(1)
2121
; CHECK-NEXT: lis 3, 0
22-
; CHECK-NEXT: ori 3, 3, 33059
2322
; CHECK-NEXT: sync
23+
; CHECK-NEXT: ori 3, 3, 33059
2424
; CHECK-NEXT: .LBB0_1: # %L.entry
2525
; CHECK-NEXT: #
2626
; CHECK-NEXT: lharx 5, 0, 6

‎llvm/test/CodeGen/PowerPC/VSX-XForm-Scalars.ll

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,6 @@ define void @testExpandPostRAPseudo(ptr nocapture readonly %ptr) {
1515
; CHECK-P8: ld r4, .LC0@toc@l(r4)
1616
; CHECK-P8: xxspltw vs0, vs0, 1
1717
; CHECK-P8; stxvd2x vs0, 0, r4
18-
; CHECK-P8: lis r4, 1024
1918
; CHECK-P8: lfiwax f0, 0, r3
2019
; CHECK-P8: addis r3, r2, .LC1@toc@ha
2120
; CHECK-P8: ld r3, .LC1@toc@l(r3)

‎llvm/test/CodeGen/PowerPC/aix-dfltabi-rsrvd-reg.ll

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -86,12 +86,12 @@ entry:
8686
; EXTABI: bb.0.entry:
8787
; EXTABI: liveins: $f1, $x4
8888
; EXTABI-DAG: renamable $f0 = LFD 0, renamable $x4 :: (volatile load (s64) from %ir.b, align 4)
89-
; EXTABI-DAG: renamable $f0 = nofpexcept XSADDDP killed renamable $f0, renamable $f1, implicit $rm
90-
; EXTABI-DAG: renamable $vf31 = nofpexcept XSMULDP killed renamable $f1, renamable $f1, implicit $rm
89+
; EXTABI-DAG: renamable $f0 = nofpexcept XSADDDP killed renamable $f0, $f1, implicit $rm
9190
; EXTABI: STFD killed renamable $f0, 0, renamable $x4 :: (volatile store (s64) into %ir.b, align 4)
9291
; EXTABI-LABEL: INLINEASM
93-
; EXTABI-DAG: renamable $f0 = LFD 0, renamable $x4 :: (volatile load (s64) from %ir.b, align 4)
94-
; EXTABI-DAG: renamable $f0 = nofpexcept XSADDDP killed renamable $vf31, killed renamable $f0, implicit $rm
92+
; EXTABI-DAG: renamable $f0 = nofpexcept XSMULDP killed renamable $vf31, renamable $vf31, implicit $rm
93+
; EXTABI-DAG: renamable $f1 = LFD 0, renamable $x4 :: (volatile load (s64) from %ir.b, align 4)
94+
; EXTABI-DAG: renamable $f0 = nofpexcept XSADDDP killed renamable $f0, killed renamable $f1, implicit $rm
9595
; EXTABI-DAG: STFD killed renamable $f0, 0, renamable $x4 :: (volatile store (s64) into %ir.b, align 4)
9696
; EXTABI: renamable $f1 = LFD 0, killed renamable $x4 :: (volatile load (s64) from %ir.b, align 4)
9797

@@ -144,12 +144,12 @@ entry:
144144
; EXTABI: body: |
145145
; EXTABI-DAG: bb.0.entry:
146146
; EXTABI-DAG: liveins: $v2, $x3
147-
; EXTABI-DAG: renamable $v3 = LXVW4X $zero8, renamable $x3 :: (volatile load (s128) from %ir.b, align 4)
148147
; EXTABI-DAG: renamable $v31 = COPY $v2
149-
; EXTABI-DAG: renamable $v2 = VADDUWM killed renamable $v3, $v2
150-
; EXTABI-LABEL: INLINEASM
151148
; EXTABI-DAG: renamable $v2 = LXVW4X $zero8, renamable $x3 :: (volatile load (s128) from %ir.b, align 4)
152-
; EXTABI-DAG: renamable $v3 = VMULUWM killed renamable $v31, renamable $v31
153-
; EXTABI-DAG: renamable $v2 = VADDUWM killed renamable $v3, killed renamable $v2
149+
; EXTABI-DAG: renamable $v2 = VADDUWM killed renamable $v2, renamable $v31
150+
; EXTABI-LABEL: INLINEASM
151+
; EXTABI-DAG: renamable $v2 = VMULUWM killed renamable $v31, renamable $v31
152+
; EXTABI-DAG: renamable $v3 = LXVW4X $zero8, renamable $x3 :: (volatile load (s128) from %ir.b, align 4)
153+
; EXTABI-DAG: renamable $v2 = VADDUWM killed renamable $v2, killed renamable $v3
154154
; EXTABI-DAG: STXVW4X killed renamable $v2, $zero8, renamable $x3 :: (volatile store (s128) into %ir.b, align 4)
155155
; EXTABI: renamable $v2 = LXVW4X $zero8, killed renamable $x3 :: (volatile load (s128) from %ir.b, align 4)

‎llvm/test/CodeGen/PowerPC/aix-vsx-splatimm.ll

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -36,20 +36,20 @@ define void @test_aix_splatimm(i32 %arg, i32 %arg1, i32 %arg2) {
3636
; CHECK: # %bb.0: # %bb
3737
; CHECK-NEXT: bclr 12, 20, 0
3838
; CHECK-NEXT: # %bb.1: # %bb3
39+
; CHECK-NEXT: slwi 3, 3, 8
3940
; CHECK-NEXT: srwi 4, 4, 16
41+
; CHECK-NEXT: neg 3, 3
4042
; CHECK-NEXT: srwi 5, 5, 16
4143
; CHECK-NEXT: mullw 4, 5, 4
4244
; CHECK-NEXT: lwz 5, 0(3)
43-
; CHECK-NEXT: slwi 3, 3, 8
44-
; CHECK-NEXT: neg 3, 3
45-
; CHECK-NEXT: srwi 5, 5, 1
4645
; CHECK-NEXT: mtvsrd 34, 3
4746
; CHECK-NEXT: li 3, 0
47+
; CHECK-NEXT: srwi 5, 5, 1
4848
; CHECK-NEXT: mullw 4, 4, 5
49-
; CHECK-NEXT: vsplth 2, 2, 3
50-
; CHECK-NEXT: stxvd2x 34, 0, 3
5149
; CHECK-NEXT: neg 4, 4
5250
; CHECK-NEXT: mtvsrd 35, 4
51+
; CHECK-NEXT: vsplth 2, 2, 3
52+
; CHECK-NEXT: stxvd2x 34, 0, 3
5353
; CHECK-NEXT: vsplth 3, 3, 3
5454
; CHECK-NEXT: stxvd2x 35, 0, 3
5555
bb:

‎llvm/test/CodeGen/PowerPC/aix32-p8-scalar_vector_conversions.ll

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -25,9 +25,9 @@ entry:
2525
define <8 x i16> @builds(i16 zeroext %a) {
2626
; CHECK-LABEL: builds:
2727
; CHECK: # %bb.0: # %entry
28-
; CHECK-NEXT: addi 4, 1, -16
2928
; CHECK-NEXT: sth 3, -16(1)
30-
; CHECK-NEXT: lxvw4x 34, 0, 4
29+
; CHECK-NEXT: addi 3, 1, -16
30+
; CHECK-NEXT: lxvw4x 34, 0, 3
3131
; CHECK-NEXT: vsplth 2, 2, 0
3232
; CHECK-NEXT: blr
3333
entry:
@@ -40,9 +40,9 @@ entry:
4040
define <4 x i32> @buildi(i32 zeroext %a) {
4141
; CHECK-LABEL: buildi:
4242
; CHECK: # %bb.0: # %entry
43-
; CHECK-NEXT: addi 4, 1, -16
4443
; CHECK-NEXT: stw 3, -16(1)
45-
; CHECK-NEXT: lxvw4x 0, 0, 4
44+
; CHECK-NEXT: addi 3, 1, -16
45+
; CHECK-NEXT: lxvw4x 0, 0, 3
4646
; CHECK-NEXT: xxspltw 34, 0, 0
4747
; CHECK-NEXT: blr
4848
entry:
@@ -55,14 +55,14 @@ entry:
5555
define <2 x i64> @buildl(i64 %a) {
5656
; CHECK-LABEL: buildl:
5757
; CHECK: # %bb.0: # %entry
58-
; CHECK-NEXT: lwz 5, L..C0(2) # %const.0
59-
; CHECK-NEXT: stw 4, -16(1)
6058
; CHECK-NEXT: stw 3, -32(1)
59+
; CHECK-NEXT: lwz 3, L..C0(2) # %const.0
60+
; CHECK-NEXT: stw 4, -16(1)
61+
; CHECK-NEXT: lxvw4x 34, 0, 3
6162
; CHECK-NEXT: addi 3, 1, -16
62-
; CHECK-NEXT: addi 4, 1, -32
6363
; CHECK-NEXT: lxvw4x 35, 0, 3
64-
; CHECK-NEXT: lxvw4x 36, 0, 4
65-
; CHECK-NEXT: lxvw4x 34, 0, 5
64+
; CHECK-NEXT: addi 3, 1, -32
65+
; CHECK-NEXT: lxvw4x 36, 0, 3
6666
; CHECK-NEXT: vperm 2, 4, 3, 2
6767
; CHECK-NEXT: blr
6868
entry:
@@ -990,11 +990,11 @@ entry:
990990
define i64 @getvelsl(<2 x i64> %vsl, i32 signext %i) {
991991
; CHECK-LABEL: getvelsl:
992992
; CHECK: # %bb.0: # %entry
993-
; CHECK-NEXT: add 3, 3, 3
993+
; CHECK-NEXT: add 5, 3, 3
994994
; CHECK-NEXT: addi 4, 1, -16
995-
; CHECK-NEXT: addi 5, 3, 1
995+
; CHECK-NEXT: rlwinm 3, 5, 2, 28, 29
996+
; CHECK-NEXT: addi 5, 5, 1
996997
; CHECK-NEXT: stxvw4x 34, 0, 4
997-
; CHECK-NEXT: rlwinm 3, 3, 2, 28, 29
998998
; CHECK-NEXT: rlwinm 5, 5, 2, 28, 29
999999
; CHECK-NEXT: lwzx 3, 4, 3
10001000
; CHECK-NEXT: lwzx 4, 4, 5
@@ -1008,11 +1008,11 @@ entry:
10081008
define i64 @getvelul(<2 x i64> %vul, i32 signext %i) {
10091009
; CHECK-LABEL: getvelul:
10101010
; CHECK: # %bb.0: # %entry
1011-
; CHECK-NEXT: add 3, 3, 3
1011+
; CHECK-NEXT: add 5, 3, 3
10121012
; CHECK-NEXT: addi 4, 1, -16
1013-
; CHECK-NEXT: addi 5, 3, 1
1013+
; CHECK-NEXT: rlwinm 3, 5, 2, 28, 29
1014+
; CHECK-NEXT: addi 5, 5, 1
10141015
; CHECK-NEXT: stxvw4x 34, 0, 4
1015-
; CHECK-NEXT: rlwinm 3, 3, 2, 28, 29
10161016
; CHECK-NEXT: rlwinm 5, 5, 2, 28, 29
10171017
; CHECK-NEXT: lwzx 3, 4, 3
10181018
; CHECK-NEXT: lwzx 4, 4, 5

‎llvm/test/CodeGen/PowerPC/aix_scalar_vector_permuted.ll

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -32,17 +32,17 @@ define void @test_f2(ptr %P, ptr %Q, ptr %S) {
3232
; AIX-P8-32: # %bb.0:
3333
; AIX-P8-32-NEXT: li r6, 4
3434
; AIX-P8-32-NEXT: lxsiwzx v3, 0, r3
35-
; AIX-P8-32-NEXT: lxsiwzx v5, 0, r4
35+
; AIX-P8-32-NEXT: lxsiwzx v4, 0, r4
3636
; AIX-P8-32-NEXT: lxsiwzx v2, r3, r6
37-
; AIX-P8-32-NEXT: lxsiwzx v4, r4, r6
3837
; AIX-P8-32-NEXT: vmrgow v2, v3, v2
39-
; AIX-P8-32-NEXT: vmrgow v3, v5, v4
38+
; AIX-P8-32-NEXT: lxsiwzx v3, r4, r6
39+
; AIX-P8-32-NEXT: vmrgow v3, v4, v3
4040
; AIX-P8-32-NEXT: xvaddsp vs0, v2, v3
4141
; AIX-P8-32-NEXT: xxsldwi vs1, vs0, vs0, 1
4242
; AIX-P8-32-NEXT: xscvspdpn f0, vs0
43-
; AIX-P8-32-NEXT: xscvspdpn f1, vs1
4443
; AIX-P8-32-NEXT: stfs f0, 0(r5)
45-
; AIX-P8-32-NEXT: stfs f1, 4(r5)
44+
; AIX-P8-32-NEXT: xscvspdpn f0, vs1
45+
; AIX-P8-32-NEXT: stfs f0, 4(r5)
4646
; AIX-P8-32-NEXT: blr
4747
;
4848
; AIX-P9-64-LABEL: test_f2:

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