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1 parent c530dad commit c16e378Copy full SHA for c16e378
llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
@@ -189,10 +189,10 @@ bool VPRecipeBase::mayHaveSideEffects() const {
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}
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void VPLiveOut::fixPhi(VPlan &Plan, VPTransformState &State) {
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- auto Lane = VPLane::getLastLaneForVF(State.VF);
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VPValue *ExitValue = getOperand(0);
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- if (vputils::isUniformAfterVectorization(ExitValue))
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- Lane = VPLane::getFirstLane();
+ auto Lane = vputils::isUniformAfterVectorization(ExitValue)
+ ? VPLane::getFirstLane()
+ : VPLane::getLastLaneForVF(State.VF);
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VPBasicBlock *MiddleVPBB =
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cast<VPBasicBlock>(Plan.getVectorLoopRegion()->getSingleSuccessor());
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BasicBlock *MiddleBB = State.CFG.VPBB2IRBB[MiddleVPBB];
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