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[mlir][vector][print] do not append newline to printing pure strings (#83213)
Since the vector.print str provides no punctuation control, it is slightly more flexible to let the client of this operation decide whether there should be a trailing newline. This allows for printing like vector.print str "nse = " vector.print %nse : index as nse = 42
1 parent 1c211bc commit c1b8c6c

17 files changed

+66
-65
lines changed

‎mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1532,7 +1532,8 @@ class VectorPrintOpConversion : public ConvertOpToLLVMPattern<vector::PrintOp> {
15321532
auto punct = printOp.getPunctuation();
15331533
if (auto stringLiteral = printOp.getStringLiteral()) {
15341534
LLVM::createPrintStrCall(rewriter, loc, parent, "vector_print_str",
1535-
*stringLiteral, *getTypeConverter());
1535+
*stringLiteral, *getTypeConverter(),
1536+
/*addNewline=*/false);
15361537
} else if (punct != PrintPunctuation::NoPunctuation) {
15371538
emitCall(rewriter, printOp->getLoc(), [&] {
15381539
switch (punct) {

‎mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-compare-results-i16.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -26,7 +26,7 @@ func.func @check_results(%lhs : i16, %rhs : i16, %res0 : i16, %res1 : i16) -> ()
2626
%mismatch = arith.cmpi ne, %res0, %res1 : i16
2727
scf.if %mismatch -> () {
2828
vector.print %res1 : i16
29-
vector.print str "Mismatch"
29+
vector.print str "Mismatch\n"
3030
}
3131
return
3232
}

‎mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/fill-2d.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -88,7 +88,7 @@ func.func @entry() {
8888
}
8989

9090
// CHECK: SME: END OF TEST OUTPUT
91-
vector.print str "SME: END OF TEST OUTPUT"
91+
vector.print str "SME: END OF TEST OUTPUT\n"
9292

9393
return
9494
}

‎mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/use-too-many-tiles.mlir

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -24,23 +24,23 @@ func.func @use_too_many_tiles(%a: memref<?x?xi16>, %b: memref<?x?xi16>, %c: mem
2424

2525
// CHECK-LABEL: tile_a:
2626
// CHECK-COUNT-8: ( 0, 0, 0, 0, 0, 0, 0, 0
27-
vector.print str "tile_a:"
27+
vector.print str "tile_a:\n"
2828
vector.print %tile_a : vector<[8]x[8]xi16>
2929
// CHECK-LABEL: tile_b:
3030
// CHECK-COUNT-8: ( 1, 1, 1, 1, 1, 1, 1, 1
31-
vector.print str "tile_b:"
31+
vector.print str "tile_b:\n"
3232
vector.print %tile_b : vector<[8]x[8]xi16>
3333
// CHECK-LABEL: tile_c:
3434
// CHECK-COUNT-8: ( 2, 2, 2, 2, 2, 2, 2, 2
35-
vector.print str "tile_c:"
35+
vector.print str "tile_c:\n"
3636
vector.print %tile_c : vector<[8]x[8]xi16>
3737
// CHECK-LABEL: tile_d:
3838
// CHECK-COUNT-8: ( 3, 3, 3, 3, 3, 3, 3, 3
39-
vector.print str "tile_d:"
39+
vector.print str "tile_d:\n"
4040
vector.print %tile_d : vector<[8]x[8]xi16>
4141
// CHECK-LABEL: tile_e:
4242
// CHECK-COUNT-8: ( 4, 4, 4, 4, 4, 4, 4, 4
43-
vector.print str "tile_e:"
43+
vector.print str "tile_e:\n"
4444
vector.print %tile_e : vector<[8]x[8]xi16>
4545
return
4646
}

‎mlir/test/Integration/Dialect/Vector/CPU/ArmSME/Emulated/test-setArmSVLBits.mlir

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -12,13 +12,13 @@ func.func @checkSVL() {
1212
%svl_h = arm_sme.streaming_vl <half>
1313
%svl_w = arm_sme.streaming_vl <word>
1414
%svl_d = arm_sme.streaming_vl <double>
15-
vector.print str "SVL.b"
15+
vector.print str "SVL.b\n"
1616
vector.print %svl_b : index
17-
vector.print str "SVL.h"
17+
vector.print str "SVL.h\n"
1818
vector.print %svl_h : index
19-
vector.print str "SVL.w"
19+
vector.print str "SVL.w\n"
2020
vector.print %svl_w : index
21-
vector.print str "SVL.d"
21+
vector.print str "SVL.d\n"
2222
vector.print %svl_d : index
2323
return
2424
}

‎mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-store-128-bit-tile.mlir

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -53,13 +53,13 @@ func.func @test_load_store_zaq0() {
5353

5454
// CHECK-LABEL: INITIAL TILE A:
5555
// CHECK: ( 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7 )
56-
vector.print str "INITIAL TILE A:"
56+
vector.print str "INITIAL TILE A:\n"
5757
func.call @print_i8s(%tile_a_bytes, %zaq_size_bytes) : (memref<?xi8>, index) -> ()
5858
vector.print punctuation <newline>
5959

6060
// CHECK-LABEL: INITIAL TILE B:
6161
// CHECK: ( 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64 )
62-
vector.print str "INITIAL TILE B:"
62+
vector.print str "INITIAL TILE B:\n"
6363
func.call @print_i8s(%tile_b_bytes, %zaq_size_bytes) : (memref<?xi8>, index) -> ()
6464
vector.print punctuation <newline>
6565

@@ -68,13 +68,13 @@ func.func @test_load_store_zaq0() {
6868

6969
// CHECK-LABEL: FINAL TILE A:
7070
// CHECK: ( 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7 )
71-
vector.print str "FINAL TILE A:"
71+
vector.print str "FINAL TILE A:\n"
7272
func.call @print_i8s(%tile_a_bytes, %zaq_size_bytes) : (memref<?xi8>, index) -> ()
7373
vector.print punctuation <newline>
7474

7575
// CHECK-LABEL: FINAL TILE B:
7676
// CHECK: ( 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7 )
77-
vector.print str "FINAL TILE B:"
77+
vector.print str "FINAL TILE B:\n"
7878
func.call @print_i8s(%tile_b_bytes, %zaq_size_bytes) : (memref<?xi8>, index) -> ()
7979

8080
return

‎mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-load-vertical.mlir

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -49,12 +49,12 @@ func.func @entry() {
4949
// CHECK-NEXT: ( 2, 2, 2, 2
5050
// CHECK-NEXT: ( 3, 3, 3, 3
5151
// CHECK: TILE END
52-
vector.print str "TILE BEGIN"
52+
vector.print str "TILE BEGIN\n"
5353
scf.for %i = %c0 to %za_s_size step %svl_s {
5454
%tileslice = vector.load %mem1[%i] : memref<?xi32>, vector<[4]xi32>
5555
vector.print %tileslice : vector<[4]xi32>
5656
}
57-
vector.print str "TILE END"
57+
vector.print str "TILE END\n"
5858

5959
// 2. VERTICAL LAYOUT
6060
// Dump "mem2". The smallest SVL is 128-bits so the tile will be at least
@@ -66,9 +66,9 @@ func.func @entry() {
6666
// CHECK-NEXT: ( 0, 1, 2, 3
6767
// CHECK-NEXT: ( 0, 1, 2, 3
6868
// CHECK: TILE END
69-
vector.print str "TILE BEGIN"
69+
vector.print str "TILE BEGIN\n"
7070
vector.print %0 : vector<[4]x[4]xi32>
71-
vector.print str "TILE END"
71+
vector.print str "TILE END\n"
7272

7373
return
7474
}

‎mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-multi-tile-transpose.mlir

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -46,12 +46,12 @@ func.func @testTransposedReadWithMask(%maskRows: index, %maskCols: index) {
4646
vector.transfer_write %readTransposed, %outDyn[%c0, %c0] {in_bounds = [true, true]} : vector<[16]x[4]xf32>, memref<?x?xf32>
4747

4848
/// Print the input memref.
49-
vector.print str "Input memref:"
49+
vector.print str "Input memref:\n"
5050
%inUnranked = memref.cast %inDyn : memref<?x?xf32> to memref<*xf32>
5151
call @printMemrefF32(%inUnranked) : (memref<*xf32>) -> ()
5252

5353
/// Print the result memref.
54-
vector.print str "Masked transposed result:"
54+
vector.print str "Masked transposed result:\n"
5555
%outUnranked = memref.cast %outDyn : memref<?x?xf32> to memref<*xf32>
5656
call @printMemrefF32(%outUnranked) : (memref<*xf32>) -> ()
5757

@@ -84,12 +84,12 @@ func.func @testTransposedWriteWithMask(%maskRows: index, %maskCols: index) {
8484
: vector<[16]x[4]xf32>, memref<?x?xf32>
8585

8686
/// Print the input memref.
87-
vector.print str "Input memref:"
87+
vector.print str "Input memref:\n"
8888
%inUnranked = memref.cast %inDyn : memref<?x?xf32> to memref<*xf32>
8989
call @printMemrefF32(%inUnranked) : (memref<*xf32>) -> ()
9090

9191
/// Print the result memref.
92-
vector.print str "Masked transposed result:"
92+
vector.print str "Masked transposed result:\n"
9393
%outUnranked = memref.cast %outDyn : memref<?x?xf32> to memref<*xf32>
9494
call @printMemrefF32(%outUnranked) : (memref<*xf32>) -> ()
9595

‎mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f32.mlir

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -35,9 +35,9 @@ func.func @test_outerproduct_no_accumulator_4x4xf32() {
3535
// WITHOUT-ACC-NEXT: ( 0, 2, 4, 6
3636
// WITHOUT-ACC-NEXT: ( 0, 3, 6, 9
3737
// WITHOUT-ACC: TILE END
38-
vector.print str "TILE BEGIN"
38+
vector.print str "TILE BEGIN\n"
3939
vector.print %tile : vector<[4]x[4]xf32>
40-
vector.print str "TILE END"
40+
vector.print str "TILE END\n"
4141

4242
return
4343
}
@@ -60,9 +60,9 @@ func.func @test_outerproduct_with_accumulator_4x4xf32() {
6060
// WITH-ACC-NEXT: ( 10, 12, 14, 16
6161
// WITH-ACC-NEXT: ( 10, 13, 16, 19
6262
// WITH-ACC: TILE END
63-
vector.print str "TILE BEGIN"
63+
vector.print str "TILE BEGIN\n"
6464
vector.print %tile : vector<[4]x[4]xf32>
65-
vector.print str "TILE END"
65+
vector.print str "TILE END\n"
6666

6767
return
6868
}
@@ -91,9 +91,9 @@ func.func @test_masked_outerproduct_no_accumulator_4x4xf32() {
9191
// WITH-MASK-NEXT: ( 3, 6, 0, 0
9292
// WITH-MASK-NEXT: ( 0, 0, 0, 0
9393
// WITH-MASK: TILE END
94-
vector.print str "TILE BEGIN"
94+
vector.print str "TILE BEGIN\n"
9595
vector.print %tile : vector<[4]x[4]xf32>
96-
vector.print str "TILE END"
96+
vector.print str "TILE END\n"
9797

9898
return
9999
}
@@ -124,9 +124,9 @@ func.func @test_masked_outerproduct_with_accumulator_4x4xf32() {
124124
// WITH-MASK-AND-ACC-NEXT: ( 10, 10, 10, 10
125125
// WITH-MASK-AND-ACC-NEXT: ( 10, 10, 10, 10
126126
// WITH-MASK-AND-ACC: TILE END
127-
vector.print str "TILE BEGIN"
127+
vector.print str "TILE BEGIN\n"
128128
vector.print %tile : vector<[4]x[4]xf32>
129-
vector.print str "TILE END"
129+
vector.print str "TILE END\n"
130130

131131
return
132132
}

‎mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f64.mlir

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -40,9 +40,9 @@ func.func @test_outerproduct_no_accumulator_2x2xf64() {
4040
// CHECK-NEXT: ( 1, 2
4141
// CHECK-NEXT: ( 2, 4
4242
// CHECK: TILE END
43-
vector.print str "TILE BEGIN"
43+
vector.print str "TILE BEGIN\n"
4444
vector.print %tile : vector<[2]x[2]xf64>
45-
vector.print str "TILE END"
45+
vector.print str "TILE END\n"
4646

4747
return
4848
}
@@ -66,9 +66,9 @@ func.func @test_outerproduct_with_accumulator_2x2xf64() {
6666
// WITH-ACC-NEXT: ( 11, 12
6767
// WITH-ACC-NEXT: ( 12, 14
6868
// WITH-ACC: TILE END
69-
vector.print str "TILE BEGIN"
69+
vector.print str "TILE BEGIN\n"
7070
vector.print %tile : vector<[2]x[2]xf64>
71-
vector.print str "TILE END"
71+
vector.print str "TILE END\n"
7272

7373
return
7474
}
@@ -96,9 +96,9 @@ func.func @test_masked_outerproduct_no_accumulator_2x2xf64() {
9696
// WITH-MASK-NEXT: ( 1, 0
9797
// WITH-MASK-NEXT: ( 2, 0
9898
// WITH-MASK: TILE END
99-
vector.print str "TILE BEGIN"
99+
vector.print str "TILE BEGIN\n"
100100
vector.print %tile : vector<[2]x[2]xf64>
101-
vector.print str "TILE END"
101+
vector.print str "TILE END\n"
102102

103103
return
104104
}
@@ -127,9 +127,9 @@ func.func @test_masked_outerproduct_with_accumulator_2x2xf64() {
127127
// WITH-MASK-AND-ACC-NEXT: ( 11, 12
128128
// WITH-MASK-AND-ACC-NEXT: ( 10, 10
129129
// WITH-MASK-AND-ACC: TILE END
130-
vector.print str "TILE BEGIN"
130+
vector.print str "TILE BEGIN\n"
131131
vector.print %tile : vector<[2]x[2]xf64>
132-
vector.print str "TILE END"
132+
vector.print str "TILE END\n"
133133

134134
return
135135
}

‎mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-read-2d.mlir

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,7 @@ func.func @transfer_read_2d(%A : memref<?x?xf32>, %base1: index, %base2: index)
1414
%0 = vector.transfer_read %A[%base1, %base2], %pad {in_bounds=[true, true]} :
1515
memref<?x?xf32>, vector<[4]x[4]xf32>
1616

17-
vector.print str "TILE BEGIN:"
17+
vector.print str "TILE BEGIN:\n"
1818
vector.print %0: vector<[4]x[4]xf32>
1919

2020
return
@@ -27,7 +27,7 @@ func.func @transfer_read_2d_transposed(%A : memref<?x?xf32>, %base1: index, %bas
2727
{permutation_map = affine_map<(d0, d1) -> (d1, d0)>, in_bounds=[true, true]}
2828
: memref<?x?xf32>, vector<[4]x[4]xf32>
2929

30-
vector.print str "TILE BEGIN:"
30+
vector.print str "TILE BEGIN:\n"
3131
vector.print %0 : vector<[4]x[4]xf32>
3232

3333
return
@@ -42,7 +42,7 @@ func.func @transfer_read_2d_mask(%A : memref<?x?xf32>, %base1: index, %base2: in
4242
%0 = vector.transfer_read %A[%base1, %base2], %pad, %mask
4343
{in_bounds = [true, true]} : memref<?x?xf32>, vector<[4]x[4]xf32>
4444

45-
vector.print str "TILE BEGIN:"
45+
vector.print str "TILE BEGIN:\n"
4646
vector.print %0: vector<[4]x[4]xf32>
4747

4848
return
@@ -58,7 +58,7 @@ func.func @transfer_read_2d_mask_transposed(%A : memref<?x?xf32>, %base1: index,
5858
{permutation_map = affine_map<(d0, d1) -> (d1, d0)>, in_bounds=[true, true]}
5959
: memref<?x?xf32>, vector<[4]x[4]xf32>
6060

61-
vector.print str "TILE BEGIN:"
61+
vector.print str "TILE BEGIN:\n"
6262
vector.print %0: vector<[4]x[4]xf32>
6363

6464
return
@@ -73,7 +73,7 @@ func.func @transfer_read_2d_mask_non_zero_pad(%A : memref<?x?xf32>, %base1: inde
7373
%0 = vector.transfer_read %A[%base1, %base2], %pad, %mask
7474
{in_bounds = [true, true]} : memref<?x?xf32>, vector<[4]x[4]xf32>
7575

76-
vector.print str "TILE BEGIN:"
76+
vector.print str "TILE BEGIN:\n"
7777
vector.print %0: vector<[4]x[4]xf32>
7878

7979
return
@@ -89,7 +89,7 @@ func.func @transfer_read_2d_mask_non_zero_pad_transposed(%A : memref<?x?xf32>, %
8989
{permutation_map = affine_map<(d0, d1) -> (d1, d0)>, in_bounds=[true, true]}
9090
: memref<?x?xf32>, vector<[4]x[4]xf32>
9191

92-
vector.print str "TILE BEGIN:"
92+
vector.print str "TILE BEGIN:\n"
9393
vector.print %0: vector<[4]x[4]xf32>
9494

9595
return

‎mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-write-2d.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -51,7 +51,7 @@ func.func @transfer_write_2d_mask_transposed(%A : memref<?x?xf32>, %base1: index
5151
func.func @load_and_print(%A : memref<?x?xf32>, %base1: index, %base2: index) {
5252
%0 = vector.load %A[%base1, %base2] : memref<?x?xf32>, vector<[4]x[4]xf32>
5353

54-
vector.print str "TILE BEGIN:"
54+
vector.print str "TILE BEGIN:\n"
5555
vector.print %0: vector<[4]x[4]xf32>
5656

5757
return

‎mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transpose.mlir

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -51,9 +51,9 @@ func.func @entry() {
5151
// CHECK-NEXT: ( 2, 2, 2, 2
5252
// CHECK-NEXT: ( 3, 3, 3, 3
5353
// CHECK: TILE END
54-
vector.print str "TILE BEGIN"
54+
vector.print str "TILE BEGIN\n"
5555
vector.print %tile : vector<[4]x[4]xi32>
56-
vector.print str "TILE END"
56+
vector.print str "TILE END\n"
5757

5858
// Dump the transposed tile. The smallest SVL is 128-bits so the tile will be
5959
// at least 4x4xi32.
@@ -64,9 +64,9 @@ func.func @entry() {
6464
// CHECK-NEXT: ( 0, 1, 2, 3
6565
// CHECK-NEXT: ( 0, 1, 2, 3
6666
// CHECK: TILE END
67-
vector.print str "TILE BEGIN"
67+
vector.print str "TILE BEGIN\n"
6868
vector.print %transposed_tile : vector<[4]x[4]xi32>
69-
vector.print str "TILE END"
69+
vector.print str "TILE END\n"
7070

7171
return
7272
}

‎mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile_fill.mlir

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -23,9 +23,9 @@ func.func @entry() -> i32 {
2323
// CHECK-NEXT: ( 123, 123, 123, 123
2424
// CHECK-NEXT: ( 123, 123, 123, 123
2525
// CHECK: TILE END
26-
vector.print str "TILE BEGIN"
26+
vector.print str "TILE BEGIN\n"
2727
vector.print %tile : vector<[4]x[4]xi32>
28-
vector.print str "TILE END"
28+
vector.print str "TILE END\n"
2929

3030
%c0_i32 = arith.constant 0 : i32
3131
return %c0_i32 : i32

‎mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-load-store.mlir

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -255,19 +255,19 @@ func.func @load_store_two_za_s_tiles() -> i32 {
255255
// CHECK-NEXT: ( 1, 1, 1, 1
256256
// CHECK-NEXT: ( 1, 1, 1, 1
257257
// CHECK: TILE END
258-
vector.print str "TILE BEGIN"
258+
vector.print str "TILE BEGIN\n"
259259
scf.for %i = %c0 to %size_of_two_tiles step %svl_s {
260260
%av = vector.load %mem2[%i] : memref<?xi32>, vector<[4]xi32>
261261
vector.print %av : vector<[4]xi32>
262262

263263
%tileSizeMinusStep = arith.subi %size_of_tile, %svl_s : index
264264
%isNextTile = arith.cmpi eq, %i, %tileSizeMinusStep : index
265265
scf.if %isNextTile {
266-
vector.print str "TILE END"
267-
vector.print str "TILE BEGIN"
266+
vector.print str "TILE END\n"
267+
vector.print str "TILE BEGIN\n"
268268
}
269269
}
270-
vector.print str "TILE END"
270+
vector.print str "TILE END\n"
271271

272272
return %c0_i32 : i32
273273
}

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