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[GlobalISel] Combine (sext (trunc x)) to (sext_inreg x) (#131622)
Split from #131312
1 parent 6e3c24f commit c457c88

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6 files changed

+292
-13
lines changed

6 files changed

+292
-13
lines changed

‎llvm/include/llvm/Target/GlobalISel/Combine.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1522,7 +1522,7 @@ def extract_vector_element_build_vector_trunc8 : GICombineRule<
15221522

15231523
def sext_trunc : GICombineRule<
15241524
(defs root:$root, build_fn_matchinfo:$matchinfo),
1525-
(match (G_TRUNC $src, $x, (MIFlags NoSWrap)),
1525+
(match (G_TRUNC $src, $x),
15261526
(G_SEXT $root, $src),
15271527
[{ return Helper.matchSextOfTrunc(${root}, ${matchinfo}); }]),
15281528
(apply [{ Helper.applyBuildFnMO(${root}, ${matchinfo}); }])>;

‎llvm/lib/CodeGen/GlobalISel/CombinerHelperCasts.cpp

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -36,6 +36,26 @@ bool CombinerHelper::matchSextOfTrunc(const MachineOperand &MO,
3636
LLT DstTy = MRI.getType(Dst);
3737
LLT SrcTy = MRI.getType(Src);
3838

39+
// Combines without nsw trunc.
40+
if (!Trunc->getFlag(MachineInstr::NoSWrap)) {
41+
if (DstTy != SrcTy ||
42+
!isLegalOrBeforeLegalizer({TargetOpcode::G_SEXT_INREG, {DstTy, SrcTy}}))
43+
return false;
44+
45+
// Do this for 8 bit values and up. We don't want to do it for e.g. G_TRUNC
46+
// to i1.
47+
unsigned TruncWidth = MRI.getType(Trunc->getReg(0)).getScalarSizeInBits();
48+
if (TruncWidth < 8)
49+
return false;
50+
51+
MatchInfo = [=](MachineIRBuilder &B) {
52+
B.buildSExtInReg(Dst, Src, TruncWidth);
53+
};
54+
return true;
55+
}
56+
57+
// Combines for nsw trunc.
58+
3959
if (DstTy == SrcTy) {
4060
MatchInfo = [=](MachineIRBuilder &B) { B.buildCopy(Dst, Src); };
4161
return true;

‎llvm/test/CodeGen/AArch64/GlobalISel/combine-with-flags.mir renamed to ‎llvm/test/CodeGen/AArch64/GlobalISel/combine-ext-trunc.mir

Lines changed: 151 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -100,9 +100,8 @@ body: |
100100
; CHECK: liveins: $w0, $w1
101101
; CHECK-NEXT: {{ $}}
102102
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
103-
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = nuw G_TRUNC [[COPY]](s64)
104-
; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[TRUNC]](s32)
105-
; CHECK-NEXT: $x1 = COPY [[SEXT]](s64)
103+
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 32
104+
; CHECK-NEXT: $x1 = COPY [[SEXT_INREG]](s64)
106105
%0:_(s64) = COPY $x0
107106
%2:_(s32) = nuw G_TRUNC %0
108107
%3:_(s64) = G_SEXT %2
@@ -117,9 +116,8 @@ body: |
117116
; CHECK: liveins: $w0, $w1
118117
; CHECK-NEXT: {{ $}}
119118
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
120-
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
121-
; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[TRUNC]](s32)
122-
; CHECK-NEXT: $x1 = COPY [[SEXT]](s64)
119+
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 32
120+
; CHECK-NEXT: $x1 = COPY [[SEXT_INREG]](s64)
123121
%0:_(s64) = COPY $x0
124122
%2:_(s32) = G_TRUNC %0
125123
%3:_(s64) = G_SEXT %2
@@ -372,3 +370,150 @@ body: |
372370
%3:_(s32) = G_SEXT %2
373371
$w1 = COPY %3
374372
...
373+
---
374+
name: trunc_sext_i32_i16
375+
tracksRegLiveness: true
376+
body: |
377+
bb.0:
378+
liveins: $w0
379+
380+
; CHECK-LABEL: name: trunc_sext_i32_i16
381+
; CHECK: liveins: $w0
382+
; CHECK-NEXT: {{ $}}
383+
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
384+
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 16
385+
; CHECK-NEXT: $w0 = COPY [[SEXT_INREG]](s32)
386+
%0:_(s32) = COPY $w0
387+
%1:_(s16) = G_TRUNC %0
388+
%2:_(s32) = G_SEXT %1
389+
$w0 = COPY %2
390+
...
391+
---
392+
name: trunc_sext_i32_i1
393+
tracksRegLiveness: true
394+
body: |
395+
bb.0:
396+
liveins: $w0
397+
398+
; CHECK-LABEL: name: trunc_sext_i32_i1
399+
; CHECK: liveins: $w0
400+
; CHECK-NEXT: {{ $}}
401+
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
402+
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)
403+
; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[TRUNC]](s1)
404+
; CHECK-NEXT: $w0 = COPY [[SEXT]](s32)
405+
%0:_(s32) = COPY $w0
406+
%1:_(s1) = G_TRUNC %0
407+
%2:_(s32) = G_SEXT %1
408+
$w0 = COPY %2
409+
...
410+
---
411+
name: trunc_sext_i32_i2
412+
tracksRegLiveness: true
413+
body: |
414+
bb.0:
415+
liveins: $w0
416+
417+
; CHECK-LABEL: name: trunc_sext_i32_i2
418+
; CHECK: liveins: $w0
419+
; CHECK-NEXT: {{ $}}
420+
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
421+
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s2) = G_TRUNC [[COPY]](s32)
422+
; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[TRUNC]](s2)
423+
; CHECK-NEXT: $w0 = COPY [[SEXT]](s32)
424+
%0:_(s32) = COPY $w0
425+
%1:_(s2) = G_TRUNC %0
426+
%2:_(s32) = G_SEXT %1
427+
$w0 = COPY %2
428+
...
429+
---
430+
name: trunc_sext_i32_i8
431+
tracksRegLiveness: true
432+
body: |
433+
bb.0:
434+
liveins: $w0
435+
436+
; CHECK-LABEL: name: trunc_sext_i32_i8
437+
; CHECK: liveins: $w0
438+
; CHECK-NEXT: {{ $}}
439+
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
440+
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 8
441+
; CHECK-NEXT: $w0 = COPY [[SEXT_INREG]](s32)
442+
%0:_(s32) = COPY $w0
443+
%1:_(s8) = G_TRUNC %0
444+
%2:_(s32) = G_SEXT %1
445+
$w0 = COPY %2
446+
...
447+
---
448+
name: trunc_sext_i64_i32
449+
tracksRegLiveness: true
450+
body: |
451+
bb.0:
452+
liveins: $w0, $w1
453+
454+
; CHECK-LABEL: name: trunc_sext_i64_i32
455+
; CHECK: liveins: $w0, $w1
456+
; CHECK-NEXT: {{ $}}
457+
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
458+
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 32
459+
; CHECK-NEXT: $x0 = COPY [[SEXT_INREG]](s64)
460+
%0:_(s64) = COPY $x0
461+
%1:_(s32) = G_TRUNC %0
462+
%2:_(s64) = G_SEXT %1
463+
$x0 = COPY %2
464+
...
465+
---
466+
name: trunc_sext_v2i32_v2i16
467+
tracksRegLiveness: true
468+
body: |
469+
bb.0:
470+
liveins: $w0, $w1
471+
472+
; CHECK-LABEL: name: trunc_sext_v2i32_v2i16
473+
; CHECK: liveins: $w0, $w1
474+
; CHECK-NEXT: {{ $}}
475+
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $x0
476+
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(<2 x s32>) = G_SEXT_INREG [[COPY]], 16
477+
; CHECK-NEXT: $x0 = COPY [[SEXT_INREG]](<2 x s32>)
478+
%0:_(<2 x s32>) = COPY $x0
479+
%1:_(<2 x s16>) = G_TRUNC %0
480+
%2:_(<2 x s32>) = G_SEXT %1
481+
$x0 = COPY %2
482+
...
483+
---
484+
name: trunc_sext_v4i16_v4i8
485+
tracksRegLiveness: true
486+
body: |
487+
bb.0:
488+
liveins: $w0, $w1
489+
490+
; CHECK-LABEL: name: trunc_sext_v4i16_v4i8
491+
; CHECK: liveins: $w0, $w1
492+
; CHECK-NEXT: {{ $}}
493+
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $x0
494+
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(<4 x s16>) = G_SEXT_INREG [[COPY]], 8
495+
; CHECK-NEXT: $x0 = COPY [[SEXT_INREG]](<4 x s16>)
496+
%0:_(<4 x s16>) = COPY $x0
497+
%1:_(<4 x s8>) = G_TRUNC %0
498+
%2:_(<4 x s16>) = G_SEXT %1
499+
$x0 = COPY %2
500+
...
501+
---
502+
name: trunc_sext_mismatching_types
503+
tracksRegLiveness: true
504+
body: |
505+
bb.0:
506+
liveins: $w0, $w1
507+
508+
; CHECK-LABEL: name: trunc_sext_mismatching_types
509+
; CHECK: liveins: $w0, $w1
510+
; CHECK-NEXT: {{ $}}
511+
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
512+
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s64)
513+
; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[TRUNC]](s16)
514+
; CHECK-NEXT: $w0 = COPY [[SEXT]](s32)
515+
%0:_(s64) = COPY $x0
516+
%1:_(s16) = G_TRUNC %0
517+
%2:_(s32) = G_SEXT %1
518+
$w0 = COPY %2
519+
...

‎llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads.mir

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -469,10 +469,8 @@ body: |
469469
; CHECK-NEXT: {{ $}}
470470
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
471471
; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s64) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
472-
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[ZEXTLOAD]](s64)
473-
; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[TRUNC]](s32)
474472
; CHECK-NEXT: $x0 = COPY [[ZEXTLOAD]](s64)
475-
; CHECK-NEXT: $x1 = COPY [[SEXT]](s64)
473+
; CHECK-NEXT: $x1 = COPY [[ZEXTLOAD]](s64)
476474
%0:_(p0) = COPY $x0
477475
%1:_(s32) = G_ZEXTLOAD %0 :: (load (s8))
478476
%2:_(s64) = G_ZEXT %1

‎llvm/test/CodeGen/AMDGPU/GlobalISel/combine-trunc-sext.mir

Lines changed: 117 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,117 @@
1+
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2+
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=amdgpu-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck -check-prefix=GCN %s
3+
4+
---
5+
name: trunc_sext_i32_i16
6+
tracksRegLiveness: true
7+
body: |
8+
bb.0:
9+
liveins: $vgpr0
10+
11+
; GCN-LABEL: name: trunc_sext_i32_i16
12+
; GCN: liveins: $vgpr0
13+
; GCN-NEXT: {{ $}}
14+
; GCN-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
15+
; GCN-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 16
16+
; GCN-NEXT: $vgpr0 = COPY [[SEXT_INREG]](s32)
17+
%0:_(s32) = COPY $vgpr0
18+
%1:_(s16) = G_TRUNC %0
19+
%2:_(s32) = G_SEXT %1
20+
$vgpr0 = COPY %2
21+
...
22+
23+
---
24+
name: trunc_sext_i32_i8
25+
tracksRegLiveness: true
26+
body: |
27+
bb.0:
28+
liveins: $vgpr0
29+
30+
; GCN-LABEL: name: trunc_sext_i32_i8
31+
; GCN: liveins: $vgpr0
32+
; GCN-NEXT: {{ $}}
33+
; GCN-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
34+
; GCN-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 8
35+
; GCN-NEXT: $vgpr0 = COPY [[SEXT_INREG]](s32)
36+
%0:_(s32) = COPY $vgpr0
37+
%1:_(s8) = G_TRUNC %0
38+
%2:_(s32) = G_SEXT %1
39+
$vgpr0 = COPY %2
40+
...
41+
42+
---
43+
name: trunc_sext_i64_i32
44+
tracksRegLiveness: true
45+
body: |
46+
bb.0:
47+
liveins: $vgpr0_vgpr1
48+
49+
; GCN-LABEL: name: trunc_sext_i64_i32
50+
; GCN: liveins: $vgpr0_vgpr1
51+
; GCN-NEXT: {{ $}}
52+
; GCN-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
53+
; GCN-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 32
54+
; GCN-NEXT: $vgpr0_vgpr1 = COPY [[SEXT_INREG]](s64)
55+
%0:_(s64) = COPY $vgpr0_vgpr1
56+
%1:_(s32) = G_TRUNC %0
57+
%2:_(s64) = G_SEXT %1
58+
$vgpr0_vgpr1 = COPY %2
59+
...
60+
61+
---
62+
name: trunc_sext_v4i32_v4i16
63+
tracksRegLiveness: true
64+
body: |
65+
bb.0:
66+
liveins: $vgpr0_vgpr1_vgpr2_vgpr3
67+
68+
; GCN-LABEL: name: trunc_sext_v4i32_v4i16
69+
; GCN: liveins: $vgpr0_vgpr1_vgpr2_vgpr3
70+
; GCN-NEXT: {{ $}}
71+
; GCN-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
72+
; GCN-NEXT: [[SEXT_INREG:%[0-9]+]]:_(<4 x s32>) = G_SEXT_INREG [[COPY]], 16
73+
; GCN-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[SEXT_INREG]](<4 x s32>)
74+
%0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
75+
%1:_(<4 x s16>) = G_TRUNC %0
76+
%2:_(<4 x s32>) = G_SEXT %1
77+
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
78+
...
79+
80+
---
81+
name: trunc_sext_v4i16_v4i8
82+
tracksRegLiveness: true
83+
body: |
84+
bb.0:
85+
liveins: $vgpr0_vgpr1
86+
87+
; GCN-LABEL: name: trunc_sext_v4i16_v4i8
88+
; GCN: liveins: $vgpr0_vgpr1
89+
; GCN-NEXT: {{ $}}
90+
; GCN-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1
91+
; GCN-NEXT: [[SEXT_INREG:%[0-9]+]]:_(<4 x s16>) = G_SEXT_INREG [[COPY]], 8
92+
; GCN-NEXT: $vgpr0_vgpr1 = COPY [[SEXT_INREG]](<4 x s16>)
93+
%0:_(<4 x s16>) = COPY $vgpr0_vgpr1
94+
%1:_(<4 x s8>) = G_TRUNC %0
95+
%2:_(<4 x s16>) = G_SEXT %1
96+
$vgpr0_vgpr1 = COPY %2
97+
...
98+
99+
---
100+
name: trunc_sext_mismatching_types
101+
tracksRegLiveness: true
102+
body: |
103+
bb.0:
104+
liveins: $vgpr0_vgpr1
105+
106+
; GCN-LABEL: name: trunc_sext_mismatching_types
107+
; GCN: liveins: $vgpr0_vgpr1
108+
; GCN-NEXT: {{ $}}
109+
; GCN-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
110+
; GCN-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s64)
111+
; GCN-NEXT: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[TRUNC]](s16)
112+
; GCN-NEXT: $vgpr0 = COPY [[SEXT]](s32)
113+
%0:_(s64) = COPY $vgpr0_vgpr1
114+
%1:_(s16) = G_TRUNC %0
115+
%2:_(s32) = G_SEXT %1
116+
$vgpr0 = COPY %2
117+
...

‎llvm/test/CodeGen/RISCV/GlobalISel/combine.mir

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -8,9 +8,8 @@ body: |
88
99
; RV64-LABEL: name: nneg_zext
1010
; RV64: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
11-
; RV64-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
12-
; RV64-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[TRUNC]](s32)
13-
; RV64-NEXT: $x10 = COPY [[SEXT]](s64)
11+
; RV64-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 32
12+
; RV64-NEXT: $x10 = COPY [[SEXT_INREG]](s64)
1413
; RV64-NEXT: PseudoRET implicit $x10
1514
%0:_(s64) = COPY $x10
1615
%2:_(s32) = G_TRUNC %0

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