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[AMDGPU] Disable V_MAD_U64_U32/V_MAD_I64_I32 workaround for GFX11.5 (#79460)
The hardware bug only affects GFX11.0.x.
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3 files changed

+362
-184
lines changed

3 files changed

+362
-184
lines changed

‎llvm/lib/Target/AMDGPU/AMDGPU.td

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1445,13 +1445,13 @@ def FeatureISAVersion11_Common : FeatureSet<
14451445
FeatureFlatAtomicFaddF32Inst,
14461446
FeatureImageInsts,
14471447
FeaturePackedTID,
1448-
FeatureVcmpxPermlaneHazard,
1449-
FeatureMADIntraFwdBug]>;
1448+
FeatureVcmpxPermlaneHazard]>;
14501449

14511450
def FeatureISAVersion11_0_Common : FeatureSet<
14521451
!listconcat(FeatureISAVersion11_Common.Features,
14531452
[FeatureMSAALoadDstSelBug,
1454-
FeatureVALUTransUseHazard])>;
1453+
FeatureVALUTransUseHazard,
1454+
FeatureMADIntraFwdBug])>;
14551455

14561456
def FeatureISAVersion11_0_0 : FeatureSet<
14571457
!listconcat(FeatureISAVersion11_0_Common.Features,

‎llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-mad_64_32.mir

Lines changed: 36 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,7 @@
11
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
22
# RUN: llc -mtriple=amdgcn -mcpu=gfx1030 -run-pass=instruction-select -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=GFX10 %s
3-
# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=instruction-select -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=GFX11 %s
3+
# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=instruction-select -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=GFX1100 %s
4+
# RUN: llc -mtriple=amdgcn -mcpu=gfx1150 -run-pass=instruction-select -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=GFX1150 %s
45
# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -run-pass=instruction-select -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=GFX12 %s
56

67
---
@@ -20,14 +21,23 @@ body: |
2021
; GFX10-NEXT: [[V_MAD_U64_U32_e64_:%[0-9]+]]:vreg_64, [[V_MAD_U64_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_MAD_U64_U32_e64 [[COPY]], [[COPY1]], [[COPY2]], 0, implicit $exec
2122
; GFX10-NEXT: S_ENDPGM 0, implicit [[V_MAD_U64_U32_e64_]], implicit [[V_MAD_U64_U32_e64_1]]
2223
;
23-
; GFX11-LABEL: name: mad_u64_u32_vvv
24-
; GFX11: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
25-
; GFX11-NEXT: {{ $}}
26-
; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
27-
; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
28-
; GFX11-NEXT: [[COPY2:%[0-9]+]]:vreg_64 = COPY $vgpr3
29-
; GFX11-NEXT: [[V_MAD_U64_U32_gfx11_e64_:%[0-9]+]]:vreg_64, [[V_MAD_U64_U32_gfx11_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_MAD_U64_U32_gfx11_e64 [[COPY]], [[COPY1]], [[COPY2]], 0, implicit $exec
30-
; GFX11-NEXT: S_ENDPGM 0, implicit [[V_MAD_U64_U32_gfx11_e64_]], implicit [[V_MAD_U64_U32_gfx11_e64_1]]
24+
; GFX1100-LABEL: name: mad_u64_u32_vvv
25+
; GFX1100: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
26+
; GFX1100-NEXT: {{ $}}
27+
; GFX1100-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
28+
; GFX1100-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
29+
; GFX1100-NEXT: [[COPY2:%[0-9]+]]:vreg_64 = COPY $vgpr3
30+
; GFX1100-NEXT: [[V_MAD_U64_U32_gfx11_e64_:%[0-9]+]]:vreg_64, [[V_MAD_U64_U32_gfx11_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_MAD_U64_U32_gfx11_e64 [[COPY]], [[COPY1]], [[COPY2]], 0, implicit $exec
31+
; GFX1100-NEXT: S_ENDPGM 0, implicit [[V_MAD_U64_U32_gfx11_e64_]], implicit [[V_MAD_U64_U32_gfx11_e64_1]]
32+
;
33+
; GFX1150-LABEL: name: mad_u64_u32_vvv
34+
; GFX1150: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
35+
; GFX1150-NEXT: {{ $}}
36+
; GFX1150-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
37+
; GFX1150-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
38+
; GFX1150-NEXT: [[COPY2:%[0-9]+]]:vreg_64 = COPY $vgpr3
39+
; GFX1150-NEXT: [[V_MAD_U64_U32_e64_:%[0-9]+]]:vreg_64, [[V_MAD_U64_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_MAD_U64_U32_e64 [[COPY]], [[COPY1]], [[COPY2]], 0, implicit $exec
40+
; GFX1150-NEXT: S_ENDPGM 0, implicit [[V_MAD_U64_U32_e64_]], implicit [[V_MAD_U64_U32_e64_1]]
3141
;
3242
; GFX12-LABEL: name: mad_u64_u32_vvv
3343
; GFX12: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
@@ -63,14 +73,23 @@ body: |
6373
; GFX10-NEXT: [[V_MAD_I64_I32_e64_:%[0-9]+]]:vreg_64, [[V_MAD_I64_I32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_MAD_I64_I32_e64 [[COPY]], [[COPY1]], [[COPY2]], 0, implicit $exec
6474
; GFX10-NEXT: S_ENDPGM 0, implicit [[V_MAD_I64_I32_e64_]], implicit [[V_MAD_I64_I32_e64_1]]
6575
;
66-
; GFX11-LABEL: name: mad_i64_i32_vvv
67-
; GFX11: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
68-
; GFX11-NEXT: {{ $}}
69-
; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
70-
; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
71-
; GFX11-NEXT: [[COPY2:%[0-9]+]]:vreg_64 = COPY $vgpr3
72-
; GFX11-NEXT: [[V_MAD_I64_I32_gfx11_e64_:%[0-9]+]]:vreg_64, [[V_MAD_I64_I32_gfx11_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_MAD_I64_I32_gfx11_e64 [[COPY]], [[COPY1]], [[COPY2]], 0, implicit $exec
73-
; GFX11-NEXT: S_ENDPGM 0, implicit [[V_MAD_I64_I32_gfx11_e64_]], implicit [[V_MAD_I64_I32_gfx11_e64_1]]
76+
; GFX1100-LABEL: name: mad_i64_i32_vvv
77+
; GFX1100: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
78+
; GFX1100-NEXT: {{ $}}
79+
; GFX1100-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
80+
; GFX1100-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
81+
; GFX1100-NEXT: [[COPY2:%[0-9]+]]:vreg_64 = COPY $vgpr3
82+
; GFX1100-NEXT: [[V_MAD_I64_I32_gfx11_e64_:%[0-9]+]]:vreg_64, [[V_MAD_I64_I32_gfx11_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_MAD_I64_I32_gfx11_e64 [[COPY]], [[COPY1]], [[COPY2]], 0, implicit $exec
83+
; GFX1100-NEXT: S_ENDPGM 0, implicit [[V_MAD_I64_I32_gfx11_e64_]], implicit [[V_MAD_I64_I32_gfx11_e64_1]]
84+
;
85+
; GFX1150-LABEL: name: mad_i64_i32_vvv
86+
; GFX1150: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
87+
; GFX1150-NEXT: {{ $}}
88+
; GFX1150-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
89+
; GFX1150-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
90+
; GFX1150-NEXT: [[COPY2:%[0-9]+]]:vreg_64 = COPY $vgpr3
91+
; GFX1150-NEXT: [[V_MAD_I64_I32_e64_:%[0-9]+]]:vreg_64, [[V_MAD_I64_I32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_MAD_I64_I32_e64 [[COPY]], [[COPY1]], [[COPY2]], 0, implicit $exec
92+
; GFX1150-NEXT: S_ENDPGM 0, implicit [[V_MAD_I64_I32_e64_]], implicit [[V_MAD_I64_I32_e64_1]]
7493
;
7594
; GFX12-LABEL: name: mad_i64_i32_vvv
7695
; GFX12: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3

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