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[VPlan] Check successors in VPlan to check if scalar epi required (NFC)
Now that the branches to the scalar epilogue are modeled in VPlan directly, check the VPlan to see if a scalar epilogue is required. Preparation for #100658.
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2 files changed

+11
-15
lines changed

2 files changed

+11
-15
lines changed

llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -8545,13 +8545,18 @@ static void addCanonicalIVRecipes(VPlan &Plan, Type *IdxTy, bool HasNUW,
85458545
static void addUsersInExitBlock(
85468546
Loop *OrigLoop, VPRecipeBuilder &Builder, VPlan &Plan,
85478547
const MapVector<PHINode *, InductionDescriptor> &Inductions) {
8548-
BasicBlock *ExitBB = OrigLoop->getUniqueExitBlock();
8549-
BasicBlock *ExitingBB = OrigLoop->getExitingBlock();
8550-
// Only handle single-exit loops with unique exit blocks for now.
8551-
if (!ExitBB || !ExitBB->getSinglePredecessor() || !ExitingBB)
8548+
auto MiddleVPBB =
8549+
cast<VPBasicBlock>(Plan.getVectorLoopRegion()->getSingleSuccessor());
8550+
// No edge from the middle block to the unique exit block has been inserted
8551+
// and there is nothing to fix from vector loop; phis should have incoming
8552+
// from scalar loop only.
8553+
if (MiddleVPBB->getNumSuccessors() != 2)
85528554
return;
85538555

85548556
// Introduce VPUsers modeling the exit values.
8557+
BasicBlock *ExitBB =
8558+
cast<VPIRBasicBlock>(MiddleVPBB->getSuccessors()[0])->getIRBasicBlock();
8559+
BasicBlock *ExitingBB = OrigLoop->getExitingBlock();
85558560
for (PHINode &ExitPhi : ExitBB->phis()) {
85568561
Value *IncomingValue =
85578562
ExitPhi.getIncomingValueForBlock(ExitingBB);
@@ -8777,13 +8782,8 @@ LoopVectorizationPlanner::tryToBuildVPlanWithVPRecipes(VFRange &Range) {
87778782
// After here, VPBB should not be used.
87788783
VPBB = nullptr;
87798784

8780-
if (CM.requiresScalarEpilogue(Range)) {
8781-
// No edge from the middle block to the unique exit block has been inserted
8782-
// and there is nothing to fix from vector loop; phis should have incoming
8783-
// from scalar loop only.
8784-
} else
8785-
addUsersInExitBlock(OrigLoop, RecipeBuilder, *Plan,
8786-
Legal->getInductionVars());
8785+
addUsersInExitBlock(OrigLoop, RecipeBuilder, *Plan,
8786+
Legal->getInductionVars());
87878787

87888788
assert(isa<VPRegionBlock>(Plan->getVectorLoopRegion()) &&
87898789
!Plan->getVectorLoopRegion()->getEntryBasicBlock()->empty() &&

llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -52,8 +52,6 @@ define void @vector_reverse_i64(ptr nocapture noundef writeonly %A, ptr nocaptur
5252
; CHECK-NEXT: LV: Scalarizing: %arrayidx3 = getelementptr inbounds i32, ptr %A, i64 %idxprom
5353
; CHECK-NEXT: LV: Scalarizing: %cmp = icmp ugt i64 %indvars.iv, 1
5454
; CHECK-NEXT: LV: Scalarizing: %indvars.iv.next = add nsw i64 %indvars.iv, -1
55-
; CHECK-NEXT: LV: Loop does not require scalar epilogue
56-
; CHECK-NEXT: LV: Loop does not require scalar epilogue
5755
; CHECK-NEXT: VPlan 'Initial VPlan for VF={vscale x 4},UF>=1' {
5856
; CHECK-NEXT: Live-in vp<%0> = VF * UF
5957
; CHECK-NEXT: Live-in vp<%1> = vector-trip-count
@@ -257,8 +255,6 @@ define void @vector_reverse_f32(ptr nocapture noundef writeonly %A, ptr nocaptur
257255
; CHECK-NEXT: LV: Scalarizing: %arrayidx3 = getelementptr inbounds float, ptr %A, i64 %idxprom
258256
; CHECK-NEXT: LV: Scalarizing: %cmp = icmp ugt i64 %indvars.iv, 1
259257
; CHECK-NEXT: LV: Scalarizing: %indvars.iv.next = add nsw i64 %indvars.iv, -1
260-
; CHECK-NEXT: LV: Loop does not require scalar epilogue
261-
; CHECK-NEXT: LV: Loop does not require scalar epilogue
262258
; CHECK-NEXT: VPlan 'Initial VPlan for VF={vscale x 4},UF>=1' {
263259
; CHECK-NEXT: Live-in vp<%0> = VF * UF
264260
; CHECK-NEXT: Live-in vp<%1> = vector-trip-count

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