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[InstCombine] Handle IsInf/IsZero idioms (#80607)
This patch does the following folds: ``` icmp eq/ne (bitcast X to int), (bitcast +/-inf to int) -> llvm.is.fpclass(X, (~)fcPosInf/fcNegInf) icmp eq/ne (bitcast X to int), (bitcast +0/-0 to int) -> llvm.is.fpclass(X, (~)fcPosZero/fcNegZero) ``` Alive2: https://alive2.llvm.org/ce/z/JJmEE9
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2 files changed

+169
-11
lines changed

‎llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp

Lines changed: 22 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -3229,16 +3229,16 @@ Instruction *InstCombinerImpl::foldICmpBitCast(ICmpInst &Cmp) {
32293229
if (Cmp.isEquality() && match(Op1, m_Zero()))
32303230
return new ICmpInst(Pred, X, ConstantInt::getNullValue(X->getType()));
32313231

3232-
// If this is a sign-bit test of a bitcast of a casted FP value, eliminate
3233-
// the FP extend/truncate because that cast does not change the sign-bit.
3234-
// This is true for all standard IEEE-754 types and the X86 80-bit type.
3235-
// The sign-bit is always the most significant bit in those types.
32363232
const APInt *C;
32373233
bool TrueIfSigned;
3238-
if (match(Op1, m_APInt(C)) && Bitcast->hasOneUse() &&
3239-
isSignBitCheck(Pred, *C, TrueIfSigned)) {
3240-
if (match(BCSrcOp, m_FPExt(m_Value(X))) ||
3241-
match(BCSrcOp, m_FPTrunc(m_Value(X)))) {
3234+
if (match(Op1, m_APInt(C)) && Bitcast->hasOneUse()) {
3235+
// If this is a sign-bit test of a bitcast of a casted FP value, eliminate
3236+
// the FP extend/truncate because that cast does not change the sign-bit.
3237+
// This is true for all standard IEEE-754 types and the X86 80-bit type.
3238+
// The sign-bit is always the most significant bit in those types.
3239+
if (isSignBitCheck(Pred, *C, TrueIfSigned) &&
3240+
(match(BCSrcOp, m_FPExt(m_Value(X))) ||
3241+
match(BCSrcOp, m_FPTrunc(m_Value(X))))) {
32423242
// (bitcast (fpext/fptrunc X)) to iX) < 0 --> (bitcast X to iY) < 0
32433243
// (bitcast (fpext/fptrunc X)) to iX) > -1 --> (bitcast X to iY) > -1
32443244
Type *XType = X->getType();
@@ -3257,6 +3257,20 @@ Instruction *InstCombinerImpl::foldICmpBitCast(ICmpInst &Cmp) {
32573257
ConstantInt::getAllOnesValue(NewType));
32583258
}
32593259
}
3260+
3261+
// icmp eq/ne (bitcast X to int), special fp -> llvm.is.fpclass(X, class)
3262+
Type *FPType = SrcType->getScalarType();
3263+
if (!Cmp.getParent()->getParent()->hasFnAttribute(
3264+
Attribute::NoImplicitFloat) &&
3265+
Cmp.isEquality() && FPType->isIEEELikeFPTy()) {
3266+
FPClassTest Mask = APFloat(FPType->getFltSemantics(), *C).classify();
3267+
if (Mask & (fcInf | fcZero)) {
3268+
if (Pred == ICmpInst::ICMP_NE)
3269+
Mask = ~Mask;
3270+
return replaceInstUsesWith(Cmp,
3271+
Builder.createIsFPClass(BCSrcOp, Mask));
3272+
}
3273+
}
32603274
}
32613275
}
32623276

‎llvm/test/Transforms/InstCombine/fpclass-check-idioms.ll

Lines changed: 147 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -40,13 +40,11 @@ define i1 @f64_fcnan_fcinf(double %a) {
4040
ret i1 %cmp
4141
}
4242

43-
; TODO: handle more fpclass check idioms
4443
define i1 @f32_fcinf(float %a) {
4544
; CHECK-LABEL: define i1 @f32_fcinf(
4645
; CHECK-SAME: float [[A:%.*]]) {
4746
; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[A]])
48-
; CHECK-NEXT: [[AND:%.*]] = bitcast float [[TMP1]] to i32
49-
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 2139095040
47+
; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq float [[TMP1]], 0x7FF0000000000000
5048
; CHECK-NEXT: ret i1 [[CMP]]
5149
;
5250
%i32 = bitcast float %a to i32
@@ -55,6 +53,63 @@ define i1 @f32_fcinf(float %a) {
5553
ret i1 %cmp
5654
}
5755

56+
define i1 @f32_fcposinf(float %a) {
57+
; CHECK-LABEL: define i1 @f32_fcposinf(
58+
; CHECK-SAME: float [[A:%.*]]) {
59+
; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq float [[A]], 0x7FF0000000000000
60+
; CHECK-NEXT: ret i1 [[CMP]]
61+
;
62+
%i32 = bitcast float %a to i32
63+
%cmp = icmp eq i32 %i32, 2139095040
64+
ret i1 %cmp
65+
}
66+
67+
define i1 @f32_fcneginf(float %a) {
68+
; CHECK-LABEL: define i1 @f32_fcneginf(
69+
; CHECK-SAME: float [[A:%.*]]) {
70+
; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq float [[A]], 0xFFF0000000000000
71+
; CHECK-NEXT: ret i1 [[CMP]]
72+
;
73+
%i32 = bitcast float %a to i32
74+
%cmp = icmp eq i32 %i32, 4286578688
75+
ret i1 %cmp
76+
}
77+
78+
define i1 @f32_fcposzero(float %a) {
79+
; CHECK-LABEL: define i1 @f32_fcposzero(
80+
; CHECK-SAME: float [[A:%.*]]) {
81+
; CHECK-NEXT: [[CMP:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 64)
82+
; CHECK-NEXT: ret i1 [[CMP]]
83+
;
84+
%i32 = bitcast float %a to i32
85+
%cmp = icmp eq i32 %i32, 0
86+
ret i1 %cmp
87+
}
88+
89+
define i1 @f32_fcnegzero(float %a) {
90+
; CHECK-LABEL: define i1 @f32_fcnegzero(
91+
; CHECK-SAME: float [[A:%.*]]) {
92+
; CHECK-NEXT: [[CMP:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 32)
93+
; CHECK-NEXT: ret i1 [[CMP]]
94+
;
95+
%i32 = bitcast float %a to i32
96+
%cmp = icmp eq i32 %i32, 2147483648
97+
ret i1 %cmp
98+
}
99+
100+
define i1 @f32_fczero(float %a) {
101+
; CHECK-LABEL: define i1 @f32_fczero(
102+
; CHECK-SAME: float [[A:%.*]]) {
103+
; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq float [[A]], 0.000000e+00
104+
; CHECK-NEXT: ret i1 [[CMP]]
105+
;
106+
%i32 = bitcast float %a to i32
107+
%and = and i32 %i32, 2147483647
108+
%cmp = icmp eq i32 %and, 0
109+
ret i1 %cmp
110+
}
111+
112+
; TODO: handle more fpclass check idioms
58113
define i1 @f32_fcnan(float %a) {
59114
; CHECK-LABEL: define i1 @f32_fcnan(
60115
; CHECK-SAME: float [[A:%.*]]) {
@@ -101,6 +156,19 @@ define <2 x i1> @f32_fcnan_fcinf_vec(<2 x float> %a) {
101156
ret <2 x i1> %cmp
102157
}
103158

159+
define <2 x i1> @f32_fcinf_vec(<2 x float> %a) {
160+
; CHECK-LABEL: define <2 x i1> @f32_fcinf_vec(
161+
; CHECK-SAME: <2 x float> [[A:%.*]]) {
162+
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x float> @llvm.fabs.v2f32(<2 x float> [[A]])
163+
; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq <2 x float> [[TMP1]], <float 0x7FF0000000000000, float 0x7FF0000000000000>
164+
; CHECK-NEXT: ret <2 x i1> [[CMP]]
165+
;
166+
%i32 = bitcast <2 x float> %a to <2 x i32>
167+
%and = and <2 x i32> %i32, <i32 2147483647, i32 2147483647>
168+
%cmp = icmp eq <2 x i32> %and, <i32 2139095040, i32 2139095040>
169+
ret <2 x i1> %cmp
170+
}
171+
104172
; Negative tests
105173

106174
define i1 @f32_fcnan_fcinf_wrong_mask1(float %a) {
@@ -158,6 +226,18 @@ define i1 @f32_fcnan_fcinf_wrong_pred(float %a) {
158226
ret i1 %cmp
159227
}
160228

229+
define i1 @f32_fcposzero_wrong_pred(float %a) {
230+
; CHECK-LABEL: define i1 @f32_fcposzero_wrong_pred(
231+
; CHECK-SAME: float [[A:%.*]]) {
232+
; CHECK-NEXT: [[I32:%.*]] = bitcast float [[A]] to i32
233+
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I32]], 0
234+
; CHECK-NEXT: ret i1 [[CMP]]
235+
;
236+
%i32 = bitcast float %a to i32
237+
%cmp = icmp slt i32 %i32, 0
238+
ret i1 %cmp
239+
}
240+
161241
define i1 @f32_fcnan_fcinf_wrong_type1(<2 x float> %a) {
162242
; CHECK-LABEL: define i1 @f32_fcnan_fcinf_wrong_type1(
163243
; CHECK-SAME: <2 x float> [[A:%.*]]) {
@@ -172,6 +252,18 @@ define i1 @f32_fcnan_fcinf_wrong_type1(<2 x float> %a) {
172252
ret i1 %cmp
173253
}
174254

255+
define i1 @f32_fcposinf_wrong_type1(<2 x float> %a) {
256+
; CHECK-LABEL: define i1 @f32_fcposinf_wrong_type1(
257+
; CHECK-SAME: <2 x float> [[A:%.*]]) {
258+
; CHECK-NEXT: [[I64:%.*]] = bitcast <2 x float> [[A]] to i64
259+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[I64]], 2139095040
260+
; CHECK-NEXT: ret i1 [[CMP]]
261+
;
262+
%i64 = bitcast <2 x float> %a to i64
263+
%cmp = icmp eq i64 %i64, 2139095040
264+
ret i1 %cmp
265+
}
266+
175267
define i1 @f32_fcnan_fcinf_wrong_type2(x86_fp80 %a) {
176268
; CHECK-LABEL: define i1 @f32_fcnan_fcinf_wrong_type2(
177269
; CHECK-SAME: x86_fp80 [[A:%.*]]) {
@@ -186,6 +278,18 @@ define i1 @f32_fcnan_fcinf_wrong_type2(x86_fp80 %a) {
186278
ret i1 %cmp
187279
}
188280

281+
define i1 @f32_fcposzero_wrong_type2(x86_fp80 %a) {
282+
; CHECK-LABEL: define i1 @f32_fcposzero_wrong_type2(
283+
; CHECK-SAME: x86_fp80 [[A:%.*]]) {
284+
; CHECK-NEXT: [[I80:%.*]] = bitcast x86_fp80 [[A]] to i80
285+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i80 [[I80]], 0
286+
; CHECK-NEXT: ret i1 [[CMP]]
287+
;
288+
%i80 = bitcast x86_fp80 %a to i80
289+
%cmp = icmp eq i80 %i80, 0
290+
ret i1 %cmp
291+
}
292+
189293
define i1 @f32_fcnan_fcinf_noimplicitfloat(float %a) #0 {
190294
; CHECK-LABEL: define i1 @f32_fcnan_fcinf_noimplicitfloat(
191295
; CHECK-SAME: float [[A:%.*]]) #[[ATTR1:[0-9]+]] {
@@ -200,4 +304,44 @@ define i1 @f32_fcnan_fcinf_noimplicitfloat(float %a) #0 {
200304
ret i1 %cmp
201305
}
202306

307+
define i1 @f32_fcposinf_noimplicitfloat(float %a) #0 {
308+
; CHECK-LABEL: define i1 @f32_fcposinf_noimplicitfloat(
309+
; CHECK-SAME: float [[A:%.*]]) #[[ATTR1]] {
310+
; CHECK-NEXT: [[I32:%.*]] = bitcast float [[A]] to i32
311+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[I32]], 2139095040
312+
; CHECK-NEXT: ret i1 [[CMP]]
313+
;
314+
%i32 = bitcast float %a to i32
315+
%cmp = icmp eq i32 %i32, 2139095040
316+
ret i1 %cmp
317+
}
318+
319+
define i1 @f32_fcposnan(float %a) {
320+
; CHECK-LABEL: define i1 @f32_fcposnan(
321+
; CHECK-SAME: float [[A:%.*]]) {
322+
; CHECK-NEXT: [[I32:%.*]] = bitcast float [[A]] to i32
323+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[I32]], 2139095041
324+
; CHECK-NEXT: ret i1 [[CMP]]
325+
;
326+
%i32 = bitcast float %a to i32
327+
%cmp = icmp eq i32 %i32, 2139095041
328+
ret i1 %cmp
329+
}
330+
331+
define i1 @f32_fcposinf_multiuse(float %a) {
332+
; CHECK-LABEL: define i1 @f32_fcposinf_multiuse(
333+
; CHECK-SAME: float [[A:%.*]]) {
334+
; CHECK-NEXT: [[I32:%.*]] = bitcast float [[A]] to i32
335+
; CHECK-NEXT: call void @usei32(i32 [[I32]])
336+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[I32]], 2139095040
337+
; CHECK-NEXT: ret i1 [[CMP]]
338+
;
339+
%i32 = bitcast float %a to i32
340+
call void @usei32(i32 %i32)
341+
%cmp = icmp eq i32 %i32, 2139095040
342+
ret i1 %cmp
343+
}
344+
345+
declare void @usei32(i32)
346+
203347
attributes #0 = { noimplicitfloat }

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