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[Sparc] Replace CMP instructions with InstAlias (NFCI) (#66859)
According to the manual `cmp` is a synthetic instruction that maps to `subcc` with %g0 output operand. Make it so. The change required some changes to instruction selection process. The reason is that the old CMP did not have an output operand, while setcc does have one. We want that operand to be %g0. The easiest way to achieve this seems to be to mark SUBCC with hasPostISelHook and replace the output operand with %g0 in the corresponding TargetLowering method.
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5 files changed

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llvm/lib/Target/Sparc/SparcISelLowering.cpp

+8
Original file line numberDiff line numberDiff line change
@@ -3642,3 +3642,11 @@ void SparcTargetLowering::insertSSPDeclarations(Module &M) const {
36423642
if (!Subtarget->isTargetLinux())
36433643
return TargetLowering::insertSSPDeclarations(M);
36443644
}
3645+
3646+
void SparcTargetLowering::AdjustInstrPostInstrSelection(MachineInstr &MI,
3647+
SDNode *Node) const {
3648+
assert(MI.getOpcode() == SP::SUBCCrr || MI.getOpcode() == SP::SUBCCri);
3649+
// If the result is dead, replace it with %g0.
3650+
if (!Node->hasAnyUseOfValue(0))
3651+
MI.getOperand(0).setReg(SP::G0);
3652+
}

llvm/lib/Target/Sparc/SparcISelLowering.h

+4-1
Original file line numberDiff line numberDiff line change
@@ -222,7 +222,10 @@ namespace llvm {
222222

223223
MachineBasicBlock *expandSelectCC(MachineInstr &MI, MachineBasicBlock *BB,
224224
unsigned BROpcode) const;
225+
226+
void AdjustInstrPostInstrSelection(MachineInstr &MI,
227+
SDNode *Node) const override;
225228
};
226229
} // end namespace llvm
227230

228-
#endif // SPARC_ISELLOWERING_H
231+
#endif // LLVM_LIB_TARGET_SPARC_SPARCISELLOWERING_H

llvm/lib/Target/Sparc/SparcInstr64Bit.td

+3-2
Original file line numberDiff line numberDiff line change
@@ -65,6 +65,7 @@ def : Pat<(i64 0), (COPY (i64 G0))>,
6565
Requires<[Is64Bit]>;
6666

6767
// The ALU instructions want their simm13 operands as i32 immediates.
68+
// FIXME: This is no longer true, they are now pointer-sized.
6869
def as_i32imm : SDNodeXForm<imm, [{
6970
return CurDAG->getTargetConstant(N->getSExtValue(), SDLoc(N), MVT::i32);
7071
}]>;
@@ -173,8 +174,8 @@ def TLS_ADDXrr : F3_1<2, 0b000000, (outs I64Regs:$rd),
173174
(tlsadd i64:$rs1, i64:$rs2, tglobaltlsaddr:$sym))]>;
174175
}
175176

176-
def : Pat<(SPcmpicc i64:$a, i64:$b), (CMPrr $a, $b)>;
177-
def : Pat<(SPcmpicc i64:$a, (i64 simm13:$b)), (CMPri $a, (as_i32imm $b))>;
177+
def : Pat<(SPcmpicc i64:$lhs, i64:$rhs), (SUBCCrr $lhs, $rhs)>;
178+
def : Pat<(SPcmpicc i64:$lhs, (i64 simm13:$rhs)), (SUBCCri $lhs, imm:$rhs)>;
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def : Pat<(i64 (ctpop i64:$src)), (POPCrr $src)>;
179180

180181
} // Predicates = [Is64Bit]

llvm/lib/Target/Sparc/SparcInstrAliases.td

+5-2
Original file line numberDiff line numberDiff line change
@@ -413,10 +413,13 @@ defm : reg_cond_alias<"gez", 0b111>;
413413
// non-alias form, except for the most obvious and clarifying aliases: cmp, jmp,
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// call, tst, ret, retl.
415415

416-
// Note: cmp is handled in SparcInstrInfo.
417-
// jmp/call/ret/retl have special case handling for output in
416+
// Note: jmp/call/ret/retl have special case handling for output in
418417
// SparcInstPrinter.cpp
419418

419+
// cmp rs1, reg_or_imm -> subcc rs1, reg_or_imm, %g0
420+
def : InstAlias<"cmp $rs1, $rs2", (SUBCCrr G0, IntRegs:$rs1, IntRegs:$rs2)>;
421+
def : InstAlias<"cmp $rs1, $imm", (SUBCCri G0, IntRegs:$rs1, simm13Op:$imm)>;
422+
420423
// jmp addr -> jmpl addr, %g0
421424
def : InstAlias<"jmp $addr", (JMPLrr G0, MEMrr:$addr), 0>;
422425
def : InstAlias<"jmp $addr", (JMPLri G0, MEMri:$addr), 0>;

llvm/lib/Target/Sparc/SparcInstrInfo.td

+4-12
Original file line numberDiff line numberDiff line change
@@ -222,6 +222,7 @@ def calltarget : Operand<i32> {
222222
}
223223

224224
def simm13Op : Operand<iPTR> {
225+
let OperandType = "OPERAND_IMMEDIATE";
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let DecoderMethod = "DecodeSIMM13";
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let EncoderMethod = "getSImm13OpValue";
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}
@@ -829,23 +830,14 @@ defm SUB : F3_12 <"sub" , 0b000100, sub, IntRegs, i32, simm13Op>;
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let Uses = [ICC], Defs = [ICC] in
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defm SUBE : F3_12 <"subxcc" , 0b011100, sube, IntRegs, i32, simm13Op>;
831832

832-
let Defs = [ICC] in
833+
let Defs = [ICC], hasPostISelHook = true in
833834
defm SUBCC : F3_12 <"subcc", 0b010100, subc, IntRegs, i32, simm13Op>;
834835

835836
let Uses = [ICC] in
836837
defm SUBC : F3_12np <"subx", 0b001100>;
837838

838-
// cmp (from Section A.3) is a specialized alias for subcc
839-
let Defs = [ICC], rd = 0 in {
840-
def CMPrr : F3_1<2, 0b010100,
841-
(outs), (ins IntRegs:$rs1, IntRegs:$rs2),
842-
"cmp $rs1, $rs2",
843-
[(SPcmpicc i32:$rs1, i32:$rs2)]>;
844-
def CMPri : F3_2<2, 0b010100,
845-
(outs), (ins IntRegs:$rs1, simm13Op:$simm13),
846-
"cmp $rs1, $simm13",
847-
[(SPcmpicc i32:$rs1, (i32 simm13:$simm13))]>;
848-
}
839+
def : Pat<(SPcmpicc i32:$lhs, i32:$rhs), (SUBCCrr $lhs, $rhs)>;
840+
def : Pat<(SPcmpicc i32:$lhs, (i32 simm13:$rhs)), (SUBCCri $lhs, imm:$rhs)>;
849841

850842
// Section B.18 - Multiply Instructions, p. 113
851843
let Defs = [Y] in {

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