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[X86][MC] Support instructions of MSR_IMM (#113524)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
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‎llvm/docs/ReleaseNotes.md

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@@ -221,6 +221,8 @@ Changes to the X86 Backend
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* Supported ISA of `SM4(EVEX)`.
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* Supported ISA of `MSR_IMM`.
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Changes to the OCaml bindings
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-----------------------------
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‎llvm/lib/Target/X86/X86InstrSystem.td

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@@ -466,7 +466,10 @@ multiclass Urdwrmsr<Map rrmap, string suffix> {
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"urdmsr\t{$imm, $dst|$dst, $imm}",
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[(set GR64:$dst, (int_x86_urdmsr i64immSExt32_su:$imm))]>,
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T_MAP7, VEX, XD, NoCD8;
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}
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def RDMSRri#suffix : Ii32<0xf6, MRM0r, (outs GR64:$dst), (ins i64i32imm:$imm),
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"rdmsr\t{$imm, $dst|$dst, $imm}", []>,
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T_MAP7, VEX, XD, NoCD8;
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}
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let mayStore = 1 in {
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let OpMap = rrmap in
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def UWRMSRrr#suffix : I<0xf8, MRMSrcReg, (outs), (ins GR64:$src1, GR64:$src2),
@@ -476,6 +479,9 @@ multiclass Urdwrmsr<Map rrmap, string suffix> {
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"uwrmsr\t{$src, $imm|$imm, $src}",
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[(int_x86_uwrmsr i64immSExt32_su:$imm, GR64:$src)]>,
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T_MAP7, VEX, XS, NoCD8;
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def WRMSRNSir#suffix : Ii32<0xf6, MRM0r, (outs), (ins GR64:$src, i64i32imm:$imm),
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"wrmsrns\t{$src, $imm|$imm, $src}",
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[]>, T_MAP7, VEX, XS, NoCD8;
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}
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}
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‎llvm/test/MC/Disassembler/X86/apx/msr-imm.txt

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# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
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# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
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# ATT: rdmsr $123, %r9
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# INTEL: rdmsr r9, 123
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0x62,0xd7,0x7f,0x08,0xf6,0xc1,0x7b,0x00,0x00,0x00
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# ATT: rdmsr $123, %r19
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# INTEL: rdmsr r19, 123
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0x62,0xff,0x7f,0x08,0xf6,0xc3,0x7b,0x00,0x00,0x00
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# ATT: wrmsrns %r9, $123
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# INTEL: wrmsrns 123, r9
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0x62,0xd7,0x7e,0x08,0xf6,0xc1,0x7b,0x00,0x00,0x00
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# ATT: wrmsrns %r19, $123
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# INTEL: wrmsrns 123, r19
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0x62,0xff,0x7e,0x08,0xf6,0xc3,0x7b,0x00,0x00,0x00

‎llvm/test/MC/Disassembler/X86/msrimm-64.txt

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# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
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# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
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# ATT: rdmsr $123, %r9
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# INTEL: rdmsr r9, 123
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0xc4,0xc7,0x7b,0xf6,0xc1,0x7b,0x00,0x00,0x00
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# ATT: wrmsrns %r9, $123
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# INTEL: wrmsrns 123, r9
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0xc4,0xc7,0x7a,0xf6,0xc1,0x7b,0x00,0x00,0x00

‎llvm/test/MC/X86/apx/msrimm-att.s

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# RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
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# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
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# ERROR-COUNT-4: error:
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# ERROR-NOT: error:
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## rdmsr
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// CHECK: {evex} rdmsr $123, %r9
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// CHECK: encoding: [0x62,0xd7,0x7f,0x08,0xf6,0xc1,0x7b,0x00,0x00,0x00]
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{evex} rdmsr $123, %r9
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// CHECK: rdmsr $123, %r19
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// CHECK: encoding: [0x62,0xff,0x7f,0x08,0xf6,0xc3,0x7b,0x00,0x00,0x00]
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rdmsr $123, %r19
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## wrmsrns
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# CHECK: {evex} wrmsrns %r9, $123
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# CHECK: encoding: [0x62,0xd7,0x7e,0x08,0xf6,0xc1,0x7b,0x00,0x00,0x00]
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{evex} wrmsrns %r9, $123
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# CHECK: wrmsrns %r19, $123
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# CHECK: encoding: [0x62,0xff,0x7e,0x08,0xf6,0xc3,0x7b,0x00,0x00,0x00]
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wrmsrns %r19, $123

‎llvm/test/MC/X86/apx/msrimm-intel.s

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# RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
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## urdmsr
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# CHECK: {evex} rdmsr r9, 123
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# CHECK: encoding: [0x62,0xd7,0x7f,0x08,0xf6,0xc1,0x7b,0x00,0x00,0x00]
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{evex} rdmsr r9, 123
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# CHECK: rdmsr r19, 123
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# CHECK: encoding: [0x62,0xff,0x7f,0x08,0xf6,0xc3,0x7b,0x00,0x00,0x00]
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rdmsr r19, 123
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## uwrmsr
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# CHECK: {evex} wrmsrns 123, r9
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# CHECK: encoding: [0x62,0xd7,0x7e,0x08,0xf6,0xc1,0x7b,0x00,0x00,0x00]
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{evex} wrmsrns 123, r9
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# CHECK: wrmsrns 123, r19
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# CHECK: encoding: [0x62,0xff,0x7e,0x08,0xf6,0xc3,0x7b,0x00,0x00,0x00]
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wrmsrns 123, r19

‎llvm/test/MC/X86/msrimm-64-att.s

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// RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
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// RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
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// ERROR-COUNT-2: error:
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// ERROR-NOT: error:
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// CHECK: rdmsr $123, %r9
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// CHECK: encoding: [0xc4,0xc7,0x7b,0xf6,0xc1,0x7b,0x00,0x00,0x00]
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rdmsr $123, %r9
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// CHECK: wrmsrns %r9, $123
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// CHECK: encoding: [0xc4,0xc7,0x7a,0xf6,0xc1,0x7b,0x00,0x00,0x00]
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wrmsrns %r9, $123
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‎llvm/test/MC/X86/msrimm-64-intel.s

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// RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
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// CHECK: rdmsr r9, 123
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// CHECK: encoding: [0xc4,0xc7,0x7b,0xf6,0xc1,0x7b,0x00,0x00,0x00]
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rdmsr r9, 123
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// CHECK: wrmsrns 123, r9
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// CHECK: encoding: [0xc4,0xc7,0x7a,0xf6,0xc1,0x7b,0x00,0x00,0x00]
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wrmsrns 123, r9
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