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[InstCombine] Add example usage for new Checked matcher API
There is no real motivation for this change other than to highlight a case where the new `Checked` matcher API can handle non-splat-vecs without increasing code complexity.
1 parent 29afc4e commit d4de565

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2 files changed

+36
-60
lines changed

2 files changed

+36
-60
lines changed

llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp

Lines changed: 30 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -6347,57 +6347,51 @@ Instruction *InstCombinerImpl::foldICmpUsingKnownBits(ICmpInst &I) {
63476347
case ICmpInst::ICMP_ULT: {
63486348
if (Op1Min == Op0Max) // A <u B -> A != B if max(A) == min(B)
63496349
return new ICmpInst(ICmpInst::ICMP_NE, Op0, Op1);
6350-
const APInt *CmpC;
6351-
if (match(Op1, m_APInt(CmpC))) {
6352-
// A <u C -> A == C-1 if min(A)+1 == C
6353-
if (*CmpC == Op0Min + 1)
6354-
return new ICmpInst(ICmpInst::ICMP_EQ, Op0,
6355-
ConstantInt::get(Op1->getType(), *CmpC - 1));
6356-
// X <u C --> X == 0, if the number of zero bits in the bottom of X
6357-
// exceeds the log2 of C.
6358-
if (Op0Known.countMinTrailingZeros() >= CmpC->ceilLogBase2())
6359-
return new ICmpInst(ICmpInst::ICMP_EQ, Op0,
6360-
Constant::getNullValue(Op1->getType()));
6361-
}
6350+
// A <u C -> A == C-1 if min(A)+1 == C
6351+
if (match(Op1, m_SpecificInt(Op0Min + 1)))
6352+
return new ICmpInst(ICmpInst::ICMP_EQ, Op0,
6353+
ConstantInt::get(Op1->getType(), Op0Min));
6354+
// X <u C --> X == 0, if the number of zero bits in the bottom of X
6355+
// exceeds the log2 of C.
6356+
if (match(Op1, m_CheckedInt([&Op0Known](const APInt &C) {
6357+
return Op0Known.countMinTrailingZeros() >= C.ceilLogBase2();
6358+
})))
6359+
return new ICmpInst(ICmpInst::ICMP_EQ, Op0,
6360+
Constant::getNullValue(Op1->getType()));
63626361
break;
63636362
}
63646363
case ICmpInst::ICMP_UGT: {
63656364
if (Op1Max == Op0Min) // A >u B -> A != B if min(A) == max(B)
63666365
return new ICmpInst(ICmpInst::ICMP_NE, Op0, Op1);
6367-
const APInt *CmpC;
6368-
if (match(Op1, m_APInt(CmpC))) {
6369-
// A >u C -> A == C+1 if max(a)-1 == C
6370-
if (*CmpC == Op0Max - 1)
6371-
return new ICmpInst(ICmpInst::ICMP_EQ, Op0,
6372-
ConstantInt::get(Op1->getType(), *CmpC + 1));
6373-
// X >u C --> X != 0, if the number of zero bits in the bottom of X
6374-
// exceeds the log2 of C.
6375-
if (Op0Known.countMinTrailingZeros() >= CmpC->getActiveBits())
6376-
return new ICmpInst(ICmpInst::ICMP_NE, Op0,
6377-
Constant::getNullValue(Op1->getType()));
6378-
}
6366+
// A >u C -> A == C+1 if max(a)-1 == C
6367+
if (match(Op1, m_SpecificInt(Op0Max - 1)))
6368+
return new ICmpInst(ICmpInst::ICMP_EQ, Op0,
6369+
ConstantInt::get(Op1->getType(), Op0Max));
6370+
// X >u C --> X != 0, if the number of zero bits in the bottom of X
6371+
// exceeds the log2 of C.
6372+
if (match(Op1, m_CheckedInt([&Op0Known](const APInt &C) {
6373+
return Op0Known.countMinTrailingZeros() >= C.getActiveBits();
6374+
})))
6375+
return new ICmpInst(ICmpInst::ICMP_NE, Op0,
6376+
Constant::getNullValue(Op1->getType()));
63796377
break;
63806378
}
63816379
case ICmpInst::ICMP_SLT: {
63826380
if (Op1Min == Op0Max) // A <s B -> A != B if max(A) == min(B)
63836381
return new ICmpInst(ICmpInst::ICMP_NE, Op0, Op1);
6384-
const APInt *CmpC;
6385-
if (match(Op1, m_APInt(CmpC))) {
6386-
if (*CmpC == Op0Min + 1) // A <s C -> A == C-1 if min(A)+1 == C
6387-
return new ICmpInst(ICmpInst::ICMP_EQ, Op0,
6388-
ConstantInt::get(Op1->getType(), *CmpC - 1));
6389-
}
6382+
// A <s C -> A == C-1 if min(A)+1 == C
6383+
if (match(Op1, m_SpecificInt(Op0Min + 1)))
6384+
return new ICmpInst(ICmpInst::ICMP_EQ, Op0,
6385+
ConstantInt::get(Op1->getType(), Op0Min));
63906386
break;
63916387
}
63926388
case ICmpInst::ICMP_SGT: {
63936389
if (Op1Max == Op0Min) // A >s B -> A != B if min(A) == max(B)
63946390
return new ICmpInst(ICmpInst::ICMP_NE, Op0, Op1);
6395-
const APInt *CmpC;
6396-
if (match(Op1, m_APInt(CmpC))) {
6397-
if (*CmpC == Op0Max - 1) // A >s C -> A == C+1 if max(A)-1 == C
6398-
return new ICmpInst(ICmpInst::ICMP_EQ, Op0,
6399-
ConstantInt::get(Op1->getType(), *CmpC + 1));
6400-
}
6391+
// A >s C -> A == C+1 if max(A)-1 == C
6392+
if (match(Op1, m_SpecificInt(Op0Max - 1)))
6393+
return new ICmpInst(ICmpInst::ICMP_EQ, Op0,
6394+
ConstantInt::get(Op1->getType(), Op0Max));
64016395
break;
64026396
}
64036397
}

llvm/test/Transforms/InstCombine/signed-truncation-check.ll

Lines changed: 6 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -212,10 +212,7 @@ define <3 x i1> @positive_vec_undef0(<3 x i32> %arg) {
212212

213213
define <3 x i1> @positive_vec_undef1(<3 x i32> %arg) {
214214
; CHECK-LABEL: @positive_vec_undef1(
215-
; CHECK-NEXT: [[T1:%.*]] = icmp sgt <3 x i32> [[ARG:%.*]], <i32 -1, i32 -1, i32 -1>
216-
; CHECK-NEXT: [[T2:%.*]] = add <3 x i32> [[ARG]], <i32 128, i32 undef, i32 128>
217-
; CHECK-NEXT: [[T3:%.*]] = icmp ult <3 x i32> [[T2]], <i32 256, i32 256, i32 256>
218-
; CHECK-NEXT: [[T4:%.*]] = and <3 x i1> [[T1]], [[T3]]
215+
; CHECK-NEXT: [[T4:%.*]] = icmp ult <3 x i32> [[ARG:%.*]], <i32 128, i32 128, i32 128>
219216
; CHECK-NEXT: ret <3 x i1> [[T4]]
220217
;
221218
%t1 = icmp sgt <3 x i32> %arg, <i32 -1, i32 -1, i32 -1>
@@ -227,10 +224,7 @@ define <3 x i1> @positive_vec_undef1(<3 x i32> %arg) {
227224

228225
define <3 x i1> @positive_vec_undef2(<3 x i32> %arg) {
229226
; CHECK-LABEL: @positive_vec_undef2(
230-
; CHECK-NEXT: [[T1:%.*]] = icmp sgt <3 x i32> [[ARG:%.*]], <i32 -1, i32 -1, i32 -1>
231-
; CHECK-NEXT: [[T2:%.*]] = add <3 x i32> [[ARG]], <i32 128, i32 128, i32 128>
232-
; CHECK-NEXT: [[T3:%.*]] = icmp ult <3 x i32> [[T2]], <i32 256, i32 undef, i32 256>
233-
; CHECK-NEXT: [[T4:%.*]] = and <3 x i1> [[T1]], [[T3]]
227+
; CHECK-NEXT: [[T4:%.*]] = icmp ult <3 x i32> [[ARG:%.*]], <i32 128, i32 128, i32 128>
234228
; CHECK-NEXT: ret <3 x i1> [[T4]]
235229
;
236230
%t1 = icmp sgt <3 x i32> %arg, <i32 -1, i32 -1, i32 -1>
@@ -242,10 +236,7 @@ define <3 x i1> @positive_vec_undef2(<3 x i32> %arg) {
242236

243237
define <3 x i1> @positive_vec_undef3(<3 x i32> %arg) {
244238
; CHECK-LABEL: @positive_vec_undef3(
245-
; CHECK-NEXT: [[T1:%.*]] = icmp sgt <3 x i32> [[ARG:%.*]], <i32 -1, i32 undef, i32 -1>
246-
; CHECK-NEXT: [[T2:%.*]] = add <3 x i32> [[ARG]], <i32 128, i32 undef, i32 128>
247-
; CHECK-NEXT: [[T3:%.*]] = icmp ult <3 x i32> [[T2]], <i32 256, i32 256, i32 256>
248-
; CHECK-NEXT: [[T4:%.*]] = and <3 x i1> [[T1]], [[T3]]
239+
; CHECK-NEXT: [[T4:%.*]] = icmp ult <3 x i32> [[ARG:%.*]], <i32 128, i32 128, i32 128>
249240
; CHECK-NEXT: ret <3 x i1> [[T4]]
250241
;
251242
%t1 = icmp sgt <3 x i32> %arg, <i32 -1, i32 undef, i32 -1>
@@ -257,10 +248,7 @@ define <3 x i1> @positive_vec_undef3(<3 x i32> %arg) {
257248

258249
define <3 x i1> @positive_vec_undef4(<3 x i32> %arg) {
259250
; CHECK-LABEL: @positive_vec_undef4(
260-
; CHECK-NEXT: [[T1:%.*]] = icmp sgt <3 x i32> [[ARG:%.*]], <i32 -1, i32 undef, i32 -1>
261-
; CHECK-NEXT: [[T2:%.*]] = add <3 x i32> [[ARG]], <i32 128, i32 128, i32 128>
262-
; CHECK-NEXT: [[T3:%.*]] = icmp ult <3 x i32> [[T2]], <i32 256, i32 undef, i32 256>
263-
; CHECK-NEXT: [[T4:%.*]] = and <3 x i1> [[T1]], [[T3]]
251+
; CHECK-NEXT: [[T4:%.*]] = icmp ult <3 x i32> [[ARG:%.*]], <i32 128, i32 128, i32 128>
264252
; CHECK-NEXT: ret <3 x i1> [[T4]]
265253
;
266254
%t1 = icmp sgt <3 x i32> %arg, <i32 -1, i32 undef, i32 -1>
@@ -272,10 +260,7 @@ define <3 x i1> @positive_vec_undef4(<3 x i32> %arg) {
272260

273261
define <3 x i1> @positive_vec_undef5(<3 x i32> %arg) {
274262
; CHECK-LABEL: @positive_vec_undef5(
275-
; CHECK-NEXT: [[T1:%.*]] = icmp sgt <3 x i32> [[ARG:%.*]], <i32 -1, i32 -1, i32 -1>
276-
; CHECK-NEXT: [[T2:%.*]] = add <3 x i32> [[ARG]], <i32 128, i32 undef, i32 128>
277-
; CHECK-NEXT: [[T3:%.*]] = icmp ult <3 x i32> [[T2]], <i32 256, i32 undef, i32 256>
278-
; CHECK-NEXT: [[T4:%.*]] = and <3 x i1> [[T1]], [[T3]]
263+
; CHECK-NEXT: [[T4:%.*]] = icmp ult <3 x i32> [[ARG:%.*]], <i32 128, i32 128, i32 128>
279264
; CHECK-NEXT: ret <3 x i1> [[T4]]
280265
;
281266
%t1 = icmp sgt <3 x i32> %arg, <i32 -1, i32 -1, i32 -1>
@@ -287,10 +272,7 @@ define <3 x i1> @positive_vec_undef5(<3 x i32> %arg) {
287272

288273
define <3 x i1> @positive_vec_undef6(<3 x i32> %arg) {
289274
; CHECK-LABEL: @positive_vec_undef6(
290-
; CHECK-NEXT: [[T1:%.*]] = icmp sgt <3 x i32> [[ARG:%.*]], <i32 -1, i32 undef, i32 -1>
291-
; CHECK-NEXT: [[T2:%.*]] = add <3 x i32> [[ARG]], <i32 128, i32 undef, i32 128>
292-
; CHECK-NEXT: [[T3:%.*]] = icmp ult <3 x i32> [[T2]], <i32 256, i32 undef, i32 256>
293-
; CHECK-NEXT: [[T4:%.*]] = and <3 x i1> [[T1]], [[T3]]
275+
; CHECK-NEXT: [[T4:%.*]] = icmp ult <3 x i32> [[ARG:%.*]], <i32 128, i32 128, i32 128>
294276
; CHECK-NEXT: ret <3 x i1> [[T4]]
295277
;
296278
%t1 = icmp sgt <3 x i32> %arg, <i32 -1, i32 undef, i32 -1>

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