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[X86][MC] Support Enc/Dec for EGPR for promoted CRC32 (#76434)
R16-R31 was added into GPRs in #70958, This patch supports the encoding/decoding for promoted CRC32 instruction in EVEX space. RFC: https://discourse.llvm.org/t/rfc-design-for-apx-feature-egpr-and-ndd-support/73031/4
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6 files changed

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llvm/lib/Target/X86/X86InstrSSE.td

Lines changed: 17 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -6663,18 +6663,18 @@ let Defs = [ECX, EFLAGS], Uses = [EAX, EDX], hasSideEffects = 0 in {
66636663
class Crc32r<X86TypeInfo t, RegisterClass rc, SDPatternOperator node>
66646664
: ITy<0xF1, MRMSrcReg, t, (outs rc:$dst), (ins rc:$src1, t.RegClass:$src2),
66656665
"crc32", binop_args, [(set rc:$dst, (node rc:$src1, t.RegClass:$src2))]>,
6666-
Sched<[WriteCRC32]> {
6666+
Sched<[WriteCRC32]>, NoCD8 {
66676667
let Constraints = "$src1 = $dst";
66686668
}
66696669

66706670
class Crc32m<X86TypeInfo t, RegisterClass rc, SDPatternOperator node>
66716671
: ITy<0xF1, MRMSrcMem, t, (outs rc:$dst), (ins rc:$src1, t.MemOperand:$src2),
66726672
"crc32", binop_args, [(set rc:$dst, (node rc:$src1, (load addr:$src2)))]>,
6673-
Sched<[WriteCRC32.Folded, WriteCRC32.ReadAfterFold]> {
6673+
Sched<[WriteCRC32.Folded, WriteCRC32.ReadAfterFold]>, NoCD8 {
66746674
let Constraints = "$src1 = $dst";
66756675
}
66766676

6677-
let Predicates = [HasCRC32], OpMap = T8, OpPrefix = XD in {
6677+
let Predicates = [HasCRC32, NoEGPR], OpMap = T8, OpPrefix = XD in {
66786678
def CRC32r32r8 : Crc32r<Xi8, GR32, int_x86_sse42_crc32_32_8>;
66796679
def CRC32r32m8 : Crc32m<Xi8, GR32, int_x86_sse42_crc32_32_8>;
66806680
def CRC32r32r16 : Crc32r<Xi16, GR32, int_x86_sse42_crc32_32_16>, OpSize16;
@@ -6688,6 +6688,20 @@ let Predicates = [HasCRC32], OpMap = T8, OpPrefix = XD in {
66886688
def CRC32r64m8 : Crc32m<Xi8, GR64, null_frag>, REX_W;
66896689
}
66906690

6691+
let Predicates = [HasCRC32, HasEGPR, In64BitMode], OpMap = T_MAP4, OpEnc = EncEVEX in {
6692+
def CRC32r32r8_EVEX : Crc32r<Xi8, GR32, int_x86_sse42_crc32_32_8>;
6693+
def CRC32r32m8_EVEX : Crc32m<Xi8, GR32, int_x86_sse42_crc32_32_8>;
6694+
def CRC32r32r16_EVEX : Crc32r<Xi16, GR32, int_x86_sse42_crc32_32_16>, PD;
6695+
def CRC32r32m16_EVEX : Crc32m<Xi16, GR32, int_x86_sse42_crc32_32_16>, PD;
6696+
def CRC32r32r32_EVEX : Crc32r<Xi32, GR32, int_x86_sse42_crc32_32_32>;
6697+
def CRC32r32m32_EVEX : Crc32m<Xi32, GR32, int_x86_sse42_crc32_32_32>;
6698+
def CRC32r64r64_EVEX : Crc32r<Xi64, GR64, int_x86_sse42_crc32_64_64>;
6699+
def CRC32r64m64_EVEX : Crc32m<Xi64, GR64, int_x86_sse42_crc32_64_64>;
6700+
def CRC32r64r8_EVEX : Crc32r<Xi8, GR64, null_frag>, REX_W;
6701+
let mayLoad = 1 in
6702+
def CRC32r64m8_EVEX : Crc32m<Xi8, GR64, null_frag>, REX_W;
6703+
}
6704+
66916705
//===----------------------------------------------------------------------===//
66926706
// SHA-NI Instructions
66936707
//===----------------------------------------------------------------------===//
Lines changed: 90 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,90 @@
1+
# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
2+
# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
3+
4+
# ATT: crc32b %al, %ebx
5+
# INTEL: crc32 ebx, al
6+
0x62,0xf4,0x7c,0x08,0xf0,0xd8
7+
8+
# ATT: crc32b %al, %rbx
9+
# INTEL: crc32 rbx, al
10+
0x62,0xf4,0xfc,0x08,0xf0,0xd8
11+
12+
# ATT: crc32w %ax, %ebx
13+
# INTEL: crc32 ebx, ax
14+
0x62,0xf4,0x7d,0x08,0xf1,0xd8
15+
16+
# ATT: crc32l %eax, %ebx
17+
# INTEL: crc32 ebx, eax
18+
0x62,0xf4,0x7c,0x08,0xf1,0xd8
19+
20+
# ATT: crc32q %rax, %rbx
21+
# INTEL: crc32 rbx, rax
22+
0x62,0xf4,0xfc,0x08,0xf1,0xd8
23+
24+
# ATT: crc32w 291(%rax,%rbx,4), %ecx
25+
# INTEL: crc32 ecx, word ptr [rax + 4*rbx + 291]
26+
0x62,0xf4,0x7d,0x08,0xf1,0x8c,0x98,0x23,0x01,0x00,0x00
27+
28+
# ATT: crc32l 291(%rax,%rbx,4), %ecx
29+
# INTEL: crc32 ecx, dword ptr [rax + 4*rbx + 291]
30+
0x62,0xf4,0x7c,0x08,0xf1,0x8c,0x98,0x23,0x01,0x00,0x00
31+
32+
# ATT: crc32b 291(%rax,%rbx,4), %rcx
33+
# INTEL: crc32 rcx, byte ptr [rax + 4*rbx + 291]
34+
0x62,0xf4,0xfc,0x08,0xf0,0x8c,0x98,0x23,0x01,0x00,0x00
35+
36+
# ATT: crc32q 291(%rax,%rbx,4), %rcx
37+
# INTEL: crc32 rcx, qword ptr [rax + 4*rbx + 291]
38+
0x62,0xf4,0xfc,0x08,0xf1,0x8c,0x98,0x23,0x01,0x00,0x00
39+
40+
# ATT: crc32b %r16b, %r22d
41+
# INTEL: crc32 r22d, r16b
42+
0x62,0xec,0x7c,0x08,0xf0,0xf0
43+
44+
# ATT: crc32b %r16b, %r23
45+
# INTEL: crc32 r23, r16b
46+
0x62,0xec,0xfc,0x08,0xf0,0xf8
47+
48+
# ATT: crc32w %r17w, %r22d
49+
# INTEL: crc32 r22d, r17w
50+
0x62,0xec,0x7d,0x08,0xf1,0xf1
51+
52+
# ATT: crc32l %r18d, %r22d
53+
# INTEL: crc32 r22d, r18d
54+
0x62,0xec,0x7c,0x08,0xf1,0xf2
55+
56+
# ATT: crc32q %r19, %r23
57+
# INTEL: crc32 r23, r19
58+
0x62,0xec,0xfc,0x08,0xf1,0xfb
59+
60+
# ATT: crc32w 291(%r28,%r29,4), %r18d
61+
# INTEL: crc32 r18d, word ptr [r28 + 4*r29 + 291]
62+
0x62,0x8c,0x79,0x08,0xf1,0x94,0xac,0x23,0x01,0x00,0x00
63+
64+
# ATT: crc32l 291(%r28,%r29,4), %r18d
65+
# INTEL: crc32 r18d, dword ptr [r28 + 4*r29 + 291]
66+
0x62,0x8c,0x78,0x08,0xf1,0x94,0xac,0x23,0x01,0x00,0x00
67+
68+
# ATT: crc32b 291(%r28,%r29,4), %r19
69+
# INTEL: crc32 r19, byte ptr [r28 + 4*r29 + 291]
70+
0x62,0x8c,0xf8,0x08,0xf0,0x9c,0xac,0x23,0x01,0x00,0x00
71+
72+
# ATT: crc32q 291(%r28,%r29,4), %r19
73+
# INTEL: crc32 r19, qword ptr [r28 + 4*r29 + 291]
74+
0x62,0x8c,0xf8,0x08,0xf1,0x9c,0xac,0x23,0x01,0x00,0x00
75+
76+
# ATT: crc32w 123(%r28,%r29,4), %r18d
77+
# INTEL: crc32 r18d, word ptr [r28 + 4*r29 + 123]
78+
0x62,0x8c,0x79,0x08,0xf1,0x54,0xac,0x7b
79+
80+
# ATT: crc32l 123(%r28,%r29,4), %r18d
81+
# INTEL: crc32 r18d, dword ptr [r28 + 4*r29 + 123]
82+
0x62,0x8c,0x78,0x08,0xf1,0x54,0xac,0x7b
83+
84+
# ATT: crc32b 123(%r28,%r29,4), %r19
85+
# INTEL: crc32 r19, byte ptr [r28 + 4*r29 + 123]
86+
0x62,0x8c,0xf8,0x08,0xf0,0x5c,0xac,0x7b
87+
88+
# ATT: crc32q 123(%r28,%r29,4), %r19
89+
# INTEL: crc32 r19, qword ptr [r28 + 4*r29 + 123]
90+
0x62,0x8c,0xf8,0x08,0xf1,0x5c,0xac,0x7b

llvm/test/MC/X86/apx/crc32-att.s

Lines changed: 92 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,92 @@
1+
# RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
2+
# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
3+
4+
# ERROR-COUNT-22: error:
5+
# ERROR-NOT: error:
6+
# CHECK: {evex} crc32b %al, %ebx
7+
# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0xf0,0xd8]
8+
{evex} crc32b %al, %ebx
9+
10+
# CHECK: {evex} crc32b %al, %rbx
11+
# CHECK: encoding: [0x62,0xf4,0xfc,0x08,0xf0,0xd8]
12+
{evex} crc32b %al, %rbx
13+
14+
# CHECK: {evex} crc32w %ax, %ebx
15+
# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0xf1,0xd8]
16+
{evex} crc32w %ax, %ebx
17+
18+
# CHECK: {evex} crc32l %eax, %ebx
19+
# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0xf1,0xd8]
20+
{evex} crc32l %eax, %ebx
21+
22+
# CHECK: {evex} crc32q %rax, %rbx
23+
# CHECK: encoding: [0x62,0xf4,0xfc,0x08,0xf1,0xd8]
24+
{evex} crc32q %rax, %rbx
25+
26+
# CHECK: {evex} crc32w 291(%rax,%rbx,4), %ecx
27+
# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0xf1,0x8c,0x98,0x23,0x01,0x00,0x00]
28+
{evex} crc32w 291(%rax,%rbx,4), %ecx
29+
30+
# CHECK: {evex} crc32l 291(%rax,%rbx,4), %ecx
31+
# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0xf1,0x8c,0x98,0x23,0x01,0x00,0x00]
32+
{evex} crc32l 291(%rax,%rbx,4), %ecx
33+
34+
# CHECK: {evex} crc32b 291(%rax,%rbx,4), %rcx
35+
# CHECK: encoding: [0x62,0xf4,0xfc,0x08,0xf0,0x8c,0x98,0x23,0x01,0x00,0x00]
36+
{evex} crc32b 291(%rax,%rbx,4), %rcx
37+
38+
# CHECK: {evex} crc32q 291(%rax,%rbx,4), %rcx
39+
# CHECK: encoding: [0x62,0xf4,0xfc,0x08,0xf1,0x8c,0x98,0x23,0x01,0x00,0x00]
40+
{evex} crc32q 291(%rax,%rbx,4), %rcx
41+
42+
# CHECK: crc32b %r16b, %r22d
43+
# CHECK: encoding: [0x62,0xec,0x7c,0x08,0xf0,0xf0]
44+
crc32b %r16b, %r22d
45+
46+
# CHECK: crc32b %r16b, %r23
47+
# CHECK: encoding: [0x62,0xec,0xfc,0x08,0xf0,0xf8]
48+
crc32b %r16b, %r23
49+
50+
# CHECK: crc32w %r17w, %r22d
51+
# CHECK: encoding: [0x62,0xec,0x7d,0x08,0xf1,0xf1]
52+
crc32w %r17w, %r22d
53+
54+
# CHECK: crc32l %r18d, %r22d
55+
# CHECK: encoding: [0x62,0xec,0x7c,0x08,0xf1,0xf2]
56+
crc32l %r18d, %r22d
57+
58+
# CHECK: crc32q %r19, %r23
59+
# CHECK: encoding: [0x62,0xec,0xfc,0x08,0xf1,0xfb]
60+
crc32q %r19, %r23
61+
62+
# CHECK: crc32w 291(%r28,%r29,4), %r18d
63+
# CHECK: encoding: [0x62,0x8c,0x79,0x08,0xf1,0x94,0xac,0x23,0x01,0x00,0x00]
64+
crc32w 291(%r28,%r29,4), %r18d
65+
66+
# CHECK: crc32l 291(%r28,%r29,4), %r18d
67+
# CHECK: encoding: [0x62,0x8c,0x78,0x08,0xf1,0x94,0xac,0x23,0x01,0x00,0x00]
68+
crc32l 291(%r28,%r29,4), %r18d
69+
70+
# CHECK: crc32b 291(%r28,%r29,4), %r19
71+
# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0xf0,0x9c,0xac,0x23,0x01,0x00,0x00]
72+
crc32b 291(%r28,%r29,4), %r19
73+
74+
# CHECK: crc32q 291(%r28,%r29,4), %r19
75+
# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0xf1,0x9c,0xac,0x23,0x01,0x00,0x00]
76+
crc32q 291(%r28,%r29,4), %r19
77+
78+
# CHECK: crc32w 123(%r28,%r29,4), %r18d
79+
# CHECK: encoding: [0x62,0x8c,0x79,0x08,0xf1,0x54,0xac,0x7b]
80+
crc32w 123(%r28,%r29,4), %r18d
81+
82+
# CHECK: crc32l 123(%r28,%r29,4), %r18d
83+
# CHECK: encoding: [0x62,0x8c,0x78,0x08,0xf1,0x54,0xac,0x7b]
84+
crc32l 123(%r28,%r29,4), %r18d
85+
86+
# CHECK: crc32b 123(%r28,%r29,4), %r19
87+
# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0xf0,0x5c,0xac,0x7b]
88+
crc32b 123(%r28,%r29,4), %r19
89+
90+
# CHECK: crc32q 123(%r28,%r29,4), %r19
91+
# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0xf1,0x5c,0xac,0x7b]
92+
crc32q 123(%r28,%r29,4), %r19

llvm/test/MC/X86/apx/crc32-intel.s

Lines changed: 89 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,89 @@
1+
# RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
2+
3+
# CHECK: {evex} crc32 ebx, al
4+
# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0xf0,0xd8]
5+
{evex} crc32 ebx, al
6+
7+
# CHECK: {evex} crc32 rbx, al
8+
# CHECK: encoding: [0x62,0xf4,0xfc,0x08,0xf0,0xd8]
9+
{evex} crc32 rbx, al
10+
11+
# CHECK: {evex} crc32 ebx, ax
12+
# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0xf1,0xd8]
13+
{evex} crc32 ebx, ax
14+
15+
# CHECK: {evex} crc32 ebx, eax
16+
# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0xf1,0xd8]
17+
{evex} crc32 ebx, eax
18+
19+
# CHECK: {evex} crc32 rbx, rax
20+
# CHECK: encoding: [0x62,0xf4,0xfc,0x08,0xf1,0xd8]
21+
{evex} crc32 rbx, rax
22+
23+
# CHECK: {evex} crc32 ecx, word ptr [rax + 4*rbx + 291]
24+
# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0xf1,0x8c,0x98,0x23,0x01,0x00,0x00]
25+
{evex} crc32 ecx, word ptr [rax + 4*rbx + 291]
26+
27+
# CHECK: {evex} crc32 ecx, dword ptr [rax + 4*rbx + 291]
28+
# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0xf1,0x8c,0x98,0x23,0x01,0x00,0x00]
29+
{evex} crc32 ecx, dword ptr [rax + 4*rbx + 291]
30+
31+
# CHECK: {evex} crc32 rcx, byte ptr [rax + 4*rbx + 291]
32+
# CHECK: encoding: [0x62,0xf4,0xfc,0x08,0xf0,0x8c,0x98,0x23,0x01,0x00,0x00]
33+
{evex} crc32 rcx, byte ptr [rax + 4*rbx + 291]
34+
35+
# CHECK: {evex} crc32 rcx, qword ptr [rax + 4*rbx + 291]
36+
# CHECK: encoding: [0x62,0xf4,0xfc,0x08,0xf1,0x8c,0x98,0x23,0x01,0x00,0x00]
37+
{evex} crc32 rcx, qword ptr [rax + 4*rbx + 291]
38+
39+
# CHECK: crc32 r22d, r16b
40+
# CHECK: encoding: [0x62,0xec,0x7c,0x08,0xf0,0xf0]
41+
crc32 r22d, r16b
42+
43+
# CHECK: crc32 r23, r16b
44+
# CHECK: encoding: [0x62,0xec,0xfc,0x08,0xf0,0xf8]
45+
crc32 r23, r16b
46+
47+
# CHECK: crc32 r22d, r17w
48+
# CHECK: encoding: [0x62,0xec,0x7d,0x08,0xf1,0xf1]
49+
crc32 r22d, r17w
50+
51+
# CHECK: crc32 r22d, r18d
52+
# CHECK: encoding: [0x62,0xec,0x7c,0x08,0xf1,0xf2]
53+
crc32 r22d, r18d
54+
55+
# CHECK: crc32 r23, r19
56+
# CHECK: encoding: [0x62,0xec,0xfc,0x08,0xf1,0xfb]
57+
crc32 r23, r19
58+
59+
# CHECK: crc32 r18d, word ptr [r28 + 4*r29 + 291]
60+
# CHECK: encoding: [0x62,0x8c,0x79,0x08,0xf1,0x94,0xac,0x23,0x01,0x00,0x00]
61+
crc32 r18d, word ptr [r28 + 4*r29 + 291]
62+
63+
# CHECK: crc32 r18d, dword ptr [r28 + 4*r29 + 291]
64+
# CHECK: encoding: [0x62,0x8c,0x78,0x08,0xf1,0x94,0xac,0x23,0x01,0x00,0x00]
65+
crc32 r18d, dword ptr [r28 + 4*r29 + 291]
66+
67+
# CHECK: crc32 r19, byte ptr [r28 + 4*r29 + 291]
68+
# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0xf0,0x9c,0xac,0x23,0x01,0x00,0x00]
69+
crc32 r19, byte ptr [r28 + 4*r29 + 291]
70+
71+
# CHECK: crc32 r19, qword ptr [r28 + 4*r29 + 291]
72+
# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0xf1,0x9c,0xac,0x23,0x01,0x00,0x00]
73+
crc32 r19, qword ptr [r28 + 4*r29 + 291]
74+
75+
# CHECK: crc32 r18d, word ptr [r28 + 4*r29 + 123]
76+
# CHECK: encoding: [0x62,0x8c,0x79,0x08,0xf1,0x54,0xac,0x7b]
77+
crc32 r18d, word ptr [r28 + 4*r29 + 123]
78+
79+
# CHECK: crc32 r18d, dword ptr [r28 + 4*r29 + 123]
80+
# CHECK: encoding: [0x62,0x8c,0x78,0x08,0xf1,0x54,0xac,0x7b]
81+
crc32 r18d, dword ptr [r28 + 4*r29 + 123]
82+
83+
# CHECK: crc32 r19, byte ptr [r28 + 4*r29 + 123]
84+
# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0xf0,0x5c,0xac,0x7b]
85+
crc32 r19, byte ptr [r28 + 4*r29 + 123]
86+
87+
# CHECK: crc32 r19, qword ptr [r28 + 4*r29 + 123]
88+
# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0xf1,0x5c,0xac,0x7b]
89+
crc32 r19, qword ptr [r28 + 4*r29 + 123]

llvm/test/MC/X86/x86_64-asm-match.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,7 @@
2929
// CHECK: Matching formal operand class MCK_FR16 against actual operand at index 3 (Reg:xmm5): match success using generic matcher
3030
// CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 4: actual operand index out of range
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// CHECK: Opcode result: complete match, selecting this opcode
32-
// CHECK: AsmMatcher: found 2 encodings with mnemonic 'crc32l'
32+
// CHECK: AsmMatcher: found 4 encodings with mnemonic 'crc32l'
3333
// CHECK: Trying to match opcode CRC32r32r32
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// CHECK: Matching formal operand class MCK_GR32 against actual operand at index 1 (Memory: ModeSize=64,BaseReg=rbx,IndexReg=rcx,Scale=8,Disp=2125315823,SegReg=gs): Opcode result: multiple operand mismatches, ignoring this opcode
3535
// CHECK: Trying to match opcode CRC32r32m32

llvm/test/TableGen/x86-fold-tables.inc

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1602,10 +1602,15 @@ static const X86FoldTableEntry Table2[] = {
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{X86::CMPSSrr, X86::CMPSSrm, 0},
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{X86::CMPSSrr_Int, X86::CMPSSrm_Int, TB_NO_REVERSE},
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{X86::CRC32r32r16, X86::CRC32r32m16, 0},
1605+
{X86::CRC32r32r16_EVEX, X86::CRC32r32m16_EVEX, 0},
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{X86::CRC32r32r32, X86::CRC32r32m32, 0},
1607+
{X86::CRC32r32r32_EVEX, X86::CRC32r32m32_EVEX, 0},
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{X86::CRC32r32r8, X86::CRC32r32m8, 0},
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{X86::CRC32r32r8_EVEX, X86::CRC32r32m8_EVEX, 0},
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{X86::CRC32r64r64, X86::CRC32r64m64, 0},
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{X86::CRC32r64r64_EVEX, X86::CRC32r64m64_EVEX, 0},
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{X86::CRC32r64r8, X86::CRC32r64m8, 0},
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{X86::CRC32r64r8_EVEX, X86::CRC32r64m8_EVEX, 0},
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{X86::CVTSD2SSrr_Int, X86::CVTSD2SSrm_Int, TB_NO_REVERSE},
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{X86::CVTSI2SDrr_Int, X86::CVTSI2SDrm_Int, 0},
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{X86::CVTSI2SSrr_Int, X86::CVTSI2SSrm_Int, 0},

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