[PHIElimination] Reuse existing COPY in predecessor basic block

Simplifies the CFG later on, added a regression test.

Author: guy-david

llvm/lib/CodeGen/PHIElimination.cpp

@@ -582,6 +582,15 @@ void PHIEliminationImpl::LowerPHINode(MachineBasicBlock &MBB,
       continue;
     }
 
+    // Reuse an existing copy in the block if possible.
+    if (MachineInstr *DefMI = MRI->getUniqueVRegDef(SrcReg)) {
+      if (DefMI->isCopy() && DefMI->getParent() == &opBlock &&
+          MRI->use_empty(SrcReg)) {
+        DefMI->getOperand(0).setReg(IncomingReg);
+        continue;
+      }
+    }
+
     // Find a safe location to insert the copy, this may be the first terminator
     // in the block (or end()).
     MachineBasicBlock::iterator InsertPos =

llvm/test/CodeGen/AArch64/PHIElimination-reuse-copy.mir

@@ -0,0 +1,68 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
+# RUN: llc -run-pass=phi-node-elimination -mtriple=aarch64-linux-gnu -o - %s | FileCheck %s
+
+# Verify that the original COPY in bb.1 is reappropriated as the PHI source in bb.2,
+# instead of creating a new COPY with the same source register.
+
+---
+name: copy_virtual_reg
+tracksRegLiveness: true
+body: |
+  ; CHECK-LABEL: name: copy_virtual_reg
+  ; CHECK: bb.0:
+  ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
+  ; CHECK-NEXT:   liveins: $nzcv, $w0
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   %a:gpr32 = COPY $w0
+  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:gpr32 = IMPLICIT_DEF
+  ; CHECK-NEXT:   Bcc 8, %bb.2, implicit $nzcv
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.1:
+  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:gpr32 = COPY %a
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.2:
+  ; CHECK-NEXT:   %c:gpr32 = COPY [[DEF]]
+  ; CHECK-NEXT:   %d:gpr32 = COPY %c
+  bb.0:
+    liveins: $nzcv, $w0
+    %a:gpr32 = COPY $w0
+    Bcc 8, %bb.2, implicit $nzcv
+  bb.1:
+    %b:gpr32 = COPY %a:gpr32
+  bb.2:
+    %c:gpr32 = PHI %b:gpr32, %bb.1, undef %undef:gpr32, %bb.0
+    %d:gpr32 = COPY %c:gpr32
+...
+
+---
+name: copy_physical_reg
+tracksRegLiveness: true
+body: |
+  ; CHECK-LABEL: name: copy_physical_reg
+  ; CHECK: bb.0:
+  ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
+  ; CHECK-NEXT:   liveins: $nzcv, $w0
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:gpr32 = IMPLICIT_DEF
+  ; CHECK-NEXT:   Bcc 8, %bb.2, implicit $nzcv
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.1:
+  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   $x0 = IMPLICIT_DEF
+  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:gpr32 = COPY $w0
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.2:
+  ; CHECK-NEXT:   %b:gpr32 = COPY [[DEF]]
+  bb.0:
+    liveins: $nzcv, $w0
+    Bcc 8, %bb.2, implicit $nzcv
+  bb.1:
+    $x0 = IMPLICIT_DEF
+    %a:gpr32 = COPY $w0
+  bb.2:
+    %b:gpr32 = PHI %a:gpr32, %bb.1, undef %undef:gpr32, %bb.0
+...
+

llvm/test/CodeGen/AArch64/block-layout-regression.mir

@@ -0,0 +1,85 @@
+# RUN: llc -mtriple=aarch64-linux-gnu -verify-machineinstrs -o - %s \
+# RUN:   -start-before=phi-node-elimination -stop-after=branch-relaxation \
+# RUN: | FileCheck %s
+
+# Verify an optimal block layout is produced for the following nested loop, when
+# there's a PHI node in bb.5 that relies on an operand in bb.2.
+# The previous layout used a CBNZX for a null check followed by a unconditional
+# branch to bb.6, instead of a fallthrough.
+
+#   [ bb.0 ENTRY ]
+#       |
+#       v
+#   [ bb.1 ] <-------+
+#     /   \          |
+#    v     v         |
+# [bb.2] [bb.3] <-+  |
+#    |     |      |  |
+#    |     v      |  |
+#    |   [bb.4] --+  |
+#    |     |         |
+#    v     v         |
+#   [  bb.5  ]       |
+#     /   \          |
+#    |     v         |
+#    |   [bb.6] -----+
+#    |     |
+#    v     v
+#   [ bb.7 RET ]
+
+# CHECK-LABEL: test
+# CHECK-NOT: CBNZX
+# CHECK-NOT: B %bb.
+# CHECK-COUNT-2: CBZX
+
+---
+name: test
+tracksRegLiveness: true
+body: |
+  bb.0:
+    successors: %bb.1(0x80000000); %bb.1(100.00%)
+    liveins: $x0, $w1, $x2, $x3
+    %0:gpr64all = IMPLICIT_DEF
+    %1:gpr64common = IMPLICIT_DEF
+    %2:gpr32common = IMPLICIT_DEF
+    %3:gpr32 = IMPLICIT_DEF
+    B %bb.1
+
+  bb.1:
+    successors: %bb.2(0x30000000), %bb.3(0x50000000); %bb.2(37.50%), %bb.3(62.50%)
+    %4:gpr64common = PHI undef %0:gpr64all, %bb.0, %5:gpr64common, %bb.6
+    %6:gpr64 = LDRXui undef %1:gpr64common, 0 :: (load (s64))
+    STRXui killed %4:gpr64common, undef %1:gpr64common, 0 :: (store (s64))
+    CBNZX undef %6:gpr64, %bb.3
+
+  bb.2:
+    successors: %bb.5(0x80000000); %bb.5(100.00%)
+    %7:gpr64all = COPY killed %6:gpr64
+    B %bb.5
+
+  bb.3:
+    successors: %bb.5(0x04000000), %bb.4(0x7c000000); %bb.5(3.12%), %bb.4(96.88%)
+    dead $wzr = SUBSWrr killed undef %3:gpr32, killed undef %2:gpr32common, implicit-def $nzcv
+    Bcc 12, %bb.5, implicit killed undef $nzcv
+    B %bb.4
+
+  bb.4:
+    successors: %bb.5(0x04000000), %bb.3(0x7c000000); %bb.5(3.12%), %bb.3(96.88%)
+    dead $xzr = SUBSXrr killed undef %6:gpr64, killed undef %6:gpr64, implicit-def $nzcv
+    Bcc 1, %bb.3, implicit killed undef $nzcv
+
+  bb.5:
+    successors: %bb.7(0x04000000), %bb.6(0x7c000000); %bb.7(3.12%), %bb.6(96.88%)
+    %5:gpr64common = PHI %7:gpr64all, %bb.2, undef %0:gpr64all, %bb.3, undef %0:gpr64all, %bb.4
+    CBZX undef %5:gpr64common, %bb.7
+    B %bb.6
+
+  bb.6:
+    successors: %bb.7(0x04000000), %bb.1(0x7c000000); %bb.7(3.12%), %bb.1(96.88%)
+    dead $wzr = SUBSWrr killed undef %3:gpr32, killed undef %2:gpr32common, implicit-def $nzcv
+    Bcc 12, %bb.7, implicit killed undef $nzcv
+    B %bb.1
+
+  bb.7:
+    RET_ReallyLR
+...