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Refactor the pass to only support IntrinsicInst calls.
ReplaceWithVecLib used to support instructions, as AArch64 was using this
pass to replace a vectorized frem instruction to the fmod vector library
call (through TLI).
As this replacement is now done by the codegen (#83859), there is no need
for this pass to support instructions.
Additionally, removed 'frem' tests from:
- AArch64/replace-with-veclib-armpl.ll
- AArch64/replace-with-veclib-sleef-scalable.ll
- AArch64/replace-with-veclib-sleef.ll
Such testing is done at codegen level:
- #83859
define <2 x double> @llvm_cos_f64(<2 x double> %in) {
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; CHECK-LABEL: define <2 x double> @llvm_cos_f64
@@ -469,46 +469,6 @@ define <vscale x 4 x float> @llvm_tan_vscale_f32(<vscale x 4 x float> %in) #0 {
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ret <vscale x 4 x float> %1
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}
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-
define <2 x double> @frem_f64(<2 x double> %in) {
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-
; CHECK-LABEL: define <2 x double> @frem_f64
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-
; CHECK-SAME: (<2 x double> [[IN:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call <2 x double> @armpl_vfmodq_f64(<2 x double> [[IN]], <2 x double> [[IN]])
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-
; CHECK-NEXT: ret <2 x double> [[TMP1]]
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-
;
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-
%1= frem <2 x double> %in, %in
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ret <2 x double> %1
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-
}
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-
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-
define <4 x float> @frem_f32(<4 x float> %in) {
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; CHECK-LABEL: define <4 x float> @frem_f32
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-
; CHECK-SAME: (<4 x float> [[IN:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call <4 x float> @armpl_vfmodq_f32(<4 x float> [[IN]], <4 x float> [[IN]])
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; CHECK-NEXT: ret <4 x float> [[TMP1]]
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-
;
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-
%1= frem <4 x float> %in, %in
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ret <4 x float> %1
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-
}
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-
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-
define <vscale x 2 x double> @frem_vscale_f64(<vscale x 2 x double> %in) #0 {
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-
; CHECK-LABEL: define <vscale x 2 x double> @frem_vscale_f64
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-
; CHECK-SAME: (<vscale x 2 x double> [[IN:%.*]]) #[[ATTR1]] {
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-
; CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x double> @armpl_svfmod_f64_x(<vscale x 2 x double> [[IN]], <vscale x 2 x double> [[IN]], <vscale x 2 x i1> shufflevector (<vscale x 2 x i1> insertelement (<vscale x 2 x i1> poison, i1 true, i64 0), <vscale x 2 x i1> poison, <vscale x 2 x i32> zeroinitializer))
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-
; CHECK-NEXT: ret <vscale x 2 x double> [[TMP1]]
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-
;
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-
%1= frem <vscale x 2 x double> %in, %in
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ret <vscale x 2 x double> %1
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-
}
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-
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-
define <vscale x 4 x float> @frem_vscale_f32(<vscale x 4 x float> %in) #0 {
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; CHECK-LABEL: define <vscale x 4 x float> @frem_vscale_f32
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; CHECK-SAME: (<vscale x 4 x float> [[IN:%.*]]) #[[ATTR1]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x float> @armpl_svfmod_f32_x(<vscale x 4 x float> [[IN]], <vscale x 4 x float> [[IN]], <vscale x 4 x i1> shufflevector (<vscale x 4 x i1> insertelement (<vscale x 4 x i1> poison, i1 true, i64 0), <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer))
define <vscale x 2 x double> @llvm_ceil_vscale_f64(<vscale x 2 x double> %in) {
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; CHECK-LABEL: @llvm_ceil_vscale_f64(
@@ -403,24 +403,6 @@ define <vscale x 4 x float> @llvm_trunc_vscale_f32(<vscale x 4 x float> %in) {
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ret <vscale x 4 x float> %1
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}
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-
define <vscale x 2 x double> @frem_f64(<vscale x 2 x double> %in) {
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; CHECK-LABEL: @frem_f64(
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; CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_fmod(<vscale x 2 x double> [[IN:%.*]], <vscale x 2 x double> [[IN]], <vscale x 2 x i1> shufflevector (<vscale x 2 x i1> insertelement (<vscale x 2 x i1> poison, i1 true, i64 0), <vscale x 2 x i1> poison, <vscale x 2 x i32> zeroinitializer))
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; CHECK-NEXT: ret <vscale x 2 x double> [[TMP1]]
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;
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%1= frem <vscale x 2 x double> %in, %in
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ret <vscale x 2 x double> %1
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-
}
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-
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define <vscale x 4 x float> @frem_f32(<vscale x 4 x float> %in) {
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; CHECK-LABEL: @frem_f32(
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; CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_fmodf(<vscale x 4 x float> [[IN:%.*]], <vscale x 4 x float> [[IN]], <vscale x 4 x i1> shufflevector (<vscale x 4 x i1> insertelement (<vscale x 4 x i1> poison, i1 true, i64 0), <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer))
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; CHECK-NEXT: ret <vscale x 4 x float> [[TMP1]]
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;
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%1= frem <vscale x 4 x float> %in, %in
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ret <vscale x 4 x float> %1
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}
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-
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declare <vscale x 2 x double> @llvm.ceil.nxv2f64(<vscale x 2 x double>)
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declare <vscale x 4 x float> @llvm.ceil.nxv4f32(<vscale x 4 x float>)
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declare <vscale x 2 x double> @llvm.copysign.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>)
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