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[X86][APX] Remove KEYLOCKER and SHA promotions from EVEX MAP4. (#89173)
APX spec: https://cdrdv2.intel.com/v1/dl/getContent/784266 Change happended in version 4.0. Removed instructions' Opcodes: AESDEC128KL AESDEC256KL AESDECWIDE128KL AESDECWIDE256KL AESENC128KL AESENC256KL AESENCWIDE128KL AESENCWIDE256KL ENCODEKEY128 ENCODEKEY256 SHA1MSG1 SHA1MSG2 SHA1NEXTE SHA1RNDS4 SHA256MSG1 SHA256MSG2 SHA256RNDS2
1 parent 08a787c commit de3e4a9

15 files changed

+36
-1015
lines changed

‎llvm/lib/Target/X86/X86ISelDAGToDAG.cpp

Lines changed: 7 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -5046,17 +5046,17 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
50465046
switch (IntNo) {
50475047
default: llvm_unreachable("Impossible intrinsic");
50485048
case Intrinsic::x86_encodekey128:
5049-
Opcode = GET_EGPR_IF_ENABLED(X86::ENCODEKEY128);
5049+
Opcode = X86::ENCODEKEY128;
50505050
break;
50515051
case Intrinsic::x86_encodekey256:
5052-
Opcode = GET_EGPR_IF_ENABLED(X86::ENCODEKEY256);
5052+
Opcode = X86::ENCODEKEY256;
50535053
break;
50545054
}
50555055

50565056
SDValue Chain = Node->getOperand(0);
50575057
Chain = CurDAG->getCopyToReg(Chain, dl, X86::XMM0, Node->getOperand(3),
50585058
SDValue());
5059-
if (Opcode == X86::ENCODEKEY256 || Opcode == X86::ENCODEKEY256_EVEX)
5059+
if (Opcode == X86::ENCODEKEY256)
50605060
Chain = CurDAG->getCopyToReg(Chain, dl, X86::XMM1, Node->getOperand(4),
50615061
Chain.getValue(1));
50625062

@@ -6475,18 +6475,17 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
64756475
default:
64766476
llvm_unreachable("Unexpected opcode!");
64776477
case X86ISD::AESENCWIDE128KL:
6478-
Opcode = GET_EGPR_IF_ENABLED(X86::AESENCWIDE128KL);
6478+
Opcode = X86::AESENCWIDE128KL;
64796479
break;
64806480
case X86ISD::AESDECWIDE128KL:
6481-
Opcode = GET_EGPR_IF_ENABLED(X86::AESDECWIDE128KL);
6481+
Opcode = X86::AESDECWIDE128KL;
64826482
break;
64836483
case X86ISD::AESENCWIDE256KL:
6484-
Opcode = GET_EGPR_IF_ENABLED(X86::AESENCWIDE256KL);
6484+
Opcode = X86::AESENCWIDE256KL;
64856485
break;
64866486
case X86ISD::AESDECWIDE256KL:
6487-
Opcode = GET_EGPR_IF_ENABLED(X86::AESDECWIDE256KL);
6487+
Opcode = X86::AESDECWIDE256KL;
64886488
break;
6489-
#undef GET_EGPR_IF_ENABLED
64906489
}
64916490

64926491
SDValue Chain = Node->getOperand(0);

‎llvm/lib/Target/X86/X86InstrAsmAlias.td

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -899,6 +899,3 @@ def : InstAlias<"sha256rnds2\t{$src2, $dst|$dst, $src2}",
899899
(SHA256RNDS2rr VR128:$dst, VR128:$src2), 0>;
900900
def : InstAlias<"sha256rnds2\t{$src2, $dst|$dst, $src2}",
901901
(SHA256RNDS2rm VR128:$dst, i128mem:$src2), 0>;
902-
903-
def : InstAlias<"sha256rnds2\t{$src2, $dst|$dst, $src2}",
904-
(SHA256RNDS2rm_EVEX VR128:$dst, i128mem:$src2), 0>;

‎llvm/lib/Target/X86/X86InstrKL.td

Lines changed: 2 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -48,7 +48,7 @@ let SchedRW = [WriteSystem] in {
4848
[(int_x86_loadiwkey XMM0, VR128:$src1, VR128:$src2, EAX)]>, T8, XS;
4949
}
5050

51-
let Predicates = [HasKL, NoEGPR] in {
51+
let Predicates = [HasKL] in {
5252
let Uses = [XMM0], Defs = [XMM0, XMM1, XMM2, XMM4, XMM5, XMM6, EFLAGS] in
5353
def ENCODEKEY128 : Encodekey<0xFA, "encodekey128">, T8;
5454

@@ -58,17 +58,6 @@ let SchedRW = [WriteSystem] in {
5858
let Constraints = "$src1 = $dst", Defs = [EFLAGS] in
5959
defm "" : Aesencdec<"">, T8;
6060
}
61-
62-
let Predicates = [HasKL, HasEGPR, In64BitMode] in {
63-
let Uses = [XMM0], Defs = [XMM0, XMM1, XMM2, XMM4, XMM5, XMM6, EFLAGS] in
64-
def ENCODEKEY128_EVEX : Encodekey<0xDA, "encodekey128">, EVEX, T_MAP4;
65-
66-
let Uses = [XMM0, XMM1], Defs = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, EFLAGS] in
67-
def ENCODEKEY256_EVEX : Encodekey<0xDB, "encodekey256">, EVEX, T_MAP4;
68-
69-
let Constraints = "$src1 = $dst", Defs = [EFLAGS] in
70-
defm "" : Aesencdec<"_EVEX">, EVEX, T_MAP4;
71-
}
7261
} // SchedRW
7362

7463
multiclass Aesencdecwide<string suffix> {
@@ -80,9 +69,6 @@ multiclass Aesencdecwide<string suffix> {
8069

8170
let SchedRW = [WriteSystem], Uses = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7],
8271
Defs = [EFLAGS, XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7], mayLoad = 1 in {
83-
let Predicates = [HasWIDEKL, NoEGPR] in
72+
let Predicates = [HasWIDEKL] in
8473
defm "" : Aesencdecwide<"">, T8;
85-
86-
let Predicates = [HasWIDEKL, HasEGPR, In64BitMode] in
87-
defm "" : Aesencdecwide<"_EVEX">, EVEX, T_MAP4;
8874
} // SchedRW

‎llvm/lib/Target/X86/X86InstrSSE.td

Lines changed: 24 additions & 65 deletions
Original file line numberDiff line numberDiff line change
@@ -6726,31 +6726,31 @@ let Predicates = [HasCRC32, HasEGPR, In64BitMode], OpMap = T_MAP4, OpEnc = EncEV
67266726

67276727
// FIXME: Is there a better scheduler class for SHA than WriteVecIMul?
67286728
multiclass SHAI_binop<bits<8> Opc, string OpcodeStr, Intrinsic IntId,
6729-
X86FoldableSchedWrite sched, string Suffix = "", bit UsesXMM0 = 0> {
6730-
def rr#Suffix : I<Opc, MRMSrcReg, (outs VR128:$dst),
6731-
(ins VR128:$src1, VR128:$src2),
6732-
!if(UsesXMM0,
6733-
!strconcat(OpcodeStr, "\t{%xmm0, $src2, $dst|$dst, $src2, xmm0}"),
6734-
!strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}")),
6735-
[!if(UsesXMM0,
6736-
(set VR128:$dst, (IntId VR128:$src1, VR128:$src2, XMM0)),
6737-
(set VR128:$dst, (IntId VR128:$src1, VR128:$src2)))]>,
6738-
T8, Sched<[sched]>;
6739-
6740-
def rm#Suffix : I<Opc, MRMSrcMem, (outs VR128:$dst),
6741-
(ins VR128:$src1, i128mem:$src2),
6742-
!if(UsesXMM0,
6743-
!strconcat(OpcodeStr, "\t{%xmm0, $src2, $dst|$dst, $src2, xmm0}"),
6744-
!strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}")),
6745-
[!if(UsesXMM0,
6746-
(set VR128:$dst, (IntId VR128:$src1,
6747-
(memop addr:$src2), XMM0)),
6748-
(set VR128:$dst, (IntId VR128:$src1,
6749-
(memop addr:$src2))))]>, T8,
6750-
Sched<[sched.Folded, sched.ReadAfterFold]>;
6729+
X86FoldableSchedWrite sched, bit UsesXMM0 = 0> {
6730+
def rr : I<Opc, MRMSrcReg, (outs VR128:$dst),
6731+
(ins VR128:$src1, VR128:$src2),
6732+
!if(UsesXMM0,
6733+
!strconcat(OpcodeStr, "\t{%xmm0, $src2, $dst|$dst, $src2, xmm0}"),
6734+
!strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}")),
6735+
[!if(UsesXMM0,
6736+
(set VR128:$dst, (IntId VR128:$src1, VR128:$src2, XMM0)),
6737+
(set VR128:$dst, (IntId VR128:$src1, VR128:$src2)))]>,
6738+
T8, Sched<[sched]>;
6739+
6740+
def rm : I<Opc, MRMSrcMem, (outs VR128:$dst),
6741+
(ins VR128:$src1, i128mem:$src2),
6742+
!if(UsesXMM0,
6743+
!strconcat(OpcodeStr, "\t{%xmm0, $src2, $dst|$dst, $src2, xmm0}"),
6744+
!strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}")),
6745+
[!if(UsesXMM0,
6746+
(set VR128:$dst, (IntId VR128:$src1,
6747+
(memop addr:$src2), XMM0)),
6748+
(set VR128:$dst, (IntId VR128:$src1,
6749+
(memop addr:$src2))))]>, T8,
6750+
Sched<[sched.Folded, sched.ReadAfterFold]>;
67516751
}
67526752

6753-
let Constraints = "$src1 = $dst", Predicates = [HasSHA, NoEGPR] in {
6753+
let Constraints = "$src1 = $dst", Predicates = [HasSHA] in {
67546754
def SHA1RNDS4rri : Ii8<0xCC, MRMSrcReg, (outs VR128:$dst),
67556755
(ins VR128:$src1, VR128:$src2, u8imm:$src3),
67566756
"sha1rnds4\t{$src3, $src2, $dst|$dst, $src2, $src3}",
@@ -6777,55 +6777,14 @@ let Constraints = "$src1 = $dst", Predicates = [HasSHA, NoEGPR] in {
67776777

67786778
let Uses=[XMM0] in
67796779
defm SHA256RNDS2 : SHAI_binop<0xCB, "sha256rnds2", int_x86_sha256rnds2,
6780-
SchedWriteVecIMul.XMM, "", 1>;
6780+
SchedWriteVecIMul.XMM, 1>;
67816781

67826782
defm SHA256MSG1 : SHAI_binop<0xCC, "sha256msg1", int_x86_sha256msg1,
67836783
SchedWriteVecIMul.XMM>;
67846784
defm SHA256MSG2 : SHAI_binop<0xCD, "sha256msg2", int_x86_sha256msg2,
67856785
SchedWriteVecIMul.XMM>;
67866786
}
67876787

6788-
let Constraints = "$src1 = $dst", Predicates = [HasSHA, HasEGPR, In64BitMode] in {
6789-
def SHA1RNDS4rri_EVEX: Ii8<0xD4, MRMSrcReg, (outs VR128:$dst),
6790-
(ins VR128:$src1, VR128:$src2, u8imm:$src3),
6791-
"sha1rnds4\t{$src3, $src2, $dst|$dst, $src2, $src3}",
6792-
[(set VR128:$dst,
6793-
(int_x86_sha1rnds4 VR128:$src1, VR128:$src2,
6794-
(i8 timm:$src3)))]>,
6795-
EVEX, NoCD8, T_MAP4, Sched<[SchedWriteVecIMul.XMM]>;
6796-
def SHA1RNDS4rmi_EVEX: Ii8<0xD4, MRMSrcMem, (outs VR128:$dst),
6797-
(ins VR128:$src1, i128mem:$src2, u8imm:$src3),
6798-
"sha1rnds4\t{$src3, $src2, $dst|$dst, $src2, $src3}",
6799-
[(set VR128:$dst,
6800-
(int_x86_sha1rnds4 VR128:$src1,
6801-
(memop addr:$src2),
6802-
(i8 timm:$src3)))]>,
6803-
EVEX, NoCD8, T_MAP4,
6804-
Sched<[SchedWriteVecIMul.XMM.Folded,
6805-
SchedWriteVecIMul.XMM.ReadAfterFold]>;
6806-
6807-
defm SHA1NEXTE : SHAI_binop<0xD8, "sha1nexte", int_x86_sha1nexte,
6808-
SchedWriteVecIMul.XMM, "_EVEX">,
6809-
EVEX, NoCD8, T_MAP4;
6810-
defm SHA1MSG1 : SHAI_binop<0xD9, "sha1msg1", int_x86_sha1msg1,
6811-
SchedWriteVecIMul.XMM, "_EVEX">,
6812-
EVEX, NoCD8, T_MAP4;
6813-
defm SHA1MSG2 : SHAI_binop<0xDA, "sha1msg2", int_x86_sha1msg2,
6814-
SchedWriteVecIMul.XMM, "_EVEX">,
6815-
EVEX, NoCD8, T_MAP4;
6816-
6817-
let Uses=[XMM0] in
6818-
defm SHA256RNDS2 : SHAI_binop<0xDB, "sha256rnds2", int_x86_sha256rnds2,
6819-
SchedWriteVecIMul.XMM, "_EVEX", 1>,
6820-
EVEX, NoCD8, T_MAP4;
6821-
6822-
defm SHA256MSG1 : SHAI_binop<0xDC, "sha256msg1", int_x86_sha256msg1,
6823-
SchedWriteVecIMul.XMM, "_EVEX">,
6824-
EVEX, NoCD8, T_MAP4;
6825-
defm SHA256MSG2 : SHAI_binop<0xDD, "sha256msg2", int_x86_sha256msg2,
6826-
SchedWriteVecIMul.XMM, "_EVEX">,
6827-
EVEX, NoCD8, T_MAP4;
6828-
}
68296788

68306789
//===----------------------------------------------------------------------===//
68316790
// AES-NI Instructions

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