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RegisterCoalescer: Avoid redundant implicit-def on rematerialize
If this was coalescing a def of a subregister with a def of the super register, it was introducing a redundant super-register def and marking the subregister def as dead. Resulting in something like: dead $eax = MOVr0, implicit-def $rax, implicit-def $rax Avoid this by checking if the new instruction already has the super def, so we end up with this instead: dead $eax = MOVr0, implicit-def $rax The dead flag looks suspicious to me, seems like it's easy to buggily interpret dead def of subreg and a non-dead def of an aliasing register. It seems to be intentional though. https://reviews.llvm.org/D156343
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llvm/lib/CodeGen/RegisterCoalescer.cpp

Lines changed: 11 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1416,6 +1416,8 @@ bool RegisterCoalescer::reMaterializeTrivialDef(const CoalescerPair &CP,
14161416
// $edi = MOV32r0 implicit-def dead $eflags, implicit-def $rdi
14171417
// undef %0.sub_32bit = MOV32r0 implicit-def dead $eflags, implicit-def %0
14181418

1419+
bool NewMIDefinesFullReg = false;
1420+
14191421
SmallVector<MCRegister, 4> NewMIImplDefs;
14201422
for (unsigned i = NewMI.getDesc().getNumOperands(),
14211423
e = NewMI.getNumOperands();
@@ -1424,6 +1426,9 @@ bool RegisterCoalescer::reMaterializeTrivialDef(const CoalescerPair &CP,
14241426
if (MO.isReg() && MO.isDef()) {
14251427
assert(MO.isImplicit());
14261428
if (MO.getReg().isPhysical()) {
1429+
if (MO.getReg() == DstReg)
1430+
NewMIDefinesFullReg = true;
1431+
14271432
assert(MO.isImplicit() && MO.getReg().isPhysical() &&
14281433
(MO.isDead() ||
14291434
(DefSubIdx && (TRI->getSubReg(MO.getReg(), DefSubIdx) ==
@@ -1552,8 +1557,12 @@ bool RegisterCoalescer::reMaterializeTrivialDef(const CoalescerPair &CP,
15521557
assert(DstReg.isPhysical() &&
15531558
"Only expect virtual or physical registers in remat");
15541559
NewMI.getOperand(0).setIsDead(true);
1555-
NewMI.addOperand(MachineOperand::CreateReg(
1556-
CopyDstReg, true /*IsDef*/, true /*IsImp*/, false /*IsKill*/));
1560+
1561+
if (!NewMIDefinesFullReg) {
1562+
NewMI.addOperand(MachineOperand::CreateReg(
1563+
CopyDstReg, true /*IsDef*/, true /*IsImp*/, false /*IsKill*/));
1564+
}
1565+
15571566
// Record small dead def live-ranges for all the subregisters
15581567
// of the destination register.
15591568
// Otherwise, variables that live through may miss some

llvm/test/CodeGen/X86/rematerialize-sub-super-reg.mir

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -116,8 +116,6 @@ body: |
116116

117117
# Handle that rematerializing an instruction with an implicit def of a
118118
# virtual super register into a physical register works.
119-
#
120-
# FIXME: Resulting rematerializing has a redundant implicit-def
121119
---
122120
name: rematerialize_subregister_into_superreg_def_with_impdef_physreg
123121
tracksRegLiveness: true
@@ -134,7 +132,7 @@ body: |
134132
; CHECK-NEXT: bb.1:
135133
; CHECK-NEXT: successors: %bb.1(0x80000000)
136134
; CHECK-NEXT: {{ $}}
137-
; CHECK-NEXT: dead $eax = MOV32ri -11, implicit-def $rax, implicit-def $rax
135+
; CHECK-NEXT: dead $eax = MOV32ri -11, implicit-def $rax
138136
; CHECK-NEXT: CMP64ri8 %t3, 1, implicit-def $eflags
139137
; CHECK-NEXT: JCC_1 %bb.1, 4, implicit killed $eflags
140138
; CHECK-NEXT: RET 0, $rax

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