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[X86][AVX] Add VMOVDDUP-VPBROADCASTQ execution domain mapping
Noticed in D57514. Differential Revision: https://reviews.llvm.org/D57519 llvm-svn: 352922
1 parent 33706e3 commit e95550f

27 files changed

+261
-298
lines changed

‎llvm/lib/Target/X86/X86InstrInfo.cpp

+4
Original file line numberDiff line numberDiff line change
@@ -6040,6 +6040,8 @@ static const uint16_t ReplaceableInstrs[][3] = {
60406040
{ X86::VBROADCASTSSZ256m, X86::VBROADCASTSSZ256m, X86::VPBROADCASTDZ256m },
60416041
{ X86::VBROADCASTSSZr, X86::VBROADCASTSSZr, X86::VPBROADCASTDZr },
60426042
{ X86::VBROADCASTSSZm, X86::VBROADCASTSSZm, X86::VPBROADCASTDZm },
6043+
{ X86::VMOVDDUPZ128rr, X86::VMOVDDUPZ128rr, X86::VPBROADCASTQZ128r },
6044+
{ X86::VMOVDDUPZ128rm, X86::VMOVDDUPZ128rm, X86::VPBROADCASTQZ128m },
60436045
{ X86::VBROADCASTSDZ256r, X86::VBROADCASTSDZ256r, X86::VPBROADCASTQZ256r },
60446046
{ X86::VBROADCASTSDZ256m, X86::VBROADCASTSDZ256m, X86::VPBROADCASTQZ256m },
60456047
{ X86::VBROADCASTSDZr, X86::VBROADCASTSDZr, X86::VPBROADCASTQZr },
@@ -6130,6 +6132,8 @@ static const uint16_t ReplaceableInstrsAVX2[][3] = {
61306132
{ X86::VPERM2F128rr, X86::VPERM2F128rr, X86::VPERM2I128rr },
61316133
{ X86::VBROADCASTSSrm, X86::VBROADCASTSSrm, X86::VPBROADCASTDrm},
61326134
{ X86::VBROADCASTSSrr, X86::VBROADCASTSSrr, X86::VPBROADCASTDrr},
6135+
{ X86::VMOVDDUPrm, X86::VMOVDDUPrm, X86::VPBROADCASTQrm},
6136+
{ X86::VMOVDDUPrr, X86::VMOVDDUPrr, X86::VPBROADCASTQrr},
61336137
{ X86::VBROADCASTSSYrr, X86::VBROADCASTSSYrr, X86::VPBROADCASTDYrr},
61346138
{ X86::VBROADCASTSSYrm, X86::VBROADCASTSSYrm, X86::VPBROADCASTDYrm},
61356139
{ X86::VBROADCASTSDYrr, X86::VBROADCASTSDYrr, X86::VPBROADCASTQYrr},

‎llvm/test/CodeGen/X86/avx2-intrinsics-fast-isel.ll

+1-1
Original file line numberDiff line numberDiff line change
@@ -319,7 +319,7 @@ define <4 x i64> @test_mm256_broadcastd_epi32(<4 x i64> %a0) {
319319
define <2 x i64> @test_mm_broadcastq_epi64(<2 x i64> %a0) {
320320
; CHECK-LABEL: test_mm_broadcastq_epi64:
321321
; CHECK: # %bb.0:
322-
; CHECK-NEXT: vpbroadcastq %xmm0, %xmm0
322+
; CHECK-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
323323
; CHECK-NEXT: ret{{[l|q]}}
324324
%res = shufflevector <2 x i64> %a0, <2 x i64> undef, <2 x i32> zeroinitializer
325325
ret <2 x i64> %res

‎llvm/test/CodeGen/X86/avx2-intrinsics-x86-upgrade.ll

+1-1
Original file line numberDiff line numberDiff line change
@@ -234,7 +234,7 @@ declare <8 x i32> @llvm.x86.avx2.pbroadcastd.256(<4 x i32>) nounwind readonly
234234
define <2 x i64> @test_x86_avx2_pbroadcastq_128(<2 x i64> %a0) {
235235
; CHECK-LABEL: test_x86_avx2_pbroadcastq_128:
236236
; CHECK: ## %bb.0:
237-
; CHECK-NEXT: vpbroadcastq %xmm0, %xmm0
237+
; CHECK-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
238238
; CHECK-NEXT: ret{{[l|q]}}
239239
%res = call <2 x i64> @llvm.x86.avx2.pbroadcastq.128(<2 x i64> %a0)
240240
ret <2 x i64> %res

‎llvm/test/CodeGen/X86/avx2-vbroadcast.ll

+10-10
Original file line numberDiff line numberDiff line change
@@ -189,12 +189,12 @@ define <2 x i64> @Q64(i64* %ptr) nounwind uwtable readnone ssp {
189189
; X32-LABEL: Q64:
190190
; X32: ## %bb.0: ## %entry
191191
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
192-
; X32-NEXT: vpbroadcastq (%eax), %xmm0
192+
; X32-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
193193
; X32-NEXT: retl
194194
;
195195
; X64-LABEL: Q64:
196196
; X64: ## %bb.0: ## %entry
197-
; X64-NEXT: vpbroadcastq (%rdi), %xmm0
197+
; X64-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
198198
; X64-NEXT: retq
199199
entry:
200200
%q = load i64, i64* %ptr, align 4
@@ -233,7 +233,7 @@ define <8 x i16> @broadcast_mem_v4i16_v8i16(<4 x i16>* %ptr) {
233233
;
234234
; X64-LABEL: broadcast_mem_v4i16_v8i16:
235235
; X64: ## %bb.0:
236-
; X64-NEXT: vpbroadcastq (%rdi), %xmm0
236+
; X64-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
237237
; X64-NEXT: retq
238238
%load = load <4 x i16>, <4 x i16>* %ptr
239239
%shuf = shufflevector <4 x i16> %load, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
@@ -471,7 +471,7 @@ define <2 x i64> @load_splat_2i64_2i64_1111(<2 x i64>* %ptr) nounwind uwtable re
471471
;
472472
; X64-LABEL: load_splat_2i64_2i64_1111:
473473
; X64: ## %bb.0: ## %entry
474-
; X64-NEXT: vpbroadcastq 8(%rdi), %xmm0
474+
; X64-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
475475
; X64-NEXT: retq
476476
entry:
477477
%ld = load <2 x i64>, <2 x i64>* %ptr
@@ -865,12 +865,12 @@ define <4 x i64> @_inreg4xi64(<4 x i64> %a) {
865865
define <2 x i64> @_inreg2xi64(<2 x i64> %a) {
866866
; X32-LABEL: _inreg2xi64:
867867
; X32: ## %bb.0:
868-
; X32-NEXT: vpbroadcastq %xmm0, %xmm0
868+
; X32-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
869869
; X32-NEXT: retl
870870
;
871871
; X64-LABEL: _inreg2xi64:
872872
; X64: ## %bb.0:
873-
; X64-NEXT: vpbroadcastq %xmm0, %xmm0
873+
; X64-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
874874
; X64-NEXT: retq
875875
%b = shufflevector <2 x i64> %a, <2 x i64> undef, <2 x i32> zeroinitializer
876876
ret <2 x i64> %b
@@ -1327,19 +1327,19 @@ define void @isel_crash_2q(i64* %cV_R.addr) {
13271327
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
13281328
; X32-NEXT: vxorps %xmm0, %xmm0, %xmm0
13291329
; X32-NEXT: vmovaps %xmm0, (%esp)
1330-
; X32-NEXT: vpbroadcastq (%eax), %xmm1
1330+
; X32-NEXT: vmovddup {{.*#+}} xmm1 = mem[0,0]
13311331
; X32-NEXT: vmovaps %xmm0, {{[0-9]+}}(%esp)
1332-
; X32-NEXT: vmovdqa %xmm1, {{[0-9]+}}(%esp)
1332+
; X32-NEXT: vmovaps %xmm1, {{[0-9]+}}(%esp)
13331333
; X32-NEXT: addl $60, %esp
13341334
; X32-NEXT: retl
13351335
;
13361336
; X64-LABEL: isel_crash_2q:
13371337
; X64: ## %bb.0: ## %entry
13381338
; X64-NEXT: vxorps %xmm0, %xmm0, %xmm0
13391339
; X64-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
1340-
; X64-NEXT: vpbroadcastq (%rdi), %xmm1
1340+
; X64-NEXT: vmovddup {{.*#+}} xmm1 = mem[0,0]
13411341
; X64-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
1342-
; X64-NEXT: vmovdqa %xmm1, -{{[0-9]+}}(%rsp)
1342+
; X64-NEXT: vmovaps %xmm1, -{{[0-9]+}}(%rsp)
13431343
; X64-NEXT: retq
13441344
entry:
13451345
%__a.addr.i = alloca <2 x i64>, align 16

‎llvm/test/CodeGen/X86/avx512-shuffles/broadcast-scalar-int.ll

+1-1
Original file line numberDiff line numberDiff line change
@@ -2324,7 +2324,7 @@ define <16 x i32> @test_masked_z_i32_to_16_mem_mask3(i32* %p, <16 x i32> %mask)
23242324
define <2 x i64> @test_i64_to_2_mem(i64* %p) {
23252325
; CHECK-LABEL: test_i64_to_2_mem:
23262326
; CHECK: # %bb.0:
2327-
; CHECK-NEXT: vpbroadcastq (%rdi), %xmm0
2327+
; CHECK-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
23282328
; CHECK-NEXT: retq
23292329
%s = load i64, i64* %p
23302330
%vec = insertelement <2 x i64> undef, i64 %s, i32 0

‎llvm/test/CodeGen/X86/avx512-shuffles/broadcast-vector-int.ll

+2-2
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@
66
define <4 x i32> @test_2xi32_to_4xi32(<4 x i32> %vec) {
77
; CHECK-LABEL: test_2xi32_to_4xi32:
88
; CHECK: # %bb.0:
9-
; CHECK-NEXT: vpbroadcastq %xmm0, %xmm0
9+
; CHECK-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
1010
; CHECK-NEXT: retq
1111
%res = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
1212
ret <4 x i32> %res
@@ -318,7 +318,7 @@ define <16 x i32> @test_masked_z_2xi32_to_16xi32_mask3(<16 x i32> %vec, <16 x i3
318318
define <4 x i32> @test_2xi32_to_4xi32_mem(<2 x i32>* %vp) {
319319
; CHECK-LABEL: test_2xi32_to_4xi32_mem:
320320
; CHECK: # %bb.0:
321-
; CHECK-NEXT: vpbroadcastq (%rdi), %xmm0
321+
; CHECK-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
322322
; CHECK-NEXT: retq
323323
%vec = load <2 x i32>, <2 x i32>* %vp
324324
%res = shufflevector <2 x i32> %vec, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>

‎llvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll

+3-3
Original file line numberDiff line numberDiff line change
@@ -1160,9 +1160,9 @@ define <4 x i32> @test_masked_z_8xi32_to_4xi32_perm_mem_mask2(<8 x i32>* %vp, <4
11601160
define <4 x i32> @test_8xi32_to_4xi32_perm_mem_mask3(<8 x i32>* %vp) {
11611161
; CHECK-LABEL: test_8xi32_to_4xi32_perm_mem_mask3:
11621162
; CHECK: # %bb.0:
1163-
; CHECK-NEXT: vpshufd {{.*#+}} xmm0 = mem[1,1,2,3]
1164-
; CHECK-NEXT: vpbroadcastq 8(%rdi), %xmm1
1165-
; CHECK-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
1163+
; CHECK-NEXT: vpermilps {{.*#+}} xmm0 = mem[1,1,2,3]
1164+
; CHECK-NEXT: vmovddup {{.*#+}} xmm1 = mem[0,0]
1165+
; CHECK-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
11661166
; CHECK-NEXT: retq
11671167
%vec = load <8 x i32>, <8 x i32>* %vp
11681168
%res = shufflevector <8 x i32> %vec, <8 x i32> undef, <4 x i32> <i32 5, i32 3, i32 2, i32 7>

‎llvm/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll

+1-1
Original file line numberDiff line numberDiff line change
@@ -2104,7 +2104,7 @@ define <4 x i64> @test_mm256_maskz_broadcastd_epi32(i8 %a0, <2 x i64> %a1) {
21042104
define <2 x i64> @test_mm_broadcastq_epi64(<2 x i64> %a0) {
21052105
; CHECK-LABEL: test_mm_broadcastq_epi64:
21062106
; CHECK: # %bb.0:
2107-
; CHECK-NEXT: vpbroadcastq %xmm0, %xmm0
2107+
; CHECK-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
21082108
; CHECK-NEXT: ret{{[l|q]}}
21092109
%res = shufflevector <2 x i64> %a0, <2 x i64> undef, <2 x i32> zeroinitializer
21102110
ret <2 x i64> %res

‎llvm/test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll

+3-2
Original file line numberDiff line numberDiff line change
@@ -3910,8 +3910,9 @@ define <2 x i64> @test_mask_andnot_epi64_rmb_128(<2 x i64> %a, i64* %ptr_b) {
39103910
; X86-LABEL: test_mask_andnot_epi64_rmb_128:
39113911
; X86: # %bb.0:
39123912
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
3913-
; X86-NEXT: vpbroadcastq (%eax), %xmm1 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0x59,0x08]
3914-
; X86-NEXT: vpandn %xmm1, %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf9,0xdf,0xc1]
3913+
; X86-NEXT: vmovddup (%eax), %xmm1 # EVEX TO VEX Compression encoding: [0xc5,0xfb,0x12,0x08]
3914+
; X86-NEXT: # xmm1 = mem[0,0]
3915+
; X86-NEXT: vandnps %xmm1, %xmm0, %xmm0 # encoding: [0xc5,0xf8,0x55,0xc1]
39153916
; X86-NEXT: retl # encoding: [0xc3]
39163917
;
39173918
; X64-LABEL: test_mask_andnot_epi64_rmb_128:

‎llvm/test/CodeGen/X86/broadcast-elm-cross-splat-vec.ll

+5-7
Original file line numberDiff line numberDiff line change
@@ -95,8 +95,7 @@ define <16 x i8> @f16xi8_i64(<16 x i8> %a) {
9595
;
9696
; ALL32-LABEL: f16xi8_i64:
9797
; ALL32: # %bb.0:
98-
; ALL32-NEXT: vmovddup {{.*#+}} xmm1 = [7.9499288951273625E-275,7.9499288951273625E-275]
99-
; ALL32-NEXT: # xmm1 = mem[0,0]
98+
; ALL32-NEXT: vpbroadcastq {{.*#+}} xmm1 = [7.9499288951273625E-275,7.9499288951273625E-275]
10099
; ALL32-NEXT: vpaddb %xmm1, %xmm0, %xmm0
101100
; ALL32-NEXT: vpand %xmm1, %xmm0, %xmm0
102101
; ALL32-NEXT: retl
@@ -692,8 +691,7 @@ define <8 x i16> @f8xi16_i64(<8 x i16> %a) {
692691
;
693692
; ALL32-LABEL: f8xi16_i64:
694693
; ALL32: # %bb.0:
695-
; ALL32-NEXT: vmovddup {{.*#+}} xmm1 = [4.1720559249406128E-309,4.1720559249406128E-309]
696-
; ALL32-NEXT: # xmm1 = mem[0,0]
694+
; ALL32-NEXT: vpbroadcastq {{.*#+}} xmm1 = [4.1720559249406128E-309,4.1720559249406128E-309]
697695
; ALL32-NEXT: vpaddw %xmm1, %xmm0, %xmm0
698696
; ALL32-NEXT: vpand %xmm1, %xmm0, %xmm0
699697
; ALL32-NEXT: retl
@@ -1147,8 +1145,7 @@ define <4 x i32> @f4xi32_i64(<4 x i32> %a) {
11471145
;
11481146
; ALL32-LABEL: f4xi32_i64:
11491147
; ALL32: # %bb.0:
1150-
; ALL32-NEXT: vmovddup {{.*#+}} xmm1 = [2.1219957909652723E-314,2.1219957909652723E-314]
1151-
; ALL32-NEXT: # xmm1 = mem[0,0]
1148+
; ALL32-NEXT: vpbroadcastq {{.*#+}} xmm1 = [2.1219957909652723E-314,2.1219957909652723E-314]
11521149
; ALL32-NEXT: vpaddd %xmm1, %xmm0, %xmm0
11531150
; ALL32-NEXT: vpand %xmm1, %xmm0, %xmm0
11541151
; ALL32-NEXT: retl
@@ -1624,7 +1621,8 @@ define <4 x float> @f4xf32_f64(<4 x float> %a) {
16241621
;
16251622
; ALL64-LABEL: f4xf32_f64:
16261623
; ALL64: # %bb.0:
1627-
; ALL64-NEXT: vpbroadcastq {{.*#+}} xmm1 = [4575657222482165760,4575657222482165760]
1624+
; ALL64-NEXT: vmovddup {{.*#+}} xmm1 = [4575657222482165760,4575657222482165760]
1625+
; ALL64-NEXT: # xmm1 = mem[0,0]
16281626
; ALL64-NEXT: vaddps %xmm1, %xmm0, %xmm0
16291627
; ALL64-NEXT: vdivps %xmm0, %xmm1, %xmm0
16301628
; ALL64-NEXT: retq

‎llvm/test/CodeGen/X86/insert-loaded-scalar.ll

+4-9
Original file line numberDiff line numberDiff line change
@@ -178,15 +178,10 @@ define <2 x i64> @load64_ins_eltc_v2i64(i64* %p) nounwind {
178178
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
179179
; SSE-NEXT: retq
180180
;
181-
; AVX1-LABEL: load64_ins_eltc_v2i64:
182-
; AVX1: # %bb.0:
183-
; AVX1-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
184-
; AVX1-NEXT: retq
185-
;
186-
; AVX2-LABEL: load64_ins_eltc_v2i64:
187-
; AVX2: # %bb.0:
188-
; AVX2-NEXT: vpbroadcastq (%rdi), %xmm0
189-
; AVX2-NEXT: retq
181+
; AVX-LABEL: load64_ins_eltc_v2i64:
182+
; AVX: # %bb.0:
183+
; AVX-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
184+
; AVX-NEXT: retq
190185
%x = load i64, i64* %p
191186
%ins = insertelement <2 x i64> undef, i64 %x, i32 1
192187
ret <2 x i64> %ins

‎llvm/test/CodeGen/X86/insertelement-var-index.ll

+4-9
Original file line numberDiff line numberDiff line change
@@ -203,15 +203,10 @@ define <2 x i64> @load_i64_v2i64(i64* %p, i32 %y) nounwind {
203203
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
204204
; SSE-NEXT: retq
205205
;
206-
; AVX1-LABEL: load_i64_v2i64:
207-
; AVX1: # %bb.0:
208-
; AVX1-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
209-
; AVX1-NEXT: retq
210-
;
211-
; AVX2-LABEL: load_i64_v2i64:
212-
; AVX2: # %bb.0:
213-
; AVX2-NEXT: vpbroadcastq (%rdi), %xmm0
214-
; AVX2-NEXT: retq
206+
; AVX-LABEL: load_i64_v2i64:
207+
; AVX: # %bb.0:
208+
; AVX-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
209+
; AVX-NEXT: retq
215210
%x = load i64, i64* %p
216211
%ins = insertelement <2 x i64> undef, i64 %x, i32 %y
217212
ret <2 x i64> %ins

‎llvm/test/CodeGen/X86/oddshuffles.ll

+3-3
Original file line numberDiff line numberDiff line change
@@ -1673,7 +1673,7 @@ define void @interleave_24i32_in(<24 x i32>* %p, <8 x i32>* %q1, <8 x i32>* %q2,
16731673
; XOP-LABEL: interleave_24i32_in:
16741674
; XOP: # %bb.0:
16751675
; XOP-NEXT: vmovupd (%rsi), %ymm0
1676-
; XOP-NEXT: vmovupd (%rcx), %ymm1
1676+
; XOP-NEXT: vmovups (%rcx), %ymm1
16771677
; XOP-NEXT: vmovups 16(%rcx), %xmm2
16781678
; XOP-NEXT: vmovups (%rdx), %xmm3
16791679
; XOP-NEXT: vmovups 16(%rdx), %xmm4
@@ -1744,8 +1744,8 @@ define <2 x double> @wrongorder(<4 x double> %A, <8 x double>* %P) #0 {
17441744
; AVX2-LABEL: wrongorder:
17451745
; AVX2: # %bb.0:
17461746
; AVX2-NEXT: vbroadcastsd %xmm0, %ymm1
1747-
; AVX2-NEXT: vmovapd %ymm1, 32(%rdi)
1748-
; AVX2-NEXT: vmovapd %ymm1, (%rdi)
1747+
; AVX2-NEXT: vmovaps %ymm1, 32(%rdi)
1748+
; AVX2-NEXT: vmovaps %ymm1, (%rdi)
17491749
; AVX2-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
17501750
; AVX2-NEXT: vzeroupper
17511751
; AVX2-NEXT: retq

‎llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll

+8-8
Original file line numberDiff line numberDiff line change
@@ -5363,15 +5363,15 @@ define void @test_mm_store_pd1(double *%a0, <2 x double> %a1) {
53635363
; X86-AVX1-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
53645364
; X86-AVX1-NEXT: vmovddup %xmm0, %xmm0 # encoding: [0xc5,0xfb,0x12,0xc0]
53655365
; X86-AVX1-NEXT: # xmm0 = xmm0[0,0]
5366-
; X86-AVX1-NEXT: vmovapd %xmm0, (%eax) # encoding: [0xc5,0xf9,0x29,0x00]
5366+
; X86-AVX1-NEXT: vmovaps %xmm0, (%eax) # encoding: [0xc5,0xf8,0x29,0x00]
53675367
; X86-AVX1-NEXT: retl # encoding: [0xc3]
53685368
;
53695369
; X86-AVX512-LABEL: test_mm_store_pd1:
53705370
; X86-AVX512: # %bb.0:
53715371
; X86-AVX512-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
53725372
; X86-AVX512-NEXT: vmovddup %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xfb,0x12,0xc0]
53735373
; X86-AVX512-NEXT: # xmm0 = xmm0[0,0]
5374-
; X86-AVX512-NEXT: vmovapd %xmm0, (%eax) # EVEX TO VEX Compression encoding: [0xc5,0xf9,0x29,0x00]
5374+
; X86-AVX512-NEXT: vmovaps %xmm0, (%eax) # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x29,0x00]
53755375
; X86-AVX512-NEXT: retl # encoding: [0xc3]
53765376
;
53775377
; X64-SSE-LABEL: test_mm_store_pd1:
@@ -5385,14 +5385,14 @@ define void @test_mm_store_pd1(double *%a0, <2 x double> %a1) {
53855385
; X64-AVX1: # %bb.0:
53865386
; X64-AVX1-NEXT: vmovddup %xmm0, %xmm0 # encoding: [0xc5,0xfb,0x12,0xc0]
53875387
; X64-AVX1-NEXT: # xmm0 = xmm0[0,0]
5388-
; X64-AVX1-NEXT: vmovapd %xmm0, (%rdi) # encoding: [0xc5,0xf9,0x29,0x07]
5388+
; X64-AVX1-NEXT: vmovaps %xmm0, (%rdi) # encoding: [0xc5,0xf8,0x29,0x07]
53895389
; X64-AVX1-NEXT: retq # encoding: [0xc3]
53905390
;
53915391
; X64-AVX512-LABEL: test_mm_store_pd1:
53925392
; X64-AVX512: # %bb.0:
53935393
; X64-AVX512-NEXT: vmovddup %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xfb,0x12,0xc0]
53945394
; X64-AVX512-NEXT: # xmm0 = xmm0[0,0]
5395-
; X64-AVX512-NEXT: vmovapd %xmm0, (%rdi) # EVEX TO VEX Compression encoding: [0xc5,0xf9,0x29,0x07]
5395+
; X64-AVX512-NEXT: vmovaps %xmm0, (%rdi) # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x29,0x07]
53965396
; X64-AVX512-NEXT: retq # encoding: [0xc3]
53975397
%arg0 = bitcast double * %a0 to <2 x double>*
53985398
%shuf = shufflevector <2 x double> %a1, <2 x double> undef, <2 x i32> zeroinitializer
@@ -5489,15 +5489,15 @@ define void @test_mm_store1_pd(double *%a0, <2 x double> %a1) {
54895489
; X86-AVX1-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
54905490
; X86-AVX1-NEXT: vmovddup %xmm0, %xmm0 # encoding: [0xc5,0xfb,0x12,0xc0]
54915491
; X86-AVX1-NEXT: # xmm0 = xmm0[0,0]
5492-
; X86-AVX1-NEXT: vmovapd %xmm0, (%eax) # encoding: [0xc5,0xf9,0x29,0x00]
5492+
; X86-AVX1-NEXT: vmovaps %xmm0, (%eax) # encoding: [0xc5,0xf8,0x29,0x00]
54935493
; X86-AVX1-NEXT: retl # encoding: [0xc3]
54945494
;
54955495
; X86-AVX512-LABEL: test_mm_store1_pd:
54965496
; X86-AVX512: # %bb.0:
54975497
; X86-AVX512-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
54985498
; X86-AVX512-NEXT: vmovddup %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xfb,0x12,0xc0]
54995499
; X86-AVX512-NEXT: # xmm0 = xmm0[0,0]
5500-
; X86-AVX512-NEXT: vmovapd %xmm0, (%eax) # EVEX TO VEX Compression encoding: [0xc5,0xf9,0x29,0x00]
5500+
; X86-AVX512-NEXT: vmovaps %xmm0, (%eax) # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x29,0x00]
55015501
; X86-AVX512-NEXT: retl # encoding: [0xc3]
55025502
;
55035503
; X64-SSE-LABEL: test_mm_store1_pd:
@@ -5511,14 +5511,14 @@ define void @test_mm_store1_pd(double *%a0, <2 x double> %a1) {
55115511
; X64-AVX1: # %bb.0:
55125512
; X64-AVX1-NEXT: vmovddup %xmm0, %xmm0 # encoding: [0xc5,0xfb,0x12,0xc0]
55135513
; X64-AVX1-NEXT: # xmm0 = xmm0[0,0]
5514-
; X64-AVX1-NEXT: vmovapd %xmm0, (%rdi) # encoding: [0xc5,0xf9,0x29,0x07]
5514+
; X64-AVX1-NEXT: vmovaps %xmm0, (%rdi) # encoding: [0xc5,0xf8,0x29,0x07]
55155515
; X64-AVX1-NEXT: retq # encoding: [0xc3]
55165516
;
55175517
; X64-AVX512-LABEL: test_mm_store1_pd:
55185518
; X64-AVX512: # %bb.0:
55195519
; X64-AVX512-NEXT: vmovddup %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xfb,0x12,0xc0]
55205520
; X64-AVX512-NEXT: # xmm0 = xmm0[0,0]
5521-
; X64-AVX512-NEXT: vmovapd %xmm0, (%rdi) # EVEX TO VEX Compression encoding: [0xc5,0xf9,0x29,0x07]
5521+
; X64-AVX512-NEXT: vmovaps %xmm0, (%rdi) # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x29,0x07]
55225522
; X64-AVX512-NEXT: retq # encoding: [0xc3]
55235523
%arg0 = bitcast double * %a0 to <2 x double>*
55245524
%shuf = shufflevector <2 x double> %a1, <2 x double> undef, <2 x i32> zeroinitializer

‎llvm/test/CodeGen/X86/subvector-broadcast.ll

+4-14
Original file line numberDiff line numberDiff line change
@@ -1562,20 +1562,10 @@ define <4 x i32> @test_2xi32_to_4xi32_mem(<2 x i32>* %vp) {
15621562
; X32-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
15631563
; X32-NEXT: retl
15641564
;
1565-
; X64-AVX1-LABEL: test_2xi32_to_4xi32_mem:
1566-
; X64-AVX1: # %bb.0:
1567-
; X64-AVX1-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
1568-
; X64-AVX1-NEXT: retq
1569-
;
1570-
; X64-AVX2-LABEL: test_2xi32_to_4xi32_mem:
1571-
; X64-AVX2: # %bb.0:
1572-
; X64-AVX2-NEXT: vpbroadcastq (%rdi), %xmm0
1573-
; X64-AVX2-NEXT: retq
1574-
;
1575-
; X64-AVX512-LABEL: test_2xi32_to_4xi32_mem:
1576-
; X64-AVX512: # %bb.0:
1577-
; X64-AVX512-NEXT: vpbroadcastq (%rdi), %xmm0
1578-
; X64-AVX512-NEXT: retq
1565+
; X64-LABEL: test_2xi32_to_4xi32_mem:
1566+
; X64: # %bb.0:
1567+
; X64-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
1568+
; X64-NEXT: retq
15791569
%vec = load <2 x i32>, <2 x i32>* %vp
15801570
%res = shufflevector <2 x i32> %vec, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
15811571
ret <4 x i32> %res

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