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PeepholeOpt: Simplify tracking of current op for copy and reg_sequence
Set the starting index in the constructor instead of treating 0 as a special case. There should also be no need for bounds checking in the rewrite.
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llvm/lib/CodeGen/PeepholeOptimizer.cpp

Lines changed: 8 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -153,7 +153,7 @@ class RecurrenceInstr;
153153
class Rewriter {
154154
protected:
155155
MachineInstr &CopyLike;
156-
unsigned CurrentSrcIdx = 0; ///< The index of the source being rewritten.
156+
int CurrentSrcIdx = 0; ///< The index of the source being rewritten.
157157
public:
158158
Rewriter(MachineInstr &CopyLike) : CopyLike(CopyLike) {}
159159
virtual ~Rewriter() = default;
@@ -201,12 +201,9 @@ class CopyRewriter : public Rewriter {
201201

202202
bool getNextRewritableSource(RegSubRegPair &Src,
203203
RegSubRegPair &Dst) override {
204-
// CurrentSrcIdx > 0 means this function has already been called.
205-
if (CurrentSrcIdx > 0)
204+
if (CurrentSrcIdx++ > 1)
206205
return false;
207-
// This is the first call to getNextRewritableSource.
208-
// Move the CurrentSrcIdx to remember that we made that call.
209-
CurrentSrcIdx = 1;
206+
210207
// The rewritable source is the argument.
211208
const MachineOperand &MOSrc = CopyLike.getOperand(1);
212209
Src = RegSubRegPair(MOSrc.getReg(), MOSrc.getSubReg());
@@ -217,8 +214,6 @@ class CopyRewriter : public Rewriter {
217214
}
218215

219216
bool RewriteCurrentSource(Register NewReg, unsigned NewSubReg) override {
220-
if (CurrentSrcIdx != 1)
221-
return false;
222217
MachineOperand &MOSrc = CopyLike.getOperand(CurrentSrcIdx);
223218
MOSrc.setReg(NewReg);
224219
MOSrc.setSubReg(NewSubReg);
@@ -229,7 +224,7 @@ class CopyRewriter : public Rewriter {
229224
/// Helper class to rewrite uncoalescable copy like instructions
230225
/// into new COPY (coalescable friendly) instructions.
231226
class UncoalescableRewriter : public Rewriter {
232-
unsigned NumDefs; ///< Number of defs in the bitcast.
227+
int NumDefs; ///< Number of defs in the bitcast.
233228

234229
public:
235230
UncoalescableRewriter(MachineInstr &MI) : Rewriter(MI) {
@@ -383,6 +378,7 @@ class RegSequenceRewriter : public Rewriter {
383378
public:
384379
RegSequenceRewriter(MachineInstr &MI) : Rewriter(MI) {
385380
assert(MI.isRegSequence() && "Invalid instruction");
381+
CurrentSrcIdx = -1;
386382
}
387383

388384
/// \see Rewriter::getNextRewritableSource()
@@ -404,16 +400,10 @@ class RegSequenceRewriter : public Rewriter {
404400
bool getNextRewritableSource(RegSubRegPair &Src,
405401
RegSubRegPair &Dst) override {
406402
// We are looking at v0 = REG_SEQUENCE v1, sub1, v2, sub2, etc.
403+
CurrentSrcIdx += 2;
404+
if (static_cast<unsigned>(CurrentSrcIdx) >= CopyLike.getNumOperands())
405+
return false;
407406

408-
// If this is the first call, move to the first argument.
409-
if (CurrentSrcIdx == 0) {
410-
CurrentSrcIdx = 1;
411-
} else {
412-
// Otherwise, move to the next argument and check that it is valid.
413-
CurrentSrcIdx += 2;
414-
if (CurrentSrcIdx >= CopyLike.getNumOperands())
415-
return false;
416-
}
417407
const MachineOperand &MOInsertedReg = CopyLike.getOperand(CurrentSrcIdx);
418408
Src.Reg = MOInsertedReg.getReg();
419409
// If we have to compose sub-register indices, bail out.
@@ -431,11 +421,6 @@ class RegSequenceRewriter : public Rewriter {
431421
}
432422

433423
bool RewriteCurrentSource(Register NewReg, unsigned NewSubReg) override {
434-
// We cannot rewrite out of bound operands.
435-
// Moreover, rewritable sources are at odd positions.
436-
if ((CurrentSrcIdx & 1) != 1 || CurrentSrcIdx > CopyLike.getNumOperands())
437-
return false;
438-
439424
// Do not introduce new subregister uses in a reg_sequence. Until composing
440425
// subregister indices is supported while folding, we're just blocking
441426
// folding of subregister copies later in the function.

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