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[AArch64] Add some tests for icmp eq chains of loads. NFC
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‎llvm/test/CodeGen/AArch64/icmp-or-load.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64 %s -o - | FileCheck %s
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define i1 @loadzext_i8i8(ptr %p) {
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; CHECK-LABEL: loadzext_i8i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldrb w8, [x0]
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; CHECK-NEXT: ldrb w9, [x0, #1]
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; CHECK-NEXT: orr w8, w8, w9
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; CHECK-NEXT: cmp w8, #0
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%a = load i8, ptr %p
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%q = getelementptr i8, ptr %p, i64 1
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%b = load i8, ptr %q
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%az = zext i8 %a to i32
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%bz = zext i8 %b to i32
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%c = or i32 %az, %bz
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%d = icmp eq i32 %c, 0
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ret i1 %d
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}
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define i1 @loadzext_c_i8i8(ptr %p) {
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; CHECK-LABEL: loadzext_c_i8i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldrb w8, [x0]
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; CHECK-NEXT: ldrb w9, [x0, #1]
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; CHECK-NEXT: orr w8, w9, w8
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; CHECK-NEXT: cmp w8, #0
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%a = load i8, ptr %p
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%q = getelementptr i8, ptr %p, i64 1
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%b = load i8, ptr %q
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%az = zext i8 %a to i32
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%bz = zext i8 %b to i32
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%c = or i32 %bz, %az
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%d = icmp eq i32 %c, 0
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ret i1 %d
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}
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define i1 @load_i8i8_shift(ptr %p) {
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; CHECK-LABEL: load_i8i8_shift:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldrh w8, [x0]
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; CHECK-NEXT: cmp w8, #0
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%a = load i8, ptr %p
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%q = getelementptr i8, ptr %p, i64 1
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%b = load i8, ptr %q
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%az = zext i8 %a to i32
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%bz = zext i8 %b to i32
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%bs = shl i32 %bz, 8
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%c = or i32 %az, %bs
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%d = icmp eq i32 %c, 0
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ret i1 %d
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}
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define i1 @loadzext_i8i8i8(ptr %p) {
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; CHECK-LABEL: loadzext_i8i8i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldrb w8, [x0]
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; CHECK-NEXT: ldrb w9, [x0, #1]
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; CHECK-NEXT: ldrb w10, [x0, #2]
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; CHECK-NEXT: orr w8, w8, w9
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; CHECK-NEXT: orr w8, w8, w10
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; CHECK-NEXT: cmp w8, #0
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%a = load i8, ptr %p
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%q = getelementptr i8, ptr %p, i64 1
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%b = load i8, ptr %q
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%r = getelementptr i8, ptr %p, i64 2
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%b2 = load i8, ptr %r
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%az = zext i8 %a to i32
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%bz = zext i8 %b to i32
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%b2z = zext i8 %b2 to i32
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%c = or i32 %az, %bz
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%c2 = or i32 %c, %b2z
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%d = icmp eq i32 %c2, 0
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ret i1 %d
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}
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define i1 @loadzext_i8i8i8i8(ptr %p) {
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; CHECK-LABEL: loadzext_i8i8i8i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldrb w8, [x0]
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; CHECK-NEXT: ldrb w9, [x0, #1]
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; CHECK-NEXT: ldrb w10, [x0, #2]
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; CHECK-NEXT: ldrb w11, [x0, #3]
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; CHECK-NEXT: orr w8, w8, w9
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; CHECK-NEXT: orr w9, w10, w11
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; CHECK-NEXT: orr w8, w8, w9
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; CHECK-NEXT: cmp w8, #0
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%a = load i8, ptr %p
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%q = getelementptr i8, ptr %p, i64 1
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%b = load i8, ptr %q
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%r = getelementptr i8, ptr %p, i64 2
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%b2 = load i8, ptr %r
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%s = getelementptr i8, ptr %p, i64 3
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%b3 = load i8, ptr %s
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%az = zext i8 %a to i32
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%bz = zext i8 %b to i32
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%b2z = zext i8 %b2 to i32
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%b3z = zext i8 %b3 to i32
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%c = or i32 %az, %bz
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%c2 = or i32 %c, %b2z
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%c3 = or i32 %c2, %b3z
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%d = icmp eq i32 %c3, 0
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ret i1 %d
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}
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define i1 @load_i8i8(ptr %p) {
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; CHECK-LABEL: load_i8i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldrb w8, [x0]
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; CHECK-NEXT: ldrb w9, [x0, #1]
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; CHECK-NEXT: orr w8, w8, w9
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; CHECK-NEXT: cmp w8, #0
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%a = load i8, ptr %p
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%q = getelementptr i8, ptr %p, i64 1
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%b = load i8, ptr %q
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%c = or i8 %a, %b
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%d = icmp eq i8 %c, 0
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ret i1 %d
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}
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define i1 @load_i16i16(ptr %p) {
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; CHECK-LABEL: load_i16i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldrh w8, [x0]
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; CHECK-NEXT: ldrh w9, [x0, #2]
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; CHECK-NEXT: orr w8, w8, w9
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; CHECK-NEXT: cmp w8, #0
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%a = load i16, ptr %p
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%q = getelementptr i8, ptr %p, i64 2
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%b = load i16, ptr %q
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%c = or i16 %a, %b
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%d = icmp eq i16 %c, 0
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ret i1 %d
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}
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define i1 @load_i32i32(ptr %p) {
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; CHECK-LABEL: load_i32i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldp w8, w9, [x0]
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; CHECK-NEXT: orr w8, w8, w9
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; CHECK-NEXT: cmp w8, #0
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%a = load i32, ptr %p
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%q = getelementptr i8, ptr %p, i64 4
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%b = load i32, ptr %q
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%c = or i32 %a, %b
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%d = icmp eq i32 %c, 0
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ret i1 %d
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}
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define i1 @load_i64i64(ptr %p) {
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; CHECK-LABEL: load_i64i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldp x8, x9, [x0]
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; CHECK-NEXT: orr x8, x8, x9
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; CHECK-NEXT: cmp x8, #0
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%a = load i64, ptr %p
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%q = getelementptr i8, ptr %p, i64 8
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%b = load i64, ptr %q
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%c = or i64 %a, %b
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%d = icmp eq i64 %c, 0
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ret i1 %d
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}
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define i1 @load_i8i16i8(ptr %p) {
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; CHECK-LABEL: load_i8i16i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldrb w8, [x0]
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; CHECK-NEXT: ldrb w9, [x0, #3]
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; CHECK-NEXT: ldurh w10, [x0, #1]
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; CHECK-NEXT: orr w8, w8, w9
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; CHECK-NEXT: orr w8, w8, w10
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; CHECK-NEXT: cmp w8, #0
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%l0 = load i8, ptr %p
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%q = getelementptr i8, ptr %p, i64 1
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%l1 = load i16, ptr %q
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%r = getelementptr i8, ptr %p, i64 3
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%l3 = load i8, ptr %r
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%c = or i8 %l0, %l3
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%d = zext i8 %c to i32
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%e = zext i16 %l1 to i32
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%f = or i32 %d, %e
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%g = icmp eq i32 %f, 0
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ret i1 %g
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}
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define i1 @loadzext_i8i8_wrongoff(ptr %p) {
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; CHECK-LABEL: loadzext_i8i8_wrongoff:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldrb w8, [x0]
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; CHECK-NEXT: ldrb w9, [x0, #2]
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; CHECK-NEXT: orr w8, w8, w9
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; CHECK-NEXT: cmp w8, #0
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%a = load i8, ptr %p
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%q = getelementptr i8, ptr %p, i64 2
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%b = load i8, ptr %q
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%az = zext i8 %a to i32
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%bz = zext i8 %b to i32
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%c = or i32 %az, %bz
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%d = icmp eq i32 %c, 0
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ret i1 %d
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}
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define i1 @loadzext_i16i16_wrongoff(ptr %p) {
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; CHECK-LABEL: loadzext_i16i16_wrongoff:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldrh w8, [x0]
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; CHECK-NEXT: ldurh w9, [x0, #1]
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; CHECK-NEXT: orr w8, w8, w9
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; CHECK-NEXT: cmp w8, #0
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%a = load i16, ptr %p
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%q = getelementptr i8, ptr %p, i64 1
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%b = load i16, ptr %q
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%az = zext i16 %a to i32
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%bz = zext i16 %b to i32
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%c = or i32 %az, %bz
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%d = icmp eq i32 %c, 0
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ret i1 %d
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}
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define i1 @loadzext_i16i16_store(ptr %p, ptr %q) {
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; CHECK-LABEL: loadzext_i16i16_store:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldrh w8, [x0]
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; CHECK-NEXT: strb wzr, [x1]
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; CHECK-NEXT: ldrh w9, [x0, #2]
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; CHECK-NEXT: orr w8, w8, w9
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; CHECK-NEXT: cmp w8, #0
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%a = load i16, ptr %p
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store i8 0, ptr %q
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%p2 = getelementptr i8, ptr %p, i64 2
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%b = load i16, ptr %p2
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%az = zext i16 %a to i32
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%bz = zext i16 %b to i32
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%c = or i32 %az, %bz
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%d = icmp eq i32 %c, 0
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ret i1 %d
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}
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define i1 @loadzext_i16i16_bases(ptr %p, ptr %q) {
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; CHECK-LABEL: loadzext_i16i16_bases:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldrh w8, [x0]
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; CHECK-NEXT: ldrh w9, [x1, #2]
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; CHECK-NEXT: orr w8, w8, w9
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; CHECK-NEXT: cmp w8, #0
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%a = load i16, ptr %p
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%p2 = getelementptr i8, ptr %q, i64 2
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%b = load i16, ptr %p2
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%az = zext i16 %a to i32
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%bz = zext i16 %b to i32
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%c = or i32 %az, %bz
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%d = icmp eq i32 %c, 0
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ret i1 %d
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}

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