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RKSimonRKSimon
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[MC][X86] Merge lane/element broadcast comment printers.
This is /almost/ NFC - the only annoyance is that for some reason we were using "<C1,C2,..>" for ConstantVector types unlike all other cases - these now use the same "[C1,C2,..]" format as the other constant printers. I don't think we have any reason to keep this diff, but I'm putting up this PR just in case there's a reason I've forgotten.
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‎llvm/lib/Target/X86/X86MCInstLower.cpp

Lines changed: 23 additions & 73 deletions
Original file line numberDiff line numberDiff line change
@@ -1575,68 +1575,18 @@ static void printZeroUpperMove(const MachineInstr *MI, MCStreamer &OutStreamer,
15751575
OutStreamer.AddComment(CS.str());
15761576
}
15771577

1578-
static void printLaneBroadcast(const MachineInstr *MI, MCStreamer &OutStreamer,
1579-
int NumLanes, int BitWidth) {
1580-
if (auto *C = X86::getConstantFromPool(*MI, 1)) {
1581-
int CstEltSize = C->getType()->getScalarSizeInBits();
1582-
1583-
std::string Comment;
1584-
raw_string_ostream CS(Comment);
1585-
const MachineOperand &DstOp = MI->getOperand(0);
1586-
CS << X86ATTInstPrinter::getRegisterName(DstOp.getReg()) << " = ";
1587-
if (auto *CDS = dyn_cast<ConstantDataSequential>(C)) {
1588-
int NumElements = CDS->getNumElements();
1589-
if ((BitWidth % CstEltSize) == 0)
1590-
NumElements = std::min<int>(NumElements, BitWidth / CstEltSize);
1591-
CS << "[";
1592-
for (int l = 0; l != NumLanes; ++l) {
1593-
for (int i = 0; i < NumElements; ++i) {
1594-
if (i != 0 || l != 0)
1595-
CS << ",";
1596-
if (CDS->getElementType()->isIntegerTy())
1597-
printConstant(CDS->getElementAsAPInt(i), CS);
1598-
else if (CDS->getElementType()->isHalfTy() ||
1599-
CDS->getElementType()->isFloatTy() ||
1600-
CDS->getElementType()->isDoubleTy())
1601-
printConstant(CDS->getElementAsAPFloat(i), CS);
1602-
else
1603-
CS << "?";
1604-
}
1605-
}
1606-
CS << "]";
1607-
OutStreamer.AddComment(CS.str());
1608-
} else if (auto *CV = dyn_cast<ConstantVector>(C)) {
1609-
int NumOperands = CV->getNumOperands();
1610-
if ((BitWidth % CstEltSize) == 0)
1611-
NumOperands = std::min<int>(NumOperands, BitWidth / CstEltSize);
1612-
CS << "<";
1613-
for (int l = 0; l != NumLanes; ++l) {
1614-
for (int i = 0; i < NumOperands; ++i) {
1615-
if (i != 0 || l != 0)
1616-
CS << ",";
1617-
printConstant(CV->getOperand(i),
1618-
CV->getType()->getPrimitiveSizeInBits(), CS);
1619-
}
1620-
}
1621-
CS << ">";
1622-
OutStreamer.AddComment(CS.str());
1623-
}
1624-
}
1625-
}
1626-
1627-
static void printElementBroadcast(const MachineInstr *MI,
1628-
MCStreamer &OutStreamer, int NumElts,
1629-
int EltBits) {
1578+
static void printBroadcast(const MachineInstr *MI, MCStreamer &OutStreamer,
1579+
int Repeats, int BitWidth) {
16301580
if (auto *C = X86::getConstantFromPool(*MI, 1)) {
16311581
std::string Comment;
16321582
raw_string_ostream CS(Comment);
16331583
const MachineOperand &DstOp = MI->getOperand(0);
16341584
CS << X86ATTInstPrinter::getRegisterName(DstOp.getReg()) << " = ";
16351585
CS << "[";
1636-
for (int i = 0; i != NumElts; ++i) {
1637-
if (i != 0)
1586+
for (int l = 0; l != Repeats; ++l) {
1587+
if (l != 0)
16381588
CS << ",";
1639-
printConstant(C, EltBits, CS);
1589+
printConstant(C, BitWidth, CS);
16401590
}
16411591
CS << "]";
16421592
OutStreamer.AddComment(CS.str());
@@ -1954,33 +1904,33 @@ static void addConstantComments(const MachineInstr *MI,
19541904
// For loads from a constant pool to a vector register, print the constant
19551905
// loaded.
19561906
CASE_128_MOV_RM()
1957-
printLaneBroadcast(MI, OutStreamer, 1, 128);
1907+
printBroadcast(MI, OutStreamer, 1, 128);
19581908
break;
19591909
CASE_256_MOV_RM()
1960-
printLaneBroadcast(MI, OutStreamer, 1, 256);
1910+
printBroadcast(MI, OutStreamer, 1, 256);
19611911
break;
19621912
CASE_512_MOV_RM()
1963-
printLaneBroadcast(MI, OutStreamer, 1, 512);
1913+
printBroadcast(MI, OutStreamer, 1, 512);
19641914
break;
19651915
case X86::VBROADCASTF128rm:
19661916
case X86::VBROADCASTI128rm:
19671917
case X86::VBROADCASTF32X4Z256rm:
19681918
case X86::VBROADCASTF64X2Z128rm:
19691919
case X86::VBROADCASTI32X4Z256rm:
19701920
case X86::VBROADCASTI64X2Z128rm:
1971-
printLaneBroadcast(MI, OutStreamer, 2, 128);
1921+
printBroadcast(MI, OutStreamer, 2, 128);
19721922
break;
19731923
case X86::VBROADCASTF32X4rm:
19741924
case X86::VBROADCASTF64X2rm:
19751925
case X86::VBROADCASTI32X4rm:
19761926
case X86::VBROADCASTI64X2rm:
1977-
printLaneBroadcast(MI, OutStreamer, 4, 128);
1927+
printBroadcast(MI, OutStreamer, 4, 128);
19781928
break;
19791929
case X86::VBROADCASTF32X8rm:
19801930
case X86::VBROADCASTF64X4rm:
19811931
case X86::VBROADCASTI32X8rm:
19821932
case X86::VBROADCASTI64X4rm:
1983-
printLaneBroadcast(MI, OutStreamer, 2, 256);
1933+
printBroadcast(MI, OutStreamer, 2, 256);
19841934
break;
19851935

19861936
// For broadcast loads from a constant pool to a vector register, repeatedly
@@ -1990,55 +1940,55 @@ static void addConstantComments(const MachineInstr *MI,
19901940
case X86::VMOVDDUPZ128rm:
19911941
case X86::VPBROADCASTQrm:
19921942
case X86::VPBROADCASTQZ128rm:
1993-
printElementBroadcast(MI, OutStreamer, 2, 64);
1943+
printBroadcast(MI, OutStreamer, 2, 64);
19941944
break;
19951945
case X86::VBROADCASTSDYrm:
19961946
case X86::VBROADCASTSDZ256rm:
19971947
case X86::VPBROADCASTQYrm:
19981948
case X86::VPBROADCASTQZ256rm:
1999-
printElementBroadcast(MI, OutStreamer, 4, 64);
1949+
printBroadcast(MI, OutStreamer, 4, 64);
20001950
break;
20011951
case X86::VBROADCASTSDZrm:
20021952
case X86::VPBROADCASTQZrm:
2003-
printElementBroadcast(MI, OutStreamer, 8, 64);
1953+
printBroadcast(MI, OutStreamer, 8, 64);
20041954
break;
20051955
case X86::VBROADCASTSSrm:
20061956
case X86::VBROADCASTSSZ128rm:
20071957
case X86::VPBROADCASTDrm:
20081958
case X86::VPBROADCASTDZ128rm:
2009-
printElementBroadcast(MI, OutStreamer, 4, 32);
1959+
printBroadcast(MI, OutStreamer, 4, 32);
20101960
break;
20111961
case X86::VBROADCASTSSYrm:
20121962
case X86::VBROADCASTSSZ256rm:
20131963
case X86::VPBROADCASTDYrm:
20141964
case X86::VPBROADCASTDZ256rm:
2015-
printElementBroadcast(MI, OutStreamer, 8, 32);
1965+
printBroadcast(MI, OutStreamer, 8, 32);
20161966
break;
20171967
case X86::VBROADCASTSSZrm:
20181968
case X86::VPBROADCASTDZrm:
2019-
printElementBroadcast(MI, OutStreamer, 16, 32);
1969+
printBroadcast(MI, OutStreamer, 16, 32);
20201970
break;
20211971
case X86::VPBROADCASTWrm:
20221972
case X86::VPBROADCASTWZ128rm:
2023-
printElementBroadcast(MI, OutStreamer, 8, 16);
1973+
printBroadcast(MI, OutStreamer, 8, 16);
20241974
break;
20251975
case X86::VPBROADCASTWYrm:
20261976
case X86::VPBROADCASTWZ256rm:
2027-
printElementBroadcast(MI, OutStreamer, 16, 16);
1977+
printBroadcast(MI, OutStreamer, 16, 16);
20281978
break;
20291979
case X86::VPBROADCASTWZrm:
2030-
printElementBroadcast(MI, OutStreamer, 32, 16);
1980+
printBroadcast(MI, OutStreamer, 32, 16);
20311981
break;
20321982
case X86::VPBROADCASTBrm:
20331983
case X86::VPBROADCASTBZ128rm:
2034-
printElementBroadcast(MI, OutStreamer, 16, 8);
1984+
printBroadcast(MI, OutStreamer, 16, 8);
20351985
break;
20361986
case X86::VPBROADCASTBYrm:
20371987
case X86::VPBROADCASTBZ256rm:
2038-
printElementBroadcast(MI, OutStreamer, 32, 8);
1988+
printBroadcast(MI, OutStreamer, 32, 8);
20391989
break;
20401990
case X86::VPBROADCASTBZrm:
2041-
printElementBroadcast(MI, OutStreamer, 64, 8);
1991+
printBroadcast(MI, OutStreamer, 64, 8);
20421992
break;
20431993
}
20441994
}

‎llvm/test/CodeGen/X86/2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ define fastcc double @tailcall() {
1616
; CHECK-NEXT: movq %rax, {{[0-9]+}}(%rsp)
1717
; CHECK-NEXT: fld1
1818
; CHECK-NEXT: fstpt {{[0-9]+}}(%rsp)
19-
; CHECK-NEXT: movaps {{.*#+}} xmm0 = <1.0E+0,1.0E+0,u,u>
19+
; CHECK-NEXT: movaps {{.*#+}} xmm0 = [1.0E+0,1.0E+0,u,u]
2020
; CHECK-NEXT: addq $24, %rsp
2121
; CHECK-NEXT: jmp _tailcallee ## TAILCALL
2222
entry:

‎llvm/test/CodeGen/X86/2011-10-19-widen_vselect.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -73,7 +73,7 @@ define void @full_test() {
7373
; X86-NEXT: cvtdq2ps %xmm0, %xmm1
7474
; X86-NEXT: xorps %xmm0, %xmm0
7575
; X86-NEXT: cmpltps %xmm2, %xmm0
76-
; X86-NEXT: movaps {{.*#+}} xmm3 = <1.0E+0,1.0E+0,u,u>
76+
; X86-NEXT: movaps {{.*#+}} xmm3 = [1.0E+0,1.0E+0,u,u]
7777
; X86-NEXT: addps %xmm1, %xmm3
7878
; X86-NEXT: movaps %xmm1, %xmm4
7979
; X86-NEXT: blendvps %xmm0, %xmm3, %xmm4
@@ -93,7 +93,7 @@ define void @full_test() {
9393
; X64-NEXT: cvtdq2ps %xmm0, %xmm1
9494
; X64-NEXT: xorps %xmm0, %xmm0
9595
; X64-NEXT: cmpltps %xmm2, %xmm0
96-
; X64-NEXT: movaps {{.*#+}} xmm3 = <1.0E+0,1.0E+0,u,u>
96+
; X64-NEXT: movaps {{.*#+}} xmm3 = [1.0E+0,1.0E+0,u,u]
9797
; X64-NEXT: addps %xmm1, %xmm3
9898
; X64-NEXT: movaps %xmm1, %xmm4
9999
; X64-NEXT: blendvps %xmm0, %xmm3, %xmm4

‎llvm/test/CodeGen/X86/addsub-constant-folding.ll

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -367,14 +367,14 @@ define <4 x i32> @vec_add_const_const_sub_extrause(<4 x i32> %arg) {
367367
define <4 x i32> @vec_add_const_const_sub_nonsplat(<4 x i32> %arg) {
368368
; X86-LABEL: vec_add_const_const_sub_nonsplat:
369369
; X86: # %bb.0:
370-
; X86-NEXT: movdqa {{.*#+}} xmm1 = <4294967277,u,u,4294967290>
370+
; X86-NEXT: movdqa {{.*#+}} xmm1 = [4294967277,u,u,4294967290]
371371
; X86-NEXT: psubd %xmm0, %xmm1
372372
; X86-NEXT: movdqa %xmm1, %xmm0
373373
; X86-NEXT: retl
374374
;
375375
; X64-LABEL: vec_add_const_const_sub_nonsplat:
376376
; X64: # %bb.0:
377-
; X64-NEXT: movdqa {{.*#+}} xmm1 = <4294967277,u,u,4294967290>
377+
; X64-NEXT: movdqa {{.*#+}} xmm1 = [4294967277,u,u,4294967290]
378378
; X64-NEXT: psubd %xmm0, %xmm1
379379
; X64-NEXT: movdqa %xmm1, %xmm0
380380
; X64-NEXT: retq
@@ -733,14 +733,14 @@ define <4 x i32> @vec_sub_const_const_sub_extrause(<4 x i32> %arg) {
733733
define <4 x i32> @vec_sub_const_const_sub_nonsplat(<4 x i32> %arg) {
734734
; X86-LABEL: vec_sub_const_const_sub_nonsplat:
735735
; X86: # %bb.0:
736-
; X86-NEXT: movdqa {{.*#+}} xmm1 = <23,u,u,10>
736+
; X86-NEXT: movdqa {{.*#+}} xmm1 = [23,u,u,10]
737737
; X86-NEXT: psubd %xmm0, %xmm1
738738
; X86-NEXT: movdqa %xmm1, %xmm0
739739
; X86-NEXT: retl
740740
;
741741
; X64-LABEL: vec_sub_const_const_sub_nonsplat:
742742
; X64: # %bb.0:
743-
; X64-NEXT: movdqa {{.*#+}} xmm1 = <23,u,u,10>
743+
; X64-NEXT: movdqa {{.*#+}} xmm1 = [23,u,u,10]
744744
; X64-NEXT: psubd %xmm0, %xmm1
745745
; X64-NEXT: movdqa %xmm1, %xmm0
746746
; X64-NEXT: retq
@@ -867,14 +867,14 @@ define <4 x i32> @vec_const_sub_add_const_extrause(<4 x i32> %arg) {
867867
define <4 x i32> @vec_const_sub_add_const_nonsplat(<4 x i32> %arg) {
868868
; X86-LABEL: vec_const_sub_add_const_nonsplat:
869869
; X86: # %bb.0:
870-
; X86-NEXT: movdqa {{.*#+}} xmm1 = <23,u,u,10>
870+
; X86-NEXT: movdqa {{.*#+}} xmm1 = [23,u,u,10]
871871
; X86-NEXT: psubd %xmm0, %xmm1
872872
; X86-NEXT: movdqa %xmm1, %xmm0
873873
; X86-NEXT: retl
874874
;
875875
; X64-LABEL: vec_const_sub_add_const_nonsplat:
876876
; X64: # %bb.0:
877-
; X64-NEXT: movdqa {{.*#+}} xmm1 = <23,u,u,10>
877+
; X64-NEXT: movdqa {{.*#+}} xmm1 = [23,u,u,10]
878878
; X64-NEXT: psubd %xmm0, %xmm1
879879
; X64-NEXT: movdqa %xmm1, %xmm0
880880
; X64-NEXT: retq
@@ -1001,14 +1001,14 @@ define <4 x i32> @vec_const_sub_sub_const_extrause(<4 x i32> %arg) {
10011001
define <4 x i32> @vec_const_sub_sub_const_nonsplat(<4 x i32> %arg) {
10021002
; X86-LABEL: vec_const_sub_sub_const_nonsplat:
10031003
; X86: # %bb.0:
1004-
; X86-NEXT: movdqa {{.*#+}} xmm1 = <19,u,u,6>
1004+
; X86-NEXT: movdqa {{.*#+}} xmm1 = [19,u,u,6]
10051005
; X86-NEXT: psubd %xmm0, %xmm1
10061006
; X86-NEXT: movdqa %xmm1, %xmm0
10071007
; X86-NEXT: retl
10081008
;
10091009
; X64-LABEL: vec_const_sub_sub_const_nonsplat:
10101010
; X64: # %bb.0:
1011-
; X64-NEXT: movdqa {{.*#+}} xmm1 = <19,u,u,6>
1011+
; X64-NEXT: movdqa {{.*#+}} xmm1 = [19,u,u,6]
10121012
; X64-NEXT: psubd %xmm0, %xmm1
10131013
; X64-NEXT: movdqa %xmm1, %xmm0
10141014
; X64-NEXT: retq

‎llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1053,7 +1053,7 @@ define void @vec256_i8_widen_to_i16_factor2_broadcast_to_v16i16_factor16(ptr %in
10531053
; SSE42-NEXT: paddb 48(%rsi), %xmm2
10541054
; SSE42-NEXT: paddb (%rsi), %xmm0
10551055
; SSE42-NEXT: paddb 32(%rsi), %xmm1
1056-
; SSE42-NEXT: movdqa {{.*#+}} xmm3 = <1,3,5,7,9,11,13,15,u,u,u,u,u,u,u,u>
1056+
; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [1,3,5,7,9,11,13,15,u,u,u,u,u,u,u,u]
10571057
; SSE42-NEXT: pshufb %xmm3, %xmm1
10581058
; SSE42-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
10591059
; SSE42-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]
@@ -3941,7 +3941,7 @@ define void @vec384_i16_widen_to_i96_factor6_broadcast_to_v4i96_factor4(ptr %in.
39413941
; AVX512BW-NEXT: vmovdqa64 (%rdi), %zmm0
39423942
; AVX512BW-NEXT: vpaddb (%rsi), %zmm0, %zmm0
39433943
; AVX512BW-NEXT: vextracti64x4 $1, %zmm0, %ymm1
3944-
; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = <16,9,10,11,12,13,16,15,u,u,u,u,16,u,u,u>
3944+
; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [16,9,10,11,12,13,16,15,u,u,u,u,16,u,u,u]
39453945
; AVX512BW-NEXT: vpermi2w %ymm0, %ymm1, %ymm2
39463946
; AVX512BW-NEXT: vpbroadcastw %xmm0, %ymm0
39473947
; AVX512BW-NEXT: vinserti64x4 $1, %ymm0, %zmm2, %zmm0
@@ -4181,7 +4181,7 @@ define void @vec384_i16_widen_to_i192_factor12_broadcast_to_v2i192_factor2(ptr %
41814181
; AVX512BW-NEXT: vmovdqa64 (%rdi), %zmm0
41824182
; AVX512BW-NEXT: vpaddb (%rsi), %zmm0, %zmm0
41834183
; AVX512BW-NEXT: vextracti64x4 $1, %zmm0, %ymm1
4184-
; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = <16,9,10,11,12,13,14,15,u,u,u,u,16,u,u,u>
4184+
; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [16,9,10,11,12,13,14,15,u,u,u,u,16,u,u,u]
41854185
; AVX512BW-NEXT: vpermi2w %ymm0, %ymm1, %ymm2
41864186
; AVX512BW-NEXT: vpaddb (%rdx), %zmm2, %zmm0
41874187
; AVX512BW-NEXT: vmovdqa64 %zmm0, (%rcx)

‎llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast_from_memory.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -875,7 +875,7 @@ define void @vec256_i8_widen_to_i16_factor2_broadcast_to_v16i16_factor16(ptr %in
875875
; SSE42-NEXT: movdqa (%rdi), %xmm0
876876
; SSE42-NEXT: movdqa 32(%rdi), %xmm1
877877
; SSE42-NEXT: movdqa 48(%rdi), %xmm2
878-
; SSE42-NEXT: movdqa {{.*#+}} xmm3 = <1,3,5,7,9,11,13,15,u,u,u,u,u,u,u,u>
878+
; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [1,3,5,7,9,11,13,15,u,u,u,u,u,u,u,u]
879879
; SSE42-NEXT: pshufb %xmm3, %xmm1
880880
; SSE42-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
881881
; SSE42-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]

‎llvm/test/CodeGen/X86/avx2-fma-fneg-combine.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -131,7 +131,7 @@ define <4 x double> @test9(<4 x double> %a) {
131131
define <4 x double> @test10(<4 x double> %a, <4 x double> %b) {
132132
; CHECK-LABEL: test10:
133133
; CHECK: # %bb.0:
134-
; CHECK-NEXT: vmovapd {{.*#+}} ymm2 = <-9.5E+0,u,-5.5E+0,-2.5E+0>
134+
; CHECK-NEXT: vmovapd {{.*#+}} ymm2 = [-9.5E+0,u,-5.5E+0,-2.5E+0]
135135
; CHECK-NEXT: vmovapd %ymm2, %ymm3
136136
; CHECK-NEXT: vfmadd213pd {{.*#+}} ymm3 = (ymm0 * ymm3) + ymm1
137137
; CHECK-NEXT: vfnmadd213pd {{.*#+}} ymm2 = -(ymm0 * ymm2) + ymm1

‎llvm/test/CodeGen/X86/avx2-vperm.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -23,13 +23,13 @@ entry:
2323
define <8 x float> @perm_cl_fp_8x32(<8 x float> %A) nounwind readnone {
2424
; X86-LABEL: perm_cl_fp_8x32:
2525
; X86: # %bb.0: # %entry
26-
; X86-NEXT: vmovaps {{.*#+}} ymm1 = <u,7,2,u,4,u,1,6>
26+
; X86-NEXT: vmovaps {{.*#+}} ymm1 = [u,7,2,u,4,u,1,6]
2727
; X86-NEXT: vpermps %ymm0, %ymm1, %ymm0
2828
; X86-NEXT: retl
2929
;
3030
; X64-LABEL: perm_cl_fp_8x32:
3131
; X64: # %bb.0: # %entry
32-
; X64-NEXT: vmovaps {{.*#+}} ymm1 = <u,7,2,u,4,u,1,6>
32+
; X64-NEXT: vmovaps {{.*#+}} ymm1 = [u,7,2,u,4,u,1,6]
3333
; X64-NEXT: vpermps %ymm0, %ymm1, %ymm0
3434
; X64-NEXT: retq
3535
entry:

‎llvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1769,7 +1769,7 @@ define <4 x i32> @test_16xi32_to_4xi32_perm_mask9(<16 x i32> %vec) {
17691769
;
17701770
; CHECK-FAST-PERLANE-LABEL: test_16xi32_to_4xi32_perm_mask9:
17711771
; CHECK-FAST-PERLANE: # %bb.0:
1772-
; CHECK-FAST-PERLANE-NEXT: vmovdqa {{.*#+}} xmm1 = <4,1,u,2>
1772+
; CHECK-FAST-PERLANE-NEXT: vmovdqa {{.*#+}} xmm1 = [4,1,u,2]
17731773
; CHECK-FAST-PERLANE-NEXT: vextracti64x4 $1, %zmm0, %ymm2
17741774
; CHECK-FAST-PERLANE-NEXT: vpermd %ymm2, %ymm1, %ymm1
17751775
; CHECK-FAST-PERLANE-NEXT: vextracti128 $1, %ymm0, %xmm2

‎llvm/test/CodeGen/X86/bitreverse.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -587,7 +587,7 @@ define <2 x i16> @fold_v2i16() {
587587
;
588588
; X64-LABEL: fold_v2i16:
589589
; X64: # %bb.0:
590-
; X64-NEXT: movaps {{.*#+}} xmm0 = <61440,240,u,u,u,u,u,u>
590+
; X64-NEXT: movaps {{.*#+}} xmm0 = [61440,240,u,u,u,u,u,u]
591591
; X64-NEXT: retq
592592
;
593593
; X86XOP-LABEL: fold_v2i16:

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