Skip to content

Commit eb5e66b

Browse files
authored
[RISCV] Change type of Zicbop prefetch operand to GPRMem (#139888)
Prior to this commit PREFETCH_* instructions considered their operand register to be a simple GPR which is not entirely correct as it is a base address for possible prefetching operation (According to cmobase v1.0.1)
1 parent 0bc3993 commit eb5e66b

File tree

1 file changed

+1
-1
lines changed

1 file changed

+1
-1
lines changed

llvm/lib/Target/RISCV/RISCVInstrInfoZicbo.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -37,7 +37,7 @@ class CBO_r<bits<12> optype, string opcodestr>
3737

3838
let hasSideEffects = 0, mayLoad = 1, mayStore = 1 in
3939
class Prefetch_ri<bits<5> optype, string opcodestr>
40-
: RVInstS<0b110, OPC_OP_IMM, (outs), (ins GPR:$rs1, simm12_lsb00000:$imm12),
40+
: RVInstS<0b110, OPC_OP_IMM, (outs), (ins GPRMem:$rs1, simm12_lsb00000:$imm12),
4141
opcodestr, "${imm12}(${rs1})"> {
4242
let Inst{11-7} = 0b00000;
4343
let rs2 = optype;

0 commit comments

Comments
 (0)