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[CodeGen][RISCV] Add helper class for emitting CFI instructions into MIR (#135845)
PR: #135845
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//===----------------------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_CFIINSTBUILDER_H
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#define LLVM_CODEGEN_CFIINSTBUILDER_H
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/TargetInstrInfo.h"
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#include "llvm/CodeGen/TargetRegisterInfo.h"
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#include "llvm/MC/MCDwarf.h"
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namespace llvm {
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/// Helper class for creating CFI instructions and inserting them into MIR.
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class CFIInstBuilder {
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MachineFunction &MF;
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MachineBasicBlock &MBB;
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MachineBasicBlock::iterator InsertPt;
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/// MIFlag to set on a MachineInstr. Typically, FrameSetup or FrameDestroy.
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MachineInstr::MIFlag MIFlag;
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/// Selects DWARF register numbering: debug or exception handling. Should be
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/// consistent with the choice of the ELF section (.debug_frame or .eh_frame)
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/// where CFI will be encoded.
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bool IsEH;
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// Cache frequently used variables.
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const TargetRegisterInfo &TRI;
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const MCInstrDesc &CFIID;
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const MIMetadata MIMD; // Default-initialized, no debug location desired.
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public:
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CFIInstBuilder(MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertPt,
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MachineInstr::MIFlag MIFlag, bool IsEH = true)
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: MF(*MBB.getParent()), MBB(MBB), MIFlag(MIFlag), IsEH(IsEH),
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TRI(*MF.getSubtarget().getRegisterInfo()),
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CFIID(MF.getSubtarget().getInstrInfo()->get(
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TargetOpcode::CFI_INSTRUCTION)) {
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setInsertPoint(InsertPt);
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}
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void setInsertPoint(MachineBasicBlock::iterator IP) { InsertPt = IP; }
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void insertCFIInst(const MCCFIInstruction &CFIInst) const {
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BuildMI(MBB, InsertPt, MIMD, CFIID)
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.addCFIIndex(MF.addFrameInst(CFIInst))
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.setMIFlag(MIFlag);
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}
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void buildDefCFA(MCRegister Reg, int64_t Offset) const {
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insertCFIInst(MCCFIInstruction::cfiDefCfa(
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nullptr, TRI.getDwarfRegNum(Reg, IsEH), Offset));
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}
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void buildDefCFARegister(MCRegister Reg) const {
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insertCFIInst(MCCFIInstruction::createDefCfaRegister(
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nullptr, TRI.getDwarfRegNum(Reg, IsEH)));
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}
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void buildDefCFAOffset(int64_t Offset) const {
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insertCFIInst(MCCFIInstruction::cfiDefCfaOffset(nullptr, Offset));
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}
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void buildOffset(MCRegister Reg, int64_t Offset) const {
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insertCFIInst(MCCFIInstruction::createOffset(
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nullptr, TRI.getDwarfRegNum(Reg, IsEH), Offset));
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}
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void buildRestore(MCRegister Reg) const {
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insertCFIInst(MCCFIInstruction::createRestore(
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nullptr, TRI.getDwarfRegNum(Reg, IsEH)));
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}
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void buildEscape(StringRef Bytes, StringRef Comment = "") const {
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insertCFIInst(
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MCCFIInstruction::createEscape(nullptr, Bytes, SMLoc(), Comment));
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}
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};
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} // namespace llvm
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#endif // LLVM_CODEGEN_CFIINSTBUILDER_H

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