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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 |
| 2 | +; RUN: opt -S --passes=slp-vectorizer < %s | FileCheck %s |
| 3 | + |
| 4 | +define i32 @test(i32 %n) { |
| 5 | +; CHECK-LABEL: define i32 @test( |
| 6 | +; CHECK-SAME: i32 [[N:%.*]]) { |
| 7 | +; CHECK-NEXT: [[ENTRY:.*:]] |
| 8 | +; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i32> poison, i32 [[N]], i32 0 |
| 9 | +; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x i32> [[TMP0]], <2 x i32> poison, <2 x i32> zeroinitializer |
| 10 | +; CHECK-NEXT: [[TMP2:%.*]] = add <2 x i32> [[TMP1]], <i32 1, i32 2> |
| 11 | +; CHECK-NEXT: [[TMP3:%.*]] = mul <2 x i32> [[TMP2]], <i32 273837369, i32 273837369> |
| 12 | +; CHECK-NEXT: [[TMP4:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[TMP3]], i1 false) |
| 13 | +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x i32> [[TMP4]], i32 0 |
| 14 | +; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x i32> [[TMP4]], i32 1 |
| 15 | +; CHECK-NEXT: [[RES1:%.*]] = add i32 [[TMP5]], [[TMP6]] |
| 16 | +; CHECK-NEXT: ret i32 [[RES1]] |
| 17 | +; |
| 18 | +entry: |
| 19 | + %n1 = add i32 %n, 1 |
| 20 | + %zn1 = zext nneg i32 %n1 to i64 |
| 21 | + %m1 = mul nuw nsw i64 %zn1, 273837369 |
| 22 | + %a1 = call i64 @llvm.abs.i64(i64 %m1, i1 true) |
| 23 | + %t1 = trunc i64 %a1 to i32 |
| 24 | + %n2 = add i32 %n, 2 |
| 25 | + %zn2 = zext nneg i32 %n2 to i64 |
| 26 | + %m2 = mul nuw nsw i64 %zn2, 273837369 |
| 27 | + %a2 = call i64 @llvm.abs.i64(i64 %m2, i1 true) |
| 28 | + %t2 = trunc i64 %a2 to i32 |
| 29 | + %res1 = add i32 %t1, %t2 |
| 30 | + ret i32 %res1 |
| 31 | +} |
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