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klensyklensy
klensy
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klensy
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[mlir][test] Fix filecheck annotation typos (#92897)
Moved fixes for mlir from #91854, plus few additional in second commit. --------- Co-authored-by: klensy <[email protected]>
1 parent 77ae18b commit f0b0c02

25 files changed

+68
-68
lines changed

‎mlir/test/Analysis/DataFlow/test-next-access.mlir

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -63,7 +63,7 @@ func.func @branch(%arg0: memref<f32>, %arg1: f32, %arg2: i1) -> f32 {
6363
return %phi : f32
6464
}
6565

66-
// CHECK-LABEL @dead_branch
66+
// CHECK-LABEL: @dead_branch
6767
func.func @dead_branch(%arg0: memref<f32>, %arg1: f32) -> f32 {
6868
// CHECK: name = "store"
6969
// CHECK-SAME: next_access = ["unknown", ["load 2"]]
@@ -191,7 +191,7 @@ func.func @loop_cf(%arg0: memref<?xf32>, %arg1: f32, %arg2: index, %arg3: index,
191191
return %8 : f32
192192
}
193193

194-
// CHECK-LABEL @conditional_cf
194+
// CHECK-LABEL: @conditional_cf
195195
func.func @conditional_cf(%arg0: i1, %arg1: memref<f32>) {
196196
// CHECK: name = "pre"
197197
// CHECK-SAME: next_access = {{\[}}["then", "post"]]

‎mlir/test/Conversion/BufferizationToMemRef/bufferization-to-memref.mlir

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -79,7 +79,7 @@ func.func @conversion_dealloc_simple(%arg0: memref<2xf32>, %arg1: i1) {
7979
return
8080
}
8181

82-
// CHECk: scf.if [[ARG1]] {
83-
// CHECk-NEXT: memref.dealloc [[ARG0]] : memref<2xf32>
84-
// CHECk-NEXT: }
85-
// CHECk-NEXT: return
82+
// CHECK: scf.if [[ARG1]] {
83+
// CHECK-NEXT: memref.dealloc [[ARG0]] : memref<2xf32>
84+
// CHECK-NEXT: }
85+
// CHECK-NEXT: return

‎mlir/test/Conversion/NVGPUToNVVM/nvgpu-to-nvvm.mlir

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -778,11 +778,11 @@ func.func @create_tensor_map(%devicePtr2d : memref<64x128xf32>, %devicePtr1d : m
778778
%crd0 = arith.constant 64 : index
779779
%crd1 = arith.constant 128 : index
780780
%devicePtr2d_unranked = memref.cast %devicePtr2d : memref<64x128xf32> to memref<*xf32>
781-
// CHECK : llvm.call @mgpuTensorMapEncodeTiledMemref
781+
// CHECK: llvm.call @mgpuTensorMapEncodeTiledMemref
782782
%tensorMap2d = nvgpu.tma.create.descriptor %devicePtr2d_unranked box[%crd0, %crd1] : memref<*xf32> -> !tensorMap2d
783783

784784
%devicePtr1d_unranked = memref.cast %devicePtr1d : memref<128xf32> to memref<*xf32>
785-
// CHECK : llvm.call @mgpuTensorMapEncodeTiledMemref
785+
// CHECK: llvm.call @mgpuTensorMapEncodeTiledMemref
786786
%tensorMap1d = nvgpu.tma.create.descriptor %devicePtr1d_unranked box[%crd1] : memref<*xf32> -> !tensorMap1d
787787
func.return
788788
}

‎mlir/test/Conversion/PDLToPDLInterp/pdl-to-pdl-interp-matcher.mlir

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -588,7 +588,7 @@ module @variadic_results_all {
588588
// CHECK-DAG: %[[OPS:.*]] = pdl_interp.get_users of %[[VAL0]] : !pdl.value
589589
// CHECK-DAG: pdl_interp.foreach %[[OP:.*]] : !pdl.operation in %[[OPS]]
590590
// CHECK-DAG: %[[OPERANDS:.*]] = pdl_interp.get_operands of %[[OP]]
591-
// CHECK-DAG pdl_interp.are_equal %[[VALS]], %[[OPERANDS]] -> ^{{.*}}, ^[[CONTINUE:.*]]
591+
// CHECK-DAG: pdl_interp.are_equal %[[VALS]], %[[OPERANDS]] -> ^{{.*}}, ^[[CONTINUE:.*]]
592592
// CHECK-DAG: pdl_interp.is_not_null %[[OP]]
593593
// CHECK-DAG: pdl_interp.check_result_count of %[[OP]] is 0
594594
pdl.pattern @variadic_results_all : benefit(1) {
@@ -701,7 +701,7 @@ module @common_connector {
701701
// CHECK-DAG: pdl_interp.are_equal %[[ROOTA_OP]], %[[VAL0]] : !pdl.value
702702
// CHECK-DAG: %[[ROOTB_OP:.*]] = pdl_interp.get_operand 0 of %[[ROOTB]]
703703
// CHECK-DAG: pdl_interp.are_equal %[[ROOTB_OP]], %[[VAL0]] : !pdl.value
704-
// CHECK-DAG } -> ^[[CONTA:.*]]
704+
// CHECK-DAG: } -> ^[[CONTA:.*]]
705705
pdl.pattern @common_connector : benefit(1) {
706706
%type = type
707707
%op = operation -> (%type, %type : !pdl.type, !pdl.type)
@@ -742,7 +742,7 @@ module @common_connector_range {
742742
// CHECK-DAG: pdl_interp.are_equal %[[ROOTA_OPS]], %[[VALS0]] : !pdl.range<value>
743743
// CHECK-DAG: %[[ROOTB_OPS:.*]] = pdl_interp.get_operands of %[[ROOTB]]
744744
// CHECK-DAG: pdl_interp.are_equal %[[ROOTB_OPS]], %[[VALS0]] : !pdl.range<value>
745-
// CHECK-DAG } -> ^[[CONTA:.*]]
745+
// CHECK-DAG: } -> ^[[CONTA:.*]]
746746
pdl.pattern @common_connector_range : benefit(1) {
747747
%types = types
748748
%op = operation -> (%types, %types : !pdl.range<type>, !pdl.range<type>)

‎mlir/test/Conversion/SPIRVToLLVM/spirv-storage-class-mapping.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -91,5 +91,5 @@ spirv.func @pointerCodeSectionINTEL(!spirv.ptr<i1, CodeSectionINTEL>) "None"
9191
spirv.func @pointerDeviceOnlyINTEL(!spirv.ptr<i1, DeviceOnlyINTEL>) "None"
9292

9393
// CHECK-OPENCL: llvm.func @pointerHostOnlyINTEL(!llvm.ptr<6>)
94-
// CHECK-UNKOWN: llvm.func @pointerHostOnlyINTEL(!llvm.ptr)
94+
// CHECK-UNKNOWN: llvm.func @pointerHostOnlyINTEL(!llvm.ptr)
9595
spirv.func @pointerHostOnlyINTEL(!spirv.ptr<i1, HostOnlyINTEL>) "None"

‎mlir/test/Dialect/Arith/unsigned-when-equivalent.mlir

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// RUN: mlir-opt -arith-unsigned-when-equivalent %s | FileCheck %s
22

3-
// CHECK-LABEL func @not_with_maybe_overflow
3+
// CHECK-LABEL: func @not_with_maybe_overflow
44
// CHECK: arith.divsi
55
// CHECK: arith.ceildivsi
66
// CHECK: arith.floordivsi
@@ -32,7 +32,7 @@ func.func @not_with_maybe_overflow(%arg0 : i32) {
3232
func.return
3333
}
3434

35-
// CHECK-LABEL func @yes_with_no_overflow
35+
// CHECK-LABEL: func @yes_with_no_overflow
3636
// CHECK: arith.divui
3737
// CHECK: arith.ceildivui
3838
// CHECK: arith.divui

‎mlir/test/Dialect/ArmSME/tile-allocation-liveness.mlir

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -366,15 +366,15 @@ func.func @avoidable_spill(%a: vector<[4]xf32>, %b: vector<[4]xf32>, %c: vector<
366366

367367
// CHECK-LIVE-RANGE-LABEL: @cond_branch_with_backedge
368368
// CHECK-LIVE-RANGE: ^bb1:
369-
// CHECK-LIVE-RANGE--NEXT: ||| | arith.cmpi
370-
// CHECK-LIVE-RANGE--NEXT: EEE E cf.cond_br
369+
// CHECK-LIVE-RANGE-NEXT: ||| | arith.cmpi
370+
// CHECK-LIVE-RANGE-NEXT: EEE E cf.cond_br
371371
//
372-
// CHECK-LIVE-RANGE--NEXT: ^[[BB3_COPIES:[[:alnum:]]+]]:
373-
// CHECK-LIVE-RANGE--NEXT: ||| ES arm_sme.copy_tile
374-
// CHECK-LIVE-RANGE--NEXT: E|| |S arm_sme.copy_tile
375-
// CHECK-LIVE-RANGE--NEXT: E| ||S arm_sme.copy_tile
376-
// CHECK-LIVE-RANGE--NEXT: E |||S arm_sme.copy_tile
377-
// CHECK-LIVE-RANGE--NEXT: EEEE cf.br
372+
// CHECK-LIVE-RANGE-NEXT: ^[[BB3_COPIES:[[:alnum:]]+]]:
373+
// CHECK-LIVE-RANGE-NEXT: ||| ES arm_sme.copy_tile
374+
// CHECK-LIVE-RANGE-NEXT: E|| |S arm_sme.copy_tile
375+
// CHECK-LIVE-RANGE-NEXT: E| ||S arm_sme.copy_tile
376+
// CHECK-LIVE-RANGE-NEXT: E |||S arm_sme.copy_tile
377+
// CHECK-LIVE-RANGE-NEXT: EEEE cf.br
378378
//
379379
// It is important to note that the first three live ranges in ^bb1 do not end
380380
// at the `cf.cond_br` they are live-out via the backedge bb1 -> bb2 -> bb1.
@@ -389,15 +389,15 @@ func.func @avoidable_spill(%a: vector<[4]xf32>, %b: vector<[4]xf32>, %c: vector<
389389
//
390390
// CHECK-LIVE-RANGE: ========== Coalesced Live Ranges:
391391
// CHECK-LIVE-RANGE: ^bb1:
392-
// CHECK-LIVE-RANGE--NEXT: |||| arith.cmpi
393-
// CHECK-LIVE-RANGE--NEXT: EEEE cf.cond_br
392+
// CHECK-LIVE-RANGE-NEXT: |||| arith.cmpi
393+
// CHECK-LIVE-RANGE-NEXT: EEEE cf.cond_br
394394
//
395-
// CHECK-LIVE-RANGE--NEXT: ^[[BB3_COPIES]]:
396-
// CHECK-LIVE-RANGE--NEXT: |||| arm_sme.copy_tile
397-
// CHECK-LIVE-RANGE--NEXT: |||| arm_sme.copy_tile
398-
// CHECK-LIVE-RANGE--NEXT: |||| arm_sme.copy_tile
399-
// CHECK-LIVE-RANGE--NEXT: |||| arm_sme.copy_tile
400-
// CHECK-LIVE-RANGE--NEXT: EEEE cf.br
395+
// CHECK-LIVE-RANGE-NEXT: ^[[BB3_COPIES]]:
396+
// CHECK-LIVE-RANGE-NEXT: |||| arm_sme.copy_tile
397+
// CHECK-LIVE-RANGE-NEXT: |||| arm_sme.copy_tile
398+
// CHECK-LIVE-RANGE-NEXT: |||| arm_sme.copy_tile
399+
// CHECK-LIVE-RANGE-NEXT: |||| arm_sme.copy_tile
400+
// CHECK-LIVE-RANGE-NEXT: EEEE cf.br
401401

402402
// CHECK-LABEL: @cond_branch_with_backedge
403403
// CHECK-NOT: tile_id = 16

‎mlir/test/Dialect/Bufferization/Transforms/lower-deallocations-func.mlir

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -9,10 +9,10 @@ func.func @conversion_dealloc_simple(%arg0: memref<2xf32>, %arg1: i1) {
99
return
1010
}
1111

12-
// CHECk: scf.if [[ARG1]] {
13-
// CHECk-NEXT: memref.dealloc [[ARG0]] : memref<2xf32>
14-
// CHECk-NEXT: }
15-
// CHECk-NEXT: return
12+
// CHECK: scf.if [[ARG1]] {
13+
// CHECK-NEXT: memref.dealloc [[ARG0]] : memref<2xf32>
14+
// CHECK-NEXT: }
15+
// CHECK-NEXT: return
1616

1717
// -----
1818

‎mlir/test/Dialect/Bufferization/Transforms/lower-deallocations.mlir

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -29,10 +29,10 @@ func.func @conversion_dealloc_simple(%arg0: memref<2xf32>, %arg1: i1) {
2929
return
3030
}
3131

32-
// CHECk: scf.if [[ARG1]] {
33-
// CHECk-NEXT: memref.dealloc [[ARG0]] : memref<2xf32>
34-
// CHECk-NEXT: }
35-
// CHECk-NEXT: return
32+
// CHECK: scf.if [[ARG1]] {
33+
// CHECK-NEXT: memref.dealloc [[ARG0]] : memref<2xf32>
34+
// CHECK-NEXT: }
35+
// CHECK-NEXT: return
3636

3737
// -----
3838

‎mlir/test/Dialect/GPU/barrier-elimination.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -61,7 +61,7 @@ func.func @write_in_a_loop(%arg0: memref<?xf32>, %arg1: f32) attributes {__paral
6161
return
6262
}
6363

64-
// CHECK-LABEL @read_read_write_loop
64+
// CHECK-LABEL: @read_read_write_loop
6565
func.func @read_read_write_loop(%arg0: memref<?xf32>, %arg1: f32) attributes {__parallel_region_boundary_for_test} {
6666
%c0 = arith.constant 0 : index
6767
%c42 = arith.constant 42 : index

‎mlir/test/Dialect/GPU/ops.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -227,7 +227,7 @@ module attributes {gpu.container_module} {
227227
gpu.return
228228
}
229229

230-
// CHECK-LABEL gpu.func @printf_test
230+
// CHECK-LABEL: gpu.func @printf_test
231231
// CHECK: (%[[ARG0:.*]]: i32)
232232
// CHECK: gpu.printf "Value: %d" %[[ARG0]] : i32
233233
gpu.func @printf_test(%arg0 : i32) {

‎mlir/test/Dialect/GPU/outlining.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -123,7 +123,7 @@ llvm.func @launch_from_llvm_func() {
123123
llvm.return
124124
}
125125

126-
// CHECK-DL-LABLE: gpu.module @launch_from_llvm_func_kernel attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<index, 32 : i32>>}
126+
// CHECK-DL-LABEL: gpu.module @launch_from_llvm_func_kernel attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<index, 32 : i32>>}
127127

128128
// -----
129129

‎mlir/test/Dialect/LLVMIR/nvvm.mlir

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -464,24 +464,24 @@ llvm.func private @mbarrier_test_wait_shared(%barrier: !llvm.ptr<3>, %token : i6
464464
llvm.return
465465
}
466466

467-
// CHECK-LABEL : @wgmma_fence_aligned
467+
// CHECK-LABEL: @wgmma_fence_aligned
468468
func.func @wgmma_fence_aligned() {
469-
// CHECK : nvvm.wgmma.fence.aligned
469+
// CHECK: nvvm.wgmma.fence.aligned
470470
nvvm.wgmma.fence.aligned
471471
return
472472
}
473473

474-
// CHECK-LABEL : @wgmma_commit_group_sync_aligned
474+
// CHECK-LABEL: @wgmma_commit_group_sync_aligned
475475
func.func @wgmma_commit_group_sync_aligned() {
476-
// CHECK : nvvm.wgmma.commit.group.sync.aligned
476+
// CHECK: nvvm.wgmma.commit.group.sync.aligned
477477
nvvm.wgmma.commit.group.sync.aligned
478478
return
479479
}
480480

481481

482-
// CHECK-LABEL : @wgmma_commit_group_sync_aligned
482+
// CHECK-LABEL: @wgmma_wait_group_sync_aligned
483483
func.func @wgmma_wait_group_sync_aligned() {
484-
// CHECK : nvvm.wgmma.wait.group.sync.aligned
484+
// CHECK: nvvm.wgmma.wait.group.sync.aligned
485485
nvvm.wgmma.wait.group.sync.aligned 0
486486
return
487487
}
@@ -495,7 +495,7 @@ gpu.module @module_1 [#nvvm.target<chip = "sm_90", features = "+ptx70", link = [
495495
gpu.module @module_2 [#nvvm.target<chip = "sm_90">, #nvvm.target<chip = "sm_80">, #nvvm.target<chip = "sm_70">] {
496496
}
497497

498-
// CHECK-LABEL : nvvm.grid_constant
498+
// CHECK-LABEL: nvvm.grid_constant
499499
llvm.func @kernel_func(%arg0: !llvm.ptr {llvm.byval = i32, nvvm.grid_constant}) attributes {nvvm.kernel} {
500500
llvm.return
501501
}

‎mlir/test/Dialect/Linalg/data-layout-propagation.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -795,7 +795,7 @@ func.func @reduction_pack_transpose_inner_dims(%arg0: tensor<128x256x32xi32>,
795795
// CHECK-SAME: %[[ARG1:[a-zA-Z0-9]+]]
796796
// CHECK: %[[ARG1_EMPTY:.+]] = tensor.empty() : tensor<4x16x16x32xi32>
797797
// CHECK: %[[PACK_ARG1:.+]] = tensor.pack %[[ARG1]]
798-
// CHECK-SME: inner_dims_pos = [1, 0] inner_tiles = [16, 32]
798+
// CHECK-SAME: inner_dims_pos = [1, 0] inner_tiles = [16, 32]
799799
// CHECK-SAME: into %[[ARG1_EMPTY]]
800800
// CHECK: %[[ARG0_EMPTY:.+]] = tensor.empty() : tensor<4x16x32x16x32xi32>
801801
// CHECK: %[[PACK_ARG0:.+]] = tensor.pack %[[ARG0]]

‎mlir/test/Dialect/Math/expand-math.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -221,7 +221,7 @@ func.func @roundf_func(%a: f32) -> f32 {
221221
// CHECK-LABEL: func @powf_func
222222
// CHECK-SAME: ([[ARG0:%.+]]: f64, [[ARG1:%.+]]: f64)
223223
func.func @powf_func(%a: f64, %b: f64) ->f64 {
224-
// CHECK-DAG = [[CST0:%.+]] = arith.constant 0.000000e+00
224+
// CHECK-DAG: [[CST0:%.+]] = arith.constant 0.000000e+00
225225
// CHECK-DAG: [[TWO:%.+]] = arith.constant 2.000000e+00
226226
// CHECK-DAG: [[NEGONE:%.+]] = arith.constant -1.000000e+00
227227
// CHECK-DAG: [[SQR:%.+]] = arith.mulf [[ARG0]], [[ARG0]]

‎mlir/test/Dialect/SCF/transform-ops.mlir

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -6,11 +6,11 @@
66
// CHECK: scf.for
77
// CHECK: arith.addi
88
//
9-
// CHECK: func @foo[[SUFFIX:.+]](%{{.+}}, %{{.+}}, %{{.+}})
9+
// CHECK: func @foo[[$SUFFIX:.+]](%{{.+}}, %{{.+}}, %{{.+}})
1010
// CHECK: scf.for
1111
// CHECK: arith.addi
1212
//
13-
// CHECK-LABEL @loop_outline_op
13+
// CHECK-LABEL: @loop_outline_op
1414
func.func @loop_outline_op(%arg0: index, %arg1: index, %arg2: index) {
1515
// CHECK: scf.for
1616
// CHECK-NOT: scf.for
@@ -23,7 +23,7 @@ func.func @loop_outline_op(%arg0: index, %arg1: index, %arg2: index) {
2323
}
2424
// CHECK: scf.execute_region
2525
// CHECK-NOT: scf.for
26-
// CHECK: func.call @foo[[SUFFIX]]
26+
// CHECK: func.call @foo[[$SUFFIX]]
2727
scf.for %j = %arg0 to %arg1 step %arg2 {
2828
arith.addi %j, %j : index
2929
}

‎mlir/test/Dialect/SPIRV/IR/logical-ops.mlir

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -180,47 +180,47 @@ func.func @logicalUnary(%arg0 : i32)
180180
func.func @select_op_bool(%arg0: i1) -> () {
181181
%0 = spirv.Constant true
182182
%1 = spirv.Constant false
183-
// CHECK : spirv.Select {{%.*}}, {{%.*}}, {{%.*}} : i1, i1
183+
// CHECK: spirv.Select {{%.*}}, {{%.*}}, {{%.*}} : i1, i1
184184
%2 = spirv.Select %arg0, %0, %1 : i1, i1
185185
return
186186
}
187187

188188
func.func @select_op_int(%arg0: i1) -> () {
189189
%0 = spirv.Constant 2 : i32
190190
%1 = spirv.Constant 3 : i32
191-
// CHECK : spirv.Select {{%.*}}, {{%.*}}, {{%.*}} : i1, i32
191+
// CHECK: spirv.Select {{%.*}}, {{%.*}}, {{%.*}} : i1, i32
192192
%2 = spirv.Select %arg0, %0, %1 : i1, i32
193193
return
194194
}
195195

196196
func.func @select_op_float(%arg0: i1) -> () {
197197
%0 = spirv.Constant 2.0 : f32
198198
%1 = spirv.Constant 3.0 : f32
199-
// CHECK : spirv.Select {{%.*}}, {{%.*}}, {{%.*}} : i1, f32
199+
// CHECK: spirv.Select {{%.*}}, {{%.*}}, {{%.*}} : i1, f32
200200
%2 = spirv.Select %arg0, %0, %1 : i1, f32
201201
return
202202
}
203203

204204
func.func @select_op_ptr(%arg0: i1) -> () {
205205
%0 = spirv.Variable : !spirv.ptr<f32, Function>
206206
%1 = spirv.Variable : !spirv.ptr<f32, Function>
207-
// CHECK : spirv.Select {{%.*}}, {{%.*}}, {{%.*}} : i1, !spirv.ptr<f32, Function>
207+
// CHECK: spirv.Select {{%.*}}, {{%.*}}, {{%.*}} : i1, !spirv.ptr<f32, Function>
208208
%2 = spirv.Select %arg0, %0, %1 : i1, !spirv.ptr<f32, Function>
209209
return
210210
}
211211

212212
func.func @select_op_vec(%arg0: i1) -> () {
213213
%0 = spirv.Constant dense<[2.0, 3.0, 4.0]> : vector<3xf32>
214214
%1 = spirv.Constant dense<[5.0, 6.0, 7.0]> : vector<3xf32>
215-
// CHECK : spirv.Select {{%.*}}, {{%.*}}, {{%.*}} : i1, vector<3xf32>
215+
// CHECK: spirv.Select {{%.*}}, {{%.*}}, {{%.*}} : i1, vector<3xf32>
216216
%2 = spirv.Select %arg0, %0, %1 : i1, vector<3xf32>
217217
return
218218
}
219219

220220
func.func @select_op_vec_condn_vec(%arg0: vector<3xi1>) -> () {
221221
%0 = spirv.Constant dense<[2.0, 3.0, 4.0]> : vector<3xf32>
222222
%1 = spirv.Constant dense<[5.0, 6.0, 7.0]> : vector<3xf32>
223-
// CHECK : spirv.Select {{%.*}}, {{%.*}}, {{%.*}} : vector<3xi1>, vector<3xf32>
223+
// CHECK: spirv.Select {{%.*}}, {{%.*}}, {{%.*}} : vector<3xi1>, vector<3xf32>
224224
%2 = spirv.Select %arg0, %0, %1 : vector<3xi1>, vector<3xf32>
225225
return
226226
}

‎mlir/test/Dialect/SPIRV/IR/structure-ops.mlir

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -330,7 +330,7 @@ spirv.module Logical GLSL450 {
330330
// TODO: Fix test case after initialization with normal constant is addressed
331331
// spirv.module Logical GLSL450 {
332332
// %0 = spirv.Constant 4.0 : f32
333-
// // CHECK1: spirv.Variable init(%0) : !spirv.ptr<f32, Private>
333+
// COM: CHECK: spirv.Variable init(%0) : !spirv.ptr<f32, Private>
334334
// spirv.GlobalVariable @var1 init(%0) : !spirv.ptr<f32, Private>
335335
// }
336336

@@ -372,7 +372,7 @@ spirv.module Logical GLSL450 {
372372
// TODO: Fix test case after initialization with constant is addressed
373373
// spirv.module Logical GLSL450 {
374374
// %0 = spirv.Constant 4.0 : f32
375-
// // CHECK1: spirv.GlobalVariable @var1 initializer(%0) {binding = 5 : i32} : !spirv.ptr<f32, Private>
375+
// COM: CHECK: spirv.GlobalVariable @var1 initializer(%0) {binding = 5 : i32} : !spirv.ptr<f32, Private>
376376
// spirv.GlobalVariable @var1 initializer(%0) {binding = 5 : i32} : !spirv.ptr<f32, Private>
377377
// }
378378

‎mlir/test/Dialect/Tensor/fold-into-pack-and-unpack.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -544,7 +544,7 @@ func.func @linalg_transpose_tensor_unpack_fold(%arg0: tensor<1x1x4x16xi32>) -> t
544544
// CHECK-SAME: outer_dims_perm = [1, 0]
545545
// CHECK-SAME: inner_dims_pos = [1, 0]
546546
// CHECK-SAME: inner_tiles = [4, 16]
547-
// CHEKC-SAME: into %[[OUT]] : tensor<1x1x4x16xi32> -> tensor<16x4xi32>
547+
// CHECK-SAME: into %[[OUT]] : tensor<1x1x4x16xi32> -> tensor<16x4xi32>
548548
// CHECK: return %[[UNPACK]] : tensor<16x4xi32>
549549
// CHECK: }
550550

‎mlir/test/IR/parser.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -597,7 +597,7 @@ func.func @funcattrwithblock() -> ()
597597
return
598598
}
599599

600-
// CHECK-label func @funcsimplemap
600+
// CHECK-LABEL: func @funcsimplemap
601601
#map_simple0 = affine_map<()[] -> (10)>
602602
#map_simple1 = affine_map<()[s0] -> (s0)>
603603
#map_non_simple0 = affine_map<(d0)[] -> (d0)>

‎mlir/test/Target/LLVMIR/Import/global-variables.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,7 @@
3636
; CHECK-DAG: %[[ADDR:[0-9]+]] = llvm.mlir.addressof @global_int : !llvm.ptr
3737
; CHECK-DAG: %[[IDX:[0-9]+]] = llvm.mlir.constant(2 : i32) : i32
3838
; CHECK-DAG: %[[GEP:[0-9]+]] = llvm.getelementptr %[[ADDR]][%[[IDX]]] : (!llvm.ptr, i32) -> !llvm.ptr
39-
; CHECK-DAG llvm.return %[[GEP]] : !llvm.ptr
39+
; CHECK-DAG: llvm.return %[[GEP]] : !llvm.ptr
4040
@global_gep_const_expr = internal constant ptr getelementptr (i32, ptr @global_int, i32 2)
4141

4242
; // -----

‎mlir/test/Target/LLVMIR/Import/metadata-loop.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -324,7 +324,7 @@ end:
324324
; // -----
325325

326326
; Verify the unused access group is not imported.
327-
; CHECK-COUNT1: #llvm.access_group
327+
; CHECK-COUNT-1: #llvm.access_group
328328

329329
; CHECK-LABEL: @unused_parallel_access
330330
define void @unused_parallel_access(ptr %arg) {

‎mlir/test/Target/LLVMIR/llvmir-debug.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -234,7 +234,7 @@ llvm.func @func_with_inlined_dbg_value(%arg0: i32) -> (i32) {
234234
// CHECK-DAG: ![[LEXICAL_BLOCK_FILE:.*]] = distinct !DILexicalBlockFile(scope: ![[INNER_FUNC]], file: ![[FILE]], discriminator: 0)
235235
// CHECK-DAG: ![[VAR_LOC0]] = !DILocalVariable(name: "a", scope: ![[OUTER_FUNC]], file: ![[FILE]]
236236
// CHECK-DAG: ![[VAR_LOC1]] = !DILocalVariable(name: "b", scope: ![[LEXICAL_BLOCK_FILE]], file: ![[FILE]]
237-
// CHECK-DAG ![[LABEL]] = !DILabel(scope: ![[LEXICAL_BLOCK_FILE]], name: "label", file: ![[FILE]], line: 42)
237+
// CHECK-DAG: ![[LABEL]] = !DILabel(scope: ![[LEXICAL_BLOCK_FILE]], name: "label", file: ![[FILE]], line: 42)
238238

239239
// -----
240240

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