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thurstondthurstond
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Revert "Fix umax and uminv tests"
This reverts commit 437f872.
1 parent 437f872 commit f1e2f2b

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+36
-148
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2 files changed

+36
-148
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‎llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-umaxv.ll

Lines changed: 18 additions & 74 deletions
Original file line numberDiff line numberDiff line change
@@ -14,41 +14,27 @@
1414
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
1515
target triple = "aarch64--linux-android9001"
1616

17-
define i32 @vmax_u8x8(<8 x i8> %a) nounwind ssp #0 {
17+
define i32 @vmax_u8x8(<8 x i8> %a) nounwind ssp {
1818
; CHECK-LABEL: define i32 @vmax_u8x8(
1919
; CHECK-SAME: <8 x i8> [[A:%.*]]) #[[ATTR0:[0-9]+]] {
20-
; CHECK-NEXT: [[ENTRY:.*:]]
21-
; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i8>, ptr @__msan_param_tls, align 8
20+
; CHECK-NEXT: [[ENTRY:.*]]:
2221
; CHECK-NEXT: call void @llvm.donothing()
23-
; CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP3]] to i64
24-
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP4]], 0
25-
; CHECK-NEXT: br i1 [[_MSCMP]], label %[[BB2:.*]], label %[[BB3:.*]], !prof [[PROF1:![0-9]+]]
26-
; CHECK: [[BB2]]:
27-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4:[0-9]+]]
28-
; CHECK-NEXT: unreachable
29-
; CHECK: [[BB3]]:
3022
; CHECK-NEXT: [[VMAXV_I:%.*]] = tail call i32 @llvm.aarch64.neon.umaxv.i32.v8i8(<8 x i8> [[A]]) #[[ATTR3:[0-9]+]]
3123
; CHECK-NEXT: [[TMP:%.*]] = trunc i32 [[VMAXV_I]] to i8
3224
; CHECK-NEXT: [[TMP0:%.*]] = xor i8 [[TMP]], 0
3325
; CHECK-NEXT: [[TMP1:%.*]] = and i8 -1, [[TMP0]]
3426
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], 0
3527
; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and i1 false, [[TMP2]]
3628
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i8 [[TMP]], 0
37-
; CHECK-NEXT: br i1 [[_MSPROP_ICMP]], label %[[BB7:.*]], label %[[BB8:.*]], !prof [[PROF1]]
38-
; CHECK: [[BB7]]:
39-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4]]
40-
; CHECK-NEXT: unreachable
41-
; CHECK: [[BB8]]:
4229
; CHECK-NEXT: br i1 [[TOBOOL]], label %[[RETURN:.*]], label %[[IF_THEN:.*]]
4330
; CHECK: [[IF_THEN]]:
4431
; CHECK-NEXT: store i32 0, ptr @__msan_retval_tls, align 8
4532
; CHECK-NEXT: [[CALL1:%.*]] = tail call i32 @bar() #[[ATTR3]]
4633
; CHECK-NEXT: [[_MSRET:%.*]] = load i32, ptr @__msan_retval_tls, align 8
4734
; CHECK-NEXT: br label %[[RETURN]]
4835
; CHECK: [[RETURN]]:
49-
; CHECK-NEXT: [[_MSPHI_S:%.*]] = phi i32 [ [[_MSRET]], %[[IF_THEN]] ], [ 0, %[[BB8]] ]
50-
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[CALL1]], %[[IF_THEN]] ], [ 0, %[[BB8]] ]
51-
; CHECK-NEXT: store i32 [[_MSPHI_S]], ptr @__msan_retval_tls, align 8
36+
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[CALL1]], %[[IF_THEN]] ], [ 0, %[[ENTRY]] ]
37+
; CHECK-NEXT: store i32 0, ptr @__msan_retval_tls, align 8
5238
; CHECK-NEXT: ret i32 [[RETVAL_0]]
5339
;
5440
entry:
@@ -68,41 +54,27 @@ return:
6854

6955
declare i32 @bar(...)
7056

71-
define i32 @vmax_u4x16(<4 x i16> %a) nounwind ssp #0 {
57+
define i32 @vmax_u4x16(<4 x i16> %a) nounwind ssp {
7258
; CHECK-LABEL: define i32 @vmax_u4x16(
7359
; CHECK-SAME: <4 x i16> [[A:%.*]]) #[[ATTR0]] {
74-
; CHECK-NEXT: [[ENTRY:.*:]]
75-
; CHECK-NEXT: [[TMP3:%.*]] = load <4 x i16>, ptr @__msan_param_tls, align 8
60+
; CHECK-NEXT: [[ENTRY:.*]]:
7661
; CHECK-NEXT: call void @llvm.donothing()
77-
; CHECK-NEXT: [[TMP4:%.*]] = bitcast <4 x i16> [[TMP3]] to i64
78-
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP4]], 0
79-
; CHECK-NEXT: br i1 [[_MSCMP]], label %[[BB2:.*]], label %[[BB3:.*]], !prof [[PROF1]]
80-
; CHECK: [[BB2]]:
81-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4]]
82-
; CHECK-NEXT: unreachable
83-
; CHECK: [[BB3]]:
8462
; CHECK-NEXT: [[VMAXV_I:%.*]] = tail call i32 @llvm.aarch64.neon.umaxv.i32.v4i16(<4 x i16> [[A]]) #[[ATTR3]]
8563
; CHECK-NEXT: [[TMP:%.*]] = trunc i32 [[VMAXV_I]] to i16
8664
; CHECK-NEXT: [[TMP0:%.*]] = xor i16 [[TMP]], 0
8765
; CHECK-NEXT: [[TMP1:%.*]] = and i16 -1, [[TMP0]]
8866
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i16 [[TMP1]], 0
8967
; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and i1 false, [[TMP2]]
9068
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i16 [[TMP]], 0
91-
; CHECK-NEXT: br i1 [[_MSPROP_ICMP]], label %[[BB7:.*]], label %[[BB8:.*]], !prof [[PROF1]]
92-
; CHECK: [[BB7]]:
93-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4]]
94-
; CHECK-NEXT: unreachable
95-
; CHECK: [[BB8]]:
9669
; CHECK-NEXT: br i1 [[TOBOOL]], label %[[RETURN:.*]], label %[[IF_THEN:.*]]
9770
; CHECK: [[IF_THEN]]:
9871
; CHECK-NEXT: store i32 0, ptr @__msan_retval_tls, align 8
9972
; CHECK-NEXT: [[CALL1:%.*]] = tail call i32 @bar() #[[ATTR3]]
10073
; CHECK-NEXT: [[_MSRET:%.*]] = load i32, ptr @__msan_retval_tls, align 8
10174
; CHECK-NEXT: br label %[[RETURN]]
10275
; CHECK: [[RETURN]]:
103-
; CHECK-NEXT: [[_MSPHI_S:%.*]] = phi i32 [ [[_MSRET]], %[[IF_THEN]] ], [ 0, %[[BB8]] ]
104-
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[CALL1]], %[[IF_THEN]] ], [ 0, %[[BB8]] ]
105-
; CHECK-NEXT: store i32 [[_MSPHI_S]], ptr @__msan_retval_tls, align 8
76+
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[CALL1]], %[[IF_THEN]] ], [ 0, %[[ENTRY]] ]
77+
; CHECK-NEXT: store i32 0, ptr @__msan_retval_tls, align 8
10678
; CHECK-NEXT: ret i32 [[RETVAL_0]]
10779
;
10880
entry:
@@ -120,41 +92,27 @@ return:
12092
ret i32 %retval.0
12193
}
12294

123-
define i32 @vmax_u8x16(<8 x i16> %a) nounwind ssp #0 {
95+
define i32 @vmax_u8x16(<8 x i16> %a) nounwind ssp {
12496
; CHECK-LABEL: define i32 @vmax_u8x16(
12597
; CHECK-SAME: <8 x i16> [[A:%.*]]) #[[ATTR0]] {
126-
; CHECK-NEXT: [[ENTRY:.*:]]
127-
; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i16>, ptr @__msan_param_tls, align 8
98+
; CHECK-NEXT: [[ENTRY:.*]]:
12899
; CHECK-NEXT: call void @llvm.donothing()
129-
; CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i16> [[TMP3]] to i128
130-
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i128 [[TMP4]], 0
131-
; CHECK-NEXT: br i1 [[_MSCMP]], label %[[BB2:.*]], label %[[BB3:.*]], !prof [[PROF1]]
132-
; CHECK: [[BB2]]:
133-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4]]
134-
; CHECK-NEXT: unreachable
135-
; CHECK: [[BB3]]:
136100
; CHECK-NEXT: [[VMAXV_I:%.*]] = tail call i32 @llvm.aarch64.neon.umaxv.i32.v8i16(<8 x i16> [[A]]) #[[ATTR3]]
137101
; CHECK-NEXT: [[TMP:%.*]] = trunc i32 [[VMAXV_I]] to i16
138102
; CHECK-NEXT: [[TMP0:%.*]] = xor i16 [[TMP]], 0
139103
; CHECK-NEXT: [[TMP1:%.*]] = and i16 -1, [[TMP0]]
140104
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i16 [[TMP1]], 0
141105
; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and i1 false, [[TMP2]]
142106
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i16 [[TMP]], 0
143-
; CHECK-NEXT: br i1 [[_MSPROP_ICMP]], label %[[BB7:.*]], label %[[BB8:.*]], !prof [[PROF1]]
144-
; CHECK: [[BB7]]:
145-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4]]
146-
; CHECK-NEXT: unreachable
147-
; CHECK: [[BB8]]:
148107
; CHECK-NEXT: br i1 [[TOBOOL]], label %[[RETURN:.*]], label %[[IF_THEN:.*]]
149108
; CHECK: [[IF_THEN]]:
150109
; CHECK-NEXT: store i32 0, ptr @__msan_retval_tls, align 8
151110
; CHECK-NEXT: [[CALL1:%.*]] = tail call i32 @bar() #[[ATTR3]]
152111
; CHECK-NEXT: [[_MSRET:%.*]] = load i32, ptr @__msan_retval_tls, align 8
153112
; CHECK-NEXT: br label %[[RETURN]]
154113
; CHECK: [[RETURN]]:
155-
; CHECK-NEXT: [[_MSPHI_S:%.*]] = phi i32 [ [[_MSRET]], %[[IF_THEN]] ], [ 0, %[[BB8]] ]
156-
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[CALL1]], %[[IF_THEN]] ], [ 0, %[[BB8]] ]
157-
; CHECK-NEXT: store i32 [[_MSPHI_S]], ptr @__msan_retval_tls, align 8
114+
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[CALL1]], %[[IF_THEN]] ], [ 0, %[[ENTRY]] ]
115+
; CHECK-NEXT: store i32 0, ptr @__msan_retval_tls, align 8
158116
; CHECK-NEXT: ret i32 [[RETVAL_0]]
159117
;
160118
entry:
@@ -172,41 +130,27 @@ return:
172130
ret i32 %retval.0
173131
}
174132

175-
define i32 @vmax_u16x8(<16 x i8> %a) nounwind ssp #0 {
133+
define i32 @vmax_u16x8(<16 x i8> %a) nounwind ssp {
176134
; CHECK-LABEL: define i32 @vmax_u16x8(
177135
; CHECK-SAME: <16 x i8> [[A:%.*]]) #[[ATTR0]] {
178-
; CHECK-NEXT: [[ENTRY:.*:]]
179-
; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i8>, ptr @__msan_param_tls, align 8
136+
; CHECK-NEXT: [[ENTRY:.*]]:
180137
; CHECK-NEXT: call void @llvm.donothing()
181-
; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP3]] to i128
182-
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i128 [[TMP4]], 0
183-
; CHECK-NEXT: br i1 [[_MSCMP]], label %[[BB2:.*]], label %[[BB3:.*]], !prof [[PROF1]]
184-
; CHECK: [[BB2]]:
185-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4]]
186-
; CHECK-NEXT: unreachable
187-
; CHECK: [[BB3]]:
188138
; CHECK-NEXT: [[VMAXV_I:%.*]] = tail call i32 @llvm.aarch64.neon.umaxv.i32.v16i8(<16 x i8> [[A]]) #[[ATTR3]]
189139
; CHECK-NEXT: [[TMP:%.*]] = trunc i32 [[VMAXV_I]] to i8
190140
; CHECK-NEXT: [[TMP0:%.*]] = xor i8 [[TMP]], 0
191141
; CHECK-NEXT: [[TMP1:%.*]] = and i8 -1, [[TMP0]]
192142
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], 0
193143
; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and i1 false, [[TMP2]]
194144
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i8 [[TMP]], 0
195-
; CHECK-NEXT: br i1 [[_MSPROP_ICMP]], label %[[BB7:.*]], label %[[BB8:.*]], !prof [[PROF1]]
196-
; CHECK: [[BB7]]:
197-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4]]
198-
; CHECK-NEXT: unreachable
199-
; CHECK: [[BB8]]:
200145
; CHECK-NEXT: br i1 [[TOBOOL]], label %[[RETURN:.*]], label %[[IF_THEN:.*]]
201146
; CHECK: [[IF_THEN]]:
202147
; CHECK-NEXT: store i32 0, ptr @__msan_retval_tls, align 8
203148
; CHECK-NEXT: [[CALL1:%.*]] = tail call i32 @bar() #[[ATTR3]]
204149
; CHECK-NEXT: [[_MSRET:%.*]] = load i32, ptr @__msan_retval_tls, align 8
205150
; CHECK-NEXT: br label %[[RETURN]]
206151
; CHECK: [[RETURN]]:
207-
; CHECK-NEXT: [[_MSPHI_S:%.*]] = phi i32 [ [[_MSRET]], %[[IF_THEN]] ], [ 0, %[[BB8]] ]
208-
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[CALL1]], %[[IF_THEN]] ], [ 0, %[[BB8]] ]
209-
; CHECK-NEXT: store i32 [[_MSPHI_S]], ptr @__msan_retval_tls, align 8
152+
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[CALL1]], %[[IF_THEN]] ], [ 0, %[[ENTRY]] ]
153+
; CHECK-NEXT: store i32 0, ptr @__msan_retval_tls, align 8
210154
; CHECK-NEXT: ret i32 [[RETVAL_0]]
211155
;
212156
entry:
@@ -233,9 +177,9 @@ define <8 x i8> @test_vmaxv_u8_used_by_laneop(<8 x i8> %a1, <8 x i8> %a2) #0 {
233177
; CHECK-NEXT: call void @llvm.donothing()
234178
; CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to i64
235179
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP2]], 0
236-
; CHECK-NEXT: br i1 [[_MSCMP]], label %[[BB3:.*]], label %[[BB4:.*]], !prof [[PROF1]]
180+
; CHECK-NEXT: br i1 [[_MSCMP]], label %[[BB3:.*]], label %[[BB4:.*]], !prof [[PROF1:![0-9]+]]
237181
; CHECK: [[BB3]]:
238-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4]]
182+
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4:[0-9]+]]
239183
; CHECK-NEXT: unreachable
240184
; CHECK: [[BB4]]:
241185
; CHECK-NEXT: [[TMP5:%.*]] = tail call i32 @llvm.aarch64.neon.umaxv.i32.v8i8(<8 x i8> [[A2]])

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