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[AArch64] Avoid NEON ctpop in Streaming-SVE mode (#93826)
The NEON ctpop instruction is also used for scalars.
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2 files changed

+1505
-839
lines changed

2 files changed

+1505
-839
lines changed

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -9571,13 +9571,17 @@ SDValue AArch64TargetLowering::LowerCTPOP_PARITY(SDValue Op,
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Attribute::NoImplicitFloat))
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return SDValue();
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9574-
if (!Subtarget->hasNEON())
9574+
EVT VT = Op.getValueType();
9575+
if (VT.isScalableVector() ||
9576+
useSVEForFixedLengthVectorVT(VT, !Subtarget->isNeonAvailable()))
9577+
return LowerToPredicatedOp(Op, DAG, AArch64ISD::CTPOP_MERGE_PASSTHRU);
9578+
9579+
if (!Subtarget->isNeonAvailable())
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return SDValue();
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bool IsParity = Op.getOpcode() == ISD::PARITY;
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SDValue Val = Op.getOperand(0);
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SDLoc DL(Op);
9580-
EVT VT = Op.getValueType();
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// for i32, general parity function using EORs is more efficient compared to
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// using floating point
@@ -9626,10 +9630,6 @@ SDValue AArch64TargetLowering::LowerCTPOP_PARITY(SDValue Op,
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assert(!IsParity && "ISD::PARITY of vector types not supported");
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9629-
if (VT.isScalableVector() ||
9630-
useSVEForFixedLengthVectorVT(VT, !Subtarget->isNeonAvailable()))
9631-
return LowerToPredicatedOp(Op, DAG, AArch64ISD::CTPOP_MERGE_PASSTHRU);
9632-
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assert((VT == MVT::v1i64 || VT == MVT::v2i64 || VT == MVT::v2i32 ||
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VT == MVT::v4i32 || VT == MVT::v4i16 || VT == MVT::v8i16) &&
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"Unexpected type for custom ctpop lowering");

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