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[X86] Cleanup check prefixes identified in #92248
Avoid using leading numbers in check prefixes - replace with actual triple config names.
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4 files changed

+139
-139
lines changed

4 files changed

+139
-139
lines changed

‎llvm/test/CodeGen/X86/align-branch-boundary-suppressions-tls.ll

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -2,26 +2,26 @@
22
;; sequence. It uses prefixes to allow linker relaxation. We need to disable
33
;; prefix or nop padding for it. For simplicity and consistency, disable for
44
;; Local Dynamic and 32-bit as well.
5-
; RUN: llc -mtriple=i386 -relocation-model=pic -x86-branches-within-32B-boundaries < %s | FileCheck --check-prefixes=CHECK,32 %s
6-
; RUN: llc -mtriple=x86_64 -relocation-model=pic -x86-branches-within-32B-boundaries < %s | FileCheck --check-prefixes=CHECK,64 %s
5+
; RUN: llc -mtriple=i386 -relocation-model=pic -x86-branches-within-32B-boundaries < %s | FileCheck --check-prefixes=CHECK,X86 %s
6+
; RUN: llc -mtriple=x86_64 -relocation-model=pic -x86-branches-within-32B-boundaries < %s | FileCheck --check-prefixes=CHECK,X64 %s
77

88
@gd = external thread_local global i32
99
@ld = internal thread_local global i32 0
1010

1111
define i32 @tls_get_addr() {
1212
; CHECK-LABEL: tls_get_addr:
1313
; CHECK: #noautopadding
14-
; 32: leal gd@TLSGD(,%ebx), %eax
15-
; 32: calll ___tls_get_addr@PLT
16-
; 64: data16
17-
; 64: leaq gd@TLSGD(%rip), %rdi
18-
; 64: callq __tls_get_addr@PLT
14+
; X86: leal gd@TLSGD(,%ebx), %eax
15+
; X86: calll ___tls_get_addr@PLT
16+
; X64: data16
17+
; X64: leaq gd@TLSGD(%rip), %rdi
18+
; X64: callq __tls_get_addr@PLT
1919
; CHECK: #autopadding
2020
; CHECK: #noautopadding
21-
; 32: leal ld@TLSLDM(%ebx), %eax
22-
; 32: calll ___tls_get_addr@PLT
23-
; 64: leaq ld@TLSLD(%rip), %rdi
24-
; 64: callq __tls_get_addr@PLT
21+
; X86: leal ld@TLSLDM(%ebx), %eax
22+
; X86: calll ___tls_get_addr@PLT
23+
; X64: leaq ld@TLSLD(%rip), %rdi
24+
; X64: callq __tls_get_addr@PLT
2525
; CHECK: #autopadding
2626
%1 = load i32, ptr @gd
2727
%2 = load i32, ptr @ld

‎llvm/test/CodeGen/X86/asm-modifier.ll

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2-
; RUN: llc -mtriple=i686 < %s | FileCheck %s --check-prefixes=CHECK,32
3-
; RUN: llc -mtriple=x86_64 < %s | FileCheck %s --check-prefixes=CHECK,64
2+
; RUN: llc -mtriple=i686 < %s | FileCheck %s --check-prefixes=CHECK,X86
3+
; RUN: llc -mtriple=x86_64 < %s | FileCheck %s --check-prefixes=CHECK,X64
44

55
@var = internal global i32 0, align 4
66

@@ -43,20 +43,20 @@ entry:
4343
}
4444

4545
define void @test_V(ptr %p) {
46-
; 32-LABEL: test_V:
47-
; 32: # %bb.0: # %entry
48-
; 32-NEXT: movl {{[0-9]+}}(%esp), %eax
49-
; 32-NEXT: #APP
50-
; 32-NEXT: calll __x86_indirect_thunk_eax
51-
; 32-NEXT: #NO_APP
52-
; 32-NEXT: retl
46+
; X86-LABEL: test_V:
47+
; X86: # %bb.0: # %entry
48+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
49+
; X86-NEXT: #APP
50+
; X86-NEXT: calll __x86_indirect_thunk_eax
51+
; X86-NEXT: #NO_APP
52+
; X86-NEXT: retl
5353
;
54-
; 64-LABEL: test_V:
55-
; 64: # %bb.0: # %entry
56-
; 64-NEXT: #APP
57-
; 64-NEXT: callq __x86_indirect_thunk_rdi
58-
; 64-NEXT: #NO_APP
59-
; 64-NEXT: retq
54+
; X64-LABEL: test_V:
55+
; X64: # %bb.0: # %entry
56+
; X64-NEXT: #APP
57+
; X64-NEXT: callq __x86_indirect_thunk_rdi
58+
; X64-NEXT: #NO_APP
59+
; X64-NEXT: retq
6060
entry:
6161
tail call void asm sideeffect "call __x86_indirect_thunk_${0:V}", "r,~{dirflag},~{fpsr},~{flags}"(ptr %p)
6262
ret void

‎llvm/test/CodeGen/X86/pr32345.ll

Lines changed: 90 additions & 90 deletions
Original file line numberDiff line numberDiff line change
@@ -1,74 +1,74 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc -O0 -mtriple=x86_64-unknown-linux-gnu -o - %s | FileCheck %s -check-prefix=X640
3-
; RUN: llc -O0 -mtriple=i686-unknown -o - %s | FileCheck %s -check-prefix=6860
4-
; RUN: llc -mtriple=x86_64-unknown-linux-gnu -o - %s | FileCheck %s -check-prefix=X64
5-
; RUN: llc -mtriple=i686-unknown -o - %s | FileCheck %s -check-prefix=686
2+
; RUN: llc -O0 -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s -check-prefix=X64-O0
3+
; RUN: llc -O0 -mtriple=i686-unknown < %s | FileCheck %s -check-prefix=X86-O0
4+
; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s -check-prefix=X64
5+
; RUN: llc -mtriple=i686-unknown < %s | FileCheck %s -check-prefix=X86
66

77
@var_22 = external dso_local global i16, align 2
88
@var_27 = external dso_local global i16, align 2
99

1010
define void @foo() {
11-
; X640-LABEL: foo:
12-
; X640: # %bb.0: # %bb
13-
; X640-NEXT: movzwl var_22, %eax
14-
; X640-NEXT: movzwl var_27, %ecx
15-
; X640-NEXT: xorl %ecx, %eax
16-
; X640-NEXT: movzwl var_27, %ecx
17-
; X640-NEXT: xorl %ecx, %eax
18-
; X640-NEXT: cltq
19-
; X640-NEXT: movq %rax, -{{[0-9]+}}(%rsp)
20-
; X640-NEXT: movzwl var_22, %eax
21-
; X640-NEXT: movzwl var_27, %ecx
22-
; X640-NEXT: xorl %ecx, %eax
23-
; X640-NEXT: movzwl var_27, %ecx
24-
; X640-NEXT: xorl %ecx, %eax
25-
; X640-NEXT: cltq
26-
; X640-NEXT: movzwl var_27, %ecx
27-
; X640-NEXT: subl $16610, %ecx # imm = 0x40E2
28-
; X640-NEXT: movl %ecx, %ecx
29-
; X640-NEXT: # kill: def $rcx killed $ecx
30-
; X640-NEXT: # kill: def $cl killed $rcx
31-
; X640-NEXT: sarq %cl, %rax
32-
; X640-NEXT: movb %al, %cl
33-
; X640-NEXT: # implicit-def: $rax
34-
; X640-NEXT: movb %cl, (%rax)
35-
; X640-NEXT: retq
11+
; X64-O0-LABEL: foo:
12+
; X64-O0: # %bb.0: # %bb
13+
; X64-O0-NEXT: movzwl var_22, %eax
14+
; X64-O0-NEXT: movzwl var_27, %ecx
15+
; X64-O0-NEXT: xorl %ecx, %eax
16+
; X64-O0-NEXT: movzwl var_27, %ecx
17+
; X64-O0-NEXT: xorl %ecx, %eax
18+
; X64-O0-NEXT: cltq
19+
; X64-O0-NEXT: movq %rax, -{{[0-9]+}}(%rsp)
20+
; X64-O0-NEXT: movzwl var_22, %eax
21+
; X64-O0-NEXT: movzwl var_27, %ecx
22+
; X64-O0-NEXT: xorl %ecx, %eax
23+
; X64-O0-NEXT: movzwl var_27, %ecx
24+
; X64-O0-NEXT: xorl %ecx, %eax
25+
; X64-O0-NEXT: cltq
26+
; X64-O0-NEXT: movzwl var_27, %ecx
27+
; X64-O0-NEXT: subl $16610, %ecx # imm = 0x40E2
28+
; X64-O0-NEXT: movl %ecx, %ecx
29+
; X64-O0-NEXT: # kill: def $rcx killed $ecx
30+
; X64-O0-NEXT: # kill: def $cl killed $rcx
31+
; X64-O0-NEXT: sarq %cl, %rax
32+
; X64-O0-NEXT: movb %al, %cl
33+
; X64-O0-NEXT: # implicit-def: $rax
34+
; X64-O0-NEXT: movb %cl, (%rax)
35+
; X64-O0-NEXT: retq
3636
;
37-
; 6860-LABEL: foo:
38-
; 6860: # %bb.0: # %bb
39-
; 6860-NEXT: pushl %ebp
40-
; 6860-NEXT: .cfi_def_cfa_offset 8
41-
; 6860-NEXT: .cfi_offset %ebp, -8
42-
; 6860-NEXT: movl %esp, %ebp
43-
; 6860-NEXT: .cfi_def_cfa_register %ebp
44-
; 6860-NEXT: andl $-8, %esp
45-
; 6860-NEXT: subl $24, %esp
46-
; 6860-NEXT: movzwl var_22, %eax
47-
; 6860-NEXT: movl %eax, {{[0-9]+}}(%esp)
48-
; 6860-NEXT: movl $0, {{[0-9]+}}(%esp)
49-
; 6860-NEXT: movzwl var_22, %edx
50-
; 6860-NEXT: movb var_27, %cl
51-
; 6860-NEXT: addb $30, %cl
52-
; 6860-NEXT: movb %cl, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
53-
; 6860-NEXT: xorl %eax, %eax
54-
; 6860-NEXT: shrdl %cl, %eax, %edx
55-
; 6860-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %cl # 1-byte Reload
56-
; 6860-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
57-
; 6860-NEXT: testb $32, %cl
58-
; 6860-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
59-
; 6860-NEXT: jne .LBB0_2
60-
; 6860-NEXT: # %bb.1: # %bb
61-
; 6860-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
62-
; 6860-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
63-
; 6860-NEXT: .LBB0_2: # %bb
64-
; 6860-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
65-
; 6860-NEXT: movb %al, %cl
66-
; 6860-NEXT: # implicit-def: $eax
67-
; 6860-NEXT: movb %cl, (%eax)
68-
; 6860-NEXT: movl %ebp, %esp
69-
; 6860-NEXT: popl %ebp
70-
; 6860-NEXT: .cfi_def_cfa %esp, 4
71-
; 6860-NEXT: retl
37+
; X86-O0-LABEL: foo:
38+
; X86-O0: # %bb.0: # %bb
39+
; X86-O0-NEXT: pushl %ebp
40+
; X86-O0-NEXT: .cfi_def_cfa_offset 8
41+
; X86-O0-NEXT: .cfi_offset %ebp, -8
42+
; X86-O0-NEXT: movl %esp, %ebp
43+
; X86-O0-NEXT: .cfi_def_cfa_register %ebp
44+
; X86-O0-NEXT: andl $-8, %esp
45+
; X86-O0-NEXT: subl $24, %esp
46+
; X86-O0-NEXT: movzwl var_22, %eax
47+
; X86-O0-NEXT: movl %eax, {{[0-9]+}}(%esp)
48+
; X86-O0-NEXT: movl $0, {{[0-9]+}}(%esp)
49+
; X86-O0-NEXT: movzwl var_22, %edx
50+
; X86-O0-NEXT: movb var_27, %cl
51+
; X86-O0-NEXT: addb $30, %cl
52+
; X86-O0-NEXT: movb %cl, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
53+
; X86-O0-NEXT: xorl %eax, %eax
54+
; X86-O0-NEXT: shrdl %cl, %eax, %edx
55+
; X86-O0-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %cl # 1-byte Reload
56+
; X86-O0-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
57+
; X86-O0-NEXT: testb $32, %cl
58+
; X86-O0-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
59+
; X86-O0-NEXT: jne .LBB0_2
60+
; X86-O0-NEXT: # %bb.1: # %bb
61+
; X86-O0-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
62+
; X86-O0-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
63+
; X86-O0-NEXT: .LBB0_2: # %bb
64+
; X86-O0-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
65+
; X86-O0-NEXT: movb %al, %cl
66+
; X86-O0-NEXT: # implicit-def: $eax
67+
; X86-O0-NEXT: movb %cl, (%eax)
68+
; X86-O0-NEXT: movl %ebp, %esp
69+
; X86-O0-NEXT: popl %ebp
70+
; X86-O0-NEXT: .cfi_def_cfa %esp, 4
71+
; X86-O0-NEXT: retl
7272
;
7373
; X64-LABEL: foo:
7474
; X64: # %bb.0: # %bb
@@ -80,32 +80,32 @@ define void @foo() {
8080
; X64-NEXT: movb %al, (%rax)
8181
; X64-NEXT: retq
8282
;
83-
; 686-LABEL: foo:
84-
; 686: # %bb.0: # %bb
85-
; 686-NEXT: pushl %ebp
86-
; 686-NEXT: .cfi_def_cfa_offset 8
87-
; 686-NEXT: .cfi_offset %ebp, -8
88-
; 686-NEXT: movl %esp, %ebp
89-
; 686-NEXT: .cfi_def_cfa_register %ebp
90-
; 686-NEXT: andl $-8, %esp
91-
; 686-NEXT: subl $8, %esp
92-
; 686-NEXT: movzbl var_27, %ecx
93-
; 686-NEXT: movzwl var_22, %eax
94-
; 686-NEXT: movl %eax, (%esp)
95-
; 686-NEXT: movl $0, {{[0-9]+}}(%esp)
96-
; 686-NEXT: addb $30, %cl
97-
; 686-NEXT: xorl %edx, %edx
98-
; 686-NEXT: shrdl %cl, %edx, %eax
99-
; 686-NEXT: testb $32, %cl
100-
; 686-NEXT: jne .LBB0_2
101-
; 686-NEXT: # %bb.1: # %bb
102-
; 686-NEXT: movl %eax, %edx
103-
; 686-NEXT: .LBB0_2: # %bb
104-
; 686-NEXT: movb %dl, (%eax)
105-
; 686-NEXT: movl %ebp, %esp
106-
; 686-NEXT: popl %ebp
107-
; 686-NEXT: .cfi_def_cfa %esp, 4
108-
; 686-NEXT: retl
83+
; X86-LABEL: foo:
84+
; X86: # %bb.0: # %bb
85+
; X86-NEXT: pushl %ebp
86+
; X86-NEXT: .cfi_def_cfa_offset 8
87+
; X86-NEXT: .cfi_offset %ebp, -8
88+
; X86-NEXT: movl %esp, %ebp
89+
; X86-NEXT: .cfi_def_cfa_register %ebp
90+
; X86-NEXT: andl $-8, %esp
91+
; X86-NEXT: subl $8, %esp
92+
; X86-NEXT: movzbl var_27, %ecx
93+
; X86-NEXT: movzwl var_22, %eax
94+
; X86-NEXT: movl %eax, (%esp)
95+
; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
96+
; X86-NEXT: addb $30, %cl
97+
; X86-NEXT: xorl %edx, %edx
98+
; X86-NEXT: shrdl %cl, %edx, %eax
99+
; X86-NEXT: testb $32, %cl
100+
; X86-NEXT: jne .LBB0_2
101+
; X86-NEXT: # %bb.1: # %bb
102+
; X86-NEXT: movl %eax, %edx
103+
; X86-NEXT: .LBB0_2: # %bb
104+
; X86-NEXT: movb %dl, (%eax)
105+
; X86-NEXT: movl %ebp, %esp
106+
; X86-NEXT: popl %ebp
107+
; X86-NEXT: .cfi_def_cfa %esp, 4
108+
; X86-NEXT: retl
109109
bb:
110110
%tmp = alloca i64, align 8
111111
%tmp1 = load i16, ptr @var_22, align 2

‎llvm/test/CodeGen/X86/x32-va_start.ll

Lines changed: 23 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
22
; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s -check-prefix=SSE
33
; RUN: llc < %s -mtriple=x86_64-linux-gnux32 -mattr=-sse | FileCheck %s -check-prefix=NOSSE
4-
; RUN: llc < %s -mtriple=i386-linux-gnux32 | FileCheck %s -check-prefix=32BITABI
5-
; RUN: llc < %s -mtriple=i686-linux-gnux32 | FileCheck %s -check-prefix=32BITABI
4+
; RUN: llc < %s -mtriple=i386-linux-gnux32 | FileCheck %s -check-prefix=X32BITABI
5+
; RUN: llc < %s -mtriple=i686-linux-gnux32 | FileCheck %s -check-prefix=X32BITABI
66
;
77
; Verifies that x32 va_start lowering is sane. To regenerate this test, use
88
; cat <<EOF |
@@ -97,27 +97,27 @@ define i32 @foo(float %a, ptr nocapture readnone %fmt, ...) nounwind {
9797
; NOSSE-NEXT: movl (%eax), %eax
9898
; NOSSE-NEXT: retq
9999
;
100-
; 32BITABI-LABEL: foo:
101-
; 32BITABI: # %bb.0: # %entry
102-
; 32BITABI-NEXT: subl $28, %esp
103-
; 32BITABI-NEXT: leal {{[0-9]+}}(%esp), %ecx
104-
; 32BITABI-NEXT: movl %ecx, (%esp)
105-
; 32BITABI-NEXT: cmpl $40, %ecx
106-
; 32BITABI-NEXT: ja .LBB0_2
107-
; 32BITABI-NEXT: # %bb.1: # %vaarg.in_reg
108-
; 32BITABI-NEXT: movl {{[0-9]+}}(%esp), %eax
109-
; 32BITABI-NEXT: addl %ecx, %eax
110-
; 32BITABI-NEXT: addl $8, %ecx
111-
; 32BITABI-NEXT: movl %ecx, (%esp)
112-
; 32BITABI-NEXT: jmp .LBB0_3
113-
; 32BITABI-NEXT: .LBB0_2: # %vaarg.in_mem
114-
; 32BITABI-NEXT: movl {{[0-9]+}}(%esp), %eax
115-
; 32BITABI-NEXT: leal 8(%eax), %ecx
116-
; 32BITABI-NEXT: movl %ecx, {{[0-9]+}}(%esp)
117-
; 32BITABI-NEXT: .LBB0_3: # %vaarg.end
118-
; 32BITABI-NEXT: movl (%eax), %eax
119-
; 32BITABI-NEXT: addl $28, %esp
120-
; 32BITABI-NEXT: retl
100+
; X32BITABI-LABEL: foo:
101+
; X32BITABI: # %bb.0: # %entry
102+
; X32BITABI-NEXT: subl $28, %esp
103+
; X32BITABI-NEXT: leal {{[0-9]+}}(%esp), %ecx
104+
; X32BITABI-NEXT: movl %ecx, (%esp)
105+
; X32BITABI-NEXT: cmpl $40, %ecx
106+
; X32BITABI-NEXT: ja .LBB0_2
107+
; X32BITABI-NEXT: # %bb.1: # %vaarg.in_reg
108+
; X32BITABI-NEXT: movl {{[0-9]+}}(%esp), %eax
109+
; X32BITABI-NEXT: addl %ecx, %eax
110+
; X32BITABI-NEXT: addl $8, %ecx
111+
; X32BITABI-NEXT: movl %ecx, (%esp)
112+
; X32BITABI-NEXT: jmp .LBB0_3
113+
; X32BITABI-NEXT: .LBB0_2: # %vaarg.in_mem
114+
; X32BITABI-NEXT: movl {{[0-9]+}}(%esp), %eax
115+
; X32BITABI-NEXT: leal 8(%eax), %ecx
116+
; X32BITABI-NEXT: movl %ecx, {{[0-9]+}}(%esp)
117+
; X32BITABI-NEXT: .LBB0_3: # %vaarg.end
118+
; X32BITABI-NEXT: movl (%eax), %eax
119+
; X32BITABI-NEXT: addl $28, %esp
120+
; X32BITABI-NEXT: retl
121121
entry:
122122
%ap = alloca [1 x %struct.__va_list_tag], align 16
123123
call void @llvm.lifetime.start.p0(i64 16, ptr %ap) #2

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