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[AArch64] Add extra add/cast tests for select-optimize.
Extra tests for #115489 with different operand order. Also fixes the target triple.
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‎llvm/test/CodeGen/AArch64/selectopt-cast.ll

Lines changed: 104 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2-
; RUN: opt -select-optimize -mtriple=arm64-apple-macosx-mcpu=apple-m4 -S %s | FileCheck %s
3-
; RUN: opt -passes='require<profile-summary>,function(select-optimize)' -mtriple=arm64-apple-macosx-mcpu=apple-m4 -S %s | FileCheck %s
2+
; RUN: opt -select-optimize -mtriple=arm64-apple-macosx -S %s | FileCheck %s
3+
; RUN: opt -passes='require<profile-summary>,function(select-optimize)' -mtriple=arm64-apple-macosx -S %s | FileCheck %s
44

55
define void @test_add_zext(ptr %dst, ptr %src, i64 %j.start, i64 %p, i64 %i.start) {
66
; CHECK-LABEL: @test_add_zext(
@@ -49,13 +49,60 @@ exit:
4949
ret void
5050
}
5151

52+
define void @test_add_zext_first_op(ptr %dst, ptr %src, i64 %j.start, i64 %p, i64 %i.start) {
53+
; CHECK-LABEL: @test_add_zext_first_op(
54+
; CHECK-NEXT: entry:
55+
; CHECK-NEXT: br label [[LOOP:%.*]]
56+
; CHECK: loop:
57+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
58+
; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[J_START:%.*]], [[ENTRY]] ], [ [[J_NEXT:%.*]], [[LOOP]] ]
59+
; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_START:%.*]], [[ENTRY]] ], [ [[J_NEXT]], [[LOOP]] ]
60+
; CHECK-NEXT: [[GEP_I:%.*]] = getelementptr inbounds ptr, ptr [[SRC:%.*]], i64 [[I]]
61+
; CHECK-NEXT: [[L_I:%.*]] = load ptr, ptr [[GEP_I]], align 8
62+
; CHECK-NEXT: [[GEP_J:%.*]] = getelementptr inbounds ptr, ptr [[SRC]], i64 [[J]]
63+
; CHECK-NEXT: [[L_J:%.*]] = load ptr, ptr [[GEP_J]], align 8
64+
; CHECK-NEXT: [[CMP3:%.*]] = icmp ult ptr [[L_I]], [[L_J]]
65+
; CHECK-NEXT: [[DEC:%.*]] = zext i1 [[CMP3]] to i64
66+
; CHECK-NEXT: [[J_NEXT]] = add nsw i64 [[DEC]], [[J]]
67+
; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr inbounds ptr, ptr [[DST:%.*]], i64 [[IV]]
68+
; CHECK-NEXT: store i64 [[J_NEXT]], ptr [[GEP_DST]], align 8
69+
; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
70+
; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], [[J_START]]
71+
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
72+
; CHECK: exit:
73+
; CHECK-NEXT: ret void
74+
;
75+
entry:
76+
br label %loop
77+
78+
loop:
79+
%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
80+
%j = phi i64 [ %j.start, %entry ], [ %j.next, %loop ]
81+
%i = phi i64 [ %i.start, %entry ], [ %j.next, %loop ]
82+
%gep.i = getelementptr inbounds ptr, ptr %src, i64 %i
83+
%l.i = load ptr, ptr %gep.i, align 8
84+
%gep.j = getelementptr inbounds ptr, ptr %src, i64 %j
85+
%l.j = load ptr, ptr %gep.j, align 8
86+
%cmp3 = icmp ult ptr %l.i, %l.j
87+
%dec = zext i1 %cmp3 to i64
88+
%j.next = add nsw i64 %dec, %j
89+
%gep.dst = getelementptr inbounds ptr, ptr %dst, i64 %iv
90+
store i64 %j.next, ptr %gep.dst, align 8
91+
%iv.next = add i64 %iv, 1
92+
%ec = icmp eq i64 %iv, %j.start
93+
br i1 %ec, label %exit, label %loop
94+
95+
exit:
96+
ret void
97+
}
98+
5299
define void @test_add_zext_not(ptr %dst, ptr %src, i64 %j.start, i64 %p, i64 %i.start) {
53100
; CHECK-LABEL: @test_add_zext_not(
54101
; CHECK-NEXT: entry:
55102
; CHECK-NEXT: br label [[LOOP:%.*]]
56103
; CHECK: loop:
57104
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
58-
; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[HIGH:%.*]], [[ENTRY]] ], [ [[J_NEXT:%.*]], [[LOOP]] ]
105+
; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[J_START:%.*]], [[ENTRY]] ], [ [[J_NEXT:%.*]], [[LOOP]] ]
59106
; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_START:%.*]], [[ENTRY]] ], [ [[J_NEXT]], [[LOOP]] ]
60107
; CHECK-NEXT: [[GEP_I:%.*]] = getelementptr inbounds ptr, ptr [[SRC:%.*]], i64 [[I]]
61108
; CHECK-NEXT: [[L_I:%.*]] = load ptr, ptr [[GEP_I]], align 8
@@ -68,8 +115,8 @@ define void @test_add_zext_not(ptr %dst, ptr %src, i64 %j.start, i64 %p, i64 %i.
68115
; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr inbounds ptr, ptr [[DST:%.*]], i64 [[IV]]
69116
; CHECK-NEXT: store i64 [[J_NEXT]], ptr [[GEP_DST]], align 8
70117
; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
71-
; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV]], [[HIGH]]
72-
; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[EXIT:%.*]], label [[LOOP]]
118+
; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], [[J_START]]
119+
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
73120
; CHECK: exit:
74121
; CHECK-NEXT: ret void
75122
;
@@ -97,6 +144,7 @@ loop:
97144
exit:
98145
ret void
99146
}
147+
100148
define void @test_add_sext(ptr %dst, ptr %src, i64 %j.start, i64 %p, i64 %i.start) {
101149
; CHECK-LABEL: @test_add_sext(
102150
; CHECK-NEXT: entry:
@@ -350,13 +398,60 @@ exit:
350398
ret void
351399
}
352400

401+
define void @test_sub_zext_first_op(ptr %dst, ptr %src, i64 %j.start, i64 %p, i64 %i.start) {
402+
; CHECK-LABEL: @test_sub_zext_first_op(
403+
; CHECK-NEXT: entry:
404+
; CHECK-NEXT: br label [[LOOP:%.*]]
405+
; CHECK: loop:
406+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
407+
; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[J_START:%.*]], [[ENTRY]] ], [ [[J_NEXT:%.*]], [[LOOP]] ]
408+
; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_START:%.*]], [[ENTRY]] ], [ [[J_NEXT]], [[LOOP]] ]
409+
; CHECK-NEXT: [[GEP_I:%.*]] = getelementptr inbounds ptr, ptr [[SRC:%.*]], i64 [[I]]
410+
; CHECK-NEXT: [[L_I:%.*]] = load ptr, ptr [[GEP_I]], align 8
411+
; CHECK-NEXT: [[GEP_J:%.*]] = getelementptr inbounds ptr, ptr [[SRC]], i64 [[J]]
412+
; CHECK-NEXT: [[L_J:%.*]] = load ptr, ptr [[GEP_J]], align 8
413+
; CHECK-NEXT: [[CMP3:%.*]] = icmp ult ptr [[L_I]], [[L_J]]
414+
; CHECK-NEXT: [[DEC:%.*]] = zext i1 [[CMP3]] to i64
415+
; CHECK-NEXT: [[J_NEXT]] = sub nsw i64 [[DEC]], [[J]]
416+
; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr inbounds ptr, ptr [[DST:%.*]], i64 [[IV]]
417+
; CHECK-NEXT: store i64 [[J_NEXT]], ptr [[GEP_DST]], align 8
418+
; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
419+
; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], [[J_START]]
420+
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
421+
; CHECK: exit:
422+
; CHECK-NEXT: ret void
423+
;
424+
entry:
425+
br label %loop
426+
427+
loop:
428+
%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
429+
%j = phi i64 [ %j.start, %entry ], [ %j.next, %loop ]
430+
%i = phi i64 [ %i.start, %entry ], [ %j.next, %loop ]
431+
%gep.i = getelementptr inbounds ptr, ptr %src, i64 %i
432+
%l.i = load ptr, ptr %gep.i, align 8
433+
%gep.j = getelementptr inbounds ptr, ptr %src, i64 %j
434+
%l.j = load ptr, ptr %gep.j, align 8
435+
%cmp3 = icmp ult ptr %l.i, %l.j
436+
%dec = zext i1 %cmp3 to i64
437+
%j.next = sub nsw i64 %dec, %j
438+
%gep.dst = getelementptr inbounds ptr, ptr %dst, i64 %iv
439+
store i64 %j.next, ptr %gep.dst, align 8
440+
%iv.next = add i64 %iv, 1
441+
%ec = icmp eq i64 %iv, %j.start
442+
br i1 %ec, label %exit, label %loop
443+
444+
exit:
445+
ret void
446+
}
447+
353448
define void @test_sub_zext_not(ptr %dst, ptr %src, i64 %j.start, i64 %p, i64 %i.start) {
354449
; CHECK-LABEL: @test_sub_zext_not(
355450
; CHECK-NEXT: entry:
356451
; CHECK-NEXT: br label [[LOOP:%.*]]
357452
; CHECK: loop:
358453
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
359-
; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[HIGH:%.*]], [[ENTRY]] ], [ [[J_NEXT:%.*]], [[LOOP]] ]
454+
; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[J_START:%.*]], [[ENTRY]] ], [ [[J_NEXT:%.*]], [[LOOP]] ]
360455
; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_START:%.*]], [[ENTRY]] ], [ [[J_NEXT]], [[LOOP]] ]
361456
; CHECK-NEXT: [[GEP_I:%.*]] = getelementptr inbounds ptr, ptr [[SRC:%.*]], i64 [[I]]
362457
; CHECK-NEXT: [[L_I:%.*]] = load ptr, ptr [[GEP_I]], align 8
@@ -369,8 +464,8 @@ define void @test_sub_zext_not(ptr %dst, ptr %src, i64 %j.start, i64 %p, i64 %i.
369464
; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr inbounds ptr, ptr [[DST:%.*]], i64 [[IV]]
370465
; CHECK-NEXT: store i64 [[J_NEXT]], ptr [[GEP_DST]], align 8
371466
; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
372-
; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV]], [[HIGH]]
373-
; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[EXIT:%.*]], label [[LOOP]]
467+
; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], [[J_START]]
468+
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
374469
; CHECK: exit:
375470
; CHECK-NEXT: ret void
376471
;
@@ -398,6 +493,7 @@ loop:
398493
exit:
399494
ret void
400495
}
496+
401497
define void @test_sub_sext(ptr %dst, ptr %src, i64 %j.start, i64 %p, i64 %i.start) {
402498
; CHECK-LABEL: @test_sub_sext(
403499
; CHECK-NEXT: entry:

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