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[fixup] Remove unused tablegen class
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llvm/lib/Target/AArch64/AArch64InstrFormats.td

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@@ -5992,26 +5992,6 @@ multiclass SIMDThreeSameVectorFP<bit U, bit S, bits<3> opc,
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[(set (v2f64 V128:$Rd), (OpNode (v2f64 V128:$Rn), (v2f64 V128:$Rm)))]>;
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}
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let mayRaiseFPException = 1, Uses = [FPCR] in
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multiclass SIMDThreeVectorFP<bit U, bit S, bits<3> opc,
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string asm, SDPatternOperator OpNode> {
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def v4f16 : BaseSIMDThreeSameVector<0, U, {S,0b10}, {0b00,opc}, V64,
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asm, ".4h",
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[(set (v4f16 V64:$Rd), (OpNode (v4f16 V64:$Rn), (v4i16 V64:$Rm)))]>;
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def v8f16 : BaseSIMDThreeSameVector<1, U, {S,0b10}, {0b00,opc}, V128,
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asm, ".8h",
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[(set (v8f16 V128:$Rd), (OpNode (v8f16 V128:$Rn), (v8i16 V128:$Rm)))]>;
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def v2f32 : BaseSIMDThreeSameVector<0, U, {S,0b01}, {0b11,opc}, V64,
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asm, ".2s",
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[(set (v2f32 V64:$Rd), (OpNode (v2f32 V64:$Rn), (v2i32 V64:$Rm)))]>;
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def v4f32 : BaseSIMDThreeSameVector<1, U, {S,0b01}, {0b11,opc}, V128,
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asm, ".4s",
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[(set (v4f32 V128:$Rd), (OpNode (v4f32 V128:$Rn), (v4i32 V128:$Rm)))]>;
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def v2f64 : BaseSIMDThreeSameVector<1, U, {S,0b11}, {0b11,opc}, V128,
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asm, ".2d",
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[(set (v2f64 V128:$Rd), (OpNode (v2f64 V128:$Rn), (v2i64 V128:$Rm)))]>;
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}
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let mayRaiseFPException = 1, Uses = [FPCR] in
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multiclass SIMDThreeSameVectorFPCmp<bit U, bit S, bits<3> opc,
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string asm,

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