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[MIPS] LLVM data layout give i128 an alignment of 16 for mips64
Fix parts of #102783.
1 parent ae5ee97 commit fa5a485

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7 files changed

+86
-17
lines changed

7 files changed

+86
-17
lines changed

‎clang/lib/Basic/Targets/Mips.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -28,9 +28,9 @@ class LLVM_LIBRARY_VISIBILITY MipsTargetInfo : public TargetInfo {
2828
if (ABI == "o32")
2929
Layout = "m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64";
3030
else if (ABI == "n32")
31-
Layout = "m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32:64-S128";
31+
Layout = "m:e-p:32:32-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128";
3232
else if (ABI == "n64")
33-
Layout = "m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128";
33+
Layout = "m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128";
3434
else
3535
llvm_unreachable("Invalid ABI");
3636

‎clang/test/CodeGen/target-data.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -54,7 +54,7 @@
5454
// RUN: FileCheck %s -check-prefix=MIPS-64EL
5555
// RUN: %clang_cc1 -triple mipsisa64r6el-linux-gnuabi64 -o - -emit-llvm %s | \
5656
// RUN: FileCheck %s -check-prefix=MIPS-64EL
57-
// MIPS-64EL: target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128"
57+
// MIPS-64EL: target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
5858

5959
// RUN: %clang_cc1 -triple mips64el-linux-gnu -o - -emit-llvm -target-abi n32 \
6060
// RUN: %s | FileCheck %s -check-prefix=MIPS-64EL-N32
@@ -64,7 +64,7 @@
6464
// RUN: %s | FileCheck %s -check-prefix=MIPS-64EL-N32
6565
// RUN: %clang_cc1 -triple mipsisa64r6el-linux-gnuabin32 -o - -emit-llvm \
6666
// RUN: %s | FileCheck %s -check-prefix=MIPS-64EL-N32
67-
// MIPS-64EL-N32: target datalayout = "e-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32:64-S128"
67+
// MIPS-64EL-N32: target datalayout = "e-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
6868

6969
// RUN: %clang_cc1 -triple mips64-linux-gnu -o - -emit-llvm %s | \
7070
// RUN: FileCheck %s -check-prefix=MIPS-64EB
@@ -74,7 +74,7 @@
7474
// RUN: FileCheck %s -check-prefix=MIPS-64EB
7575
// RUN: %clang_cc1 -triple mipsisa64r6-linux-gnuabi64 -o - -emit-llvm %s | \
7676
// RUN: FileCheck %s -check-prefix=MIPS-64EB
77-
// MIPS-64EB: target datalayout = "E-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128"
77+
// MIPS-64EB: target datalayout = "E-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
7878

7979
// RUN: %clang_cc1 -triple mips64-linux-gnu -o - -emit-llvm %s -target-abi n32 \
8080
// RUN: | FileCheck %s -check-prefix=MIPS-64EB-N32
@@ -84,7 +84,7 @@
8484
// RUN: | FileCheck %s -check-prefix=MIPS-64EB-N32
8585
// RUN: %clang_cc1 -triple mipsisa64r6-linux-gnuabin32 -o - -emit-llvm %s \
8686
// RUN: | FileCheck %s -check-prefix=MIPS-64EB-N32
87-
// MIPS-64EB-N32: target datalayout = "E-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32:64-S128"
87+
// MIPS-64EB-N32: target datalayout = "E-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
8888

8989
// RUN: %clang_cc1 -triple powerpc64-lv2 -o - -emit-llvm %s | \
9090
// RUN: FileCheck %s -check-prefix=PS3

‎llvm/lib/IR/AutoUpgrade.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5566,7 +5566,8 @@ std::string llvm::UpgradeDataLayoutString(StringRef DL, StringRef TT) {
55665566
return Res;
55675567
}
55685568

5569-
if (T.isSPARC()) {
5569+
if (T.isSPARC() || (T.isMIPS64() && !DL.contains("m:m"))) {
5570+
// Mips64 with o32 ABI did not add "-i128:128".
55705571
// Add "-i128:128"
55715572
std::string I64 = "-i64:64";
55725573
std::string I128 = "-i128:128";

‎llvm/lib/Target/Mips/MipsTargetMachine.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -99,7 +99,7 @@ static std::string computeDataLayout(const Triple &TT, StringRef CPU,
9999
// aligned. On N64 64 bit registers are also available and the stack is
100100
// 128 bit aligned.
101101
if (ABI.IsN64() || ABI.IsN32())
102-
Ret += "-n32:64-S128";
102+
Ret += "-i128:128-n32:64-S128";
103103
else
104104
Ret += "-n32-S64";
105105

‎llvm/test/CodeGen/Mips/data-layout.ll

Lines changed: 60 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,60 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2+
; RUN: llc -mtriple=mips64-linux-gnuabi64 -mcpu=mips64 < %s | FileCheck %s -check-prefix=MIPS64
3+
; RUN: llc -mtriple=mips64el-linux-gnuabi64 -mcpu=mips64 < %s | FileCheck %s -check-prefix=MIPS64EL
4+
5+
; MIPS64: .p2align 2, 0x0
6+
; MIPS64-NEXT: Li8:
7+
; MIPS64-NEXT: .byte 10 # 0xa
8+
; MIPS64-NEXT: .size .Li8, 1
9+
10+
; MIPS64EL: .p2align 2, 0x0
11+
; MIPS64EL-NEXT: Li8:
12+
; MIPS64EL-NEXT: .byte 10 # 0xa
13+
; MIPS64EL-NEXT: .size .Li8, 1
14+
@i8 = private constant i8 10
15+
16+
; MIPS64: .p2align 2, 0x0
17+
; MIPS64-NEXT: .Li16:
18+
; MIPS64-NEXT: .2byte 10 # 0xa
19+
; MIPS64-NEXT: .size .Li16, 2
20+
21+
; MIPS64EL: .p2align 2, 0x0
22+
; MIPS64EL-NEXT: .Li16:
23+
; MIPS64EL-NEXT: .2byte 10 # 0xa
24+
; MIPS64EL-NEXT: .size .Li16, 2
25+
@i16 = private constant i16 10
26+
27+
; MIPS64: .p2align 2, 0x0
28+
; MIPS64-NEXT: .Li32:
29+
; MIPS64-NEXT: .4byte 10 # 0xa
30+
; MIPS64-NEXT: .size .Li32, 4
31+
32+
; MIPS64EL: .p2align 2, 0x0
33+
; MIPS64EL-NEXT: .Li32:
34+
; MIPS64EL-NEXT: .4byte 10 # 0xa
35+
; MIPS64EL-NEXT: .size .Li32, 4
36+
@i32 = private constant i32 10
37+
38+
; MIPS64: .p2align 3, 0x0
39+
; MIPS64-NEXT: .Li64:
40+
; MIPS64-NEXT: .8byte 10 # 0xa
41+
; MIPS64-NEXT: .size .Li64, 8
42+
43+
; MIPS64EL: .p2align 3, 0x0
44+
; MIPS64EL-NEXT: .Li64:
45+
; MIPS64EL-NEXT: .8byte 10 # 0xa
46+
; MIPS64EL-NEXT: .size .Li64, 8
47+
@i64 = private constant i64 10
48+
49+
; MIPS64: .p2align 4, 0x0
50+
; MIPS64-NEXT: .Li128:
51+
; MIPS64-NEXT: .8byte 0
52+
; MIPS64-NEXT: .8byte 10
53+
; MIPS64-NEXT: .size .Li128, 16
54+
55+
; MIPS64EL: .p2align 4, 0x0
56+
; MIPS64EL-NEXT: .Li128:
57+
; MIPS64EL-NEXT: .8byte 10
58+
; MIPS64EL-NEXT: .8byte 0
59+
; MIPS64EL-NEXT: .size .Li128, 16
60+
@i128 = private constant i128 10

‎llvm/test/CodeGen/Mips/implicit-sret.ll

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -11,21 +11,21 @@ declare dso_local { i32, i128, i64 } @implicit_sret_decl() unnamed_addr
1111
define internal void @test() unnamed_addr nounwind {
1212
; CHECK-LABEL: test:
1313
; CHECK: # %bb.0: # %start
14-
; CHECK-NEXT: daddiu $sp, $sp, -48
15-
; CHECK-NEXT: sd $ra, 40($sp) # 8-byte Folded Spill
16-
; CHECK-NEXT: daddiu $4, $sp, 8
14+
; CHECK-NEXT: daddiu $sp, $sp, -64
15+
; CHECK-NEXT: sd $ra, 56($sp) # 8-byte Folded Spill
16+
; CHECK-NEXT: daddiu $4, $sp, 0
1717
; CHECK-NEXT: jal implicit_sret_decl
1818
; CHECK-NEXT: nop
1919
; CHECK-NEXT: ld $6, 24($sp)
2020
; CHECK-NEXT: ld $5, 16($sp)
2121
; CHECK-NEXT: ld $7, 32($sp)
22-
; CHECK-NEXT: lw $1, 8($sp)
22+
; CHECK-NEXT: lw $1, 0($sp)
2323
; CHECK-NEXT: # implicit-def: $a0_64
2424
; CHECK-NEXT: move $4, $1
2525
; CHECK-NEXT: jal use_sret
2626
; CHECK-NEXT: nop
27-
; CHECK-NEXT: ld $ra, 40($sp) # 8-byte Folded Reload
28-
; CHECK-NEXT: daddiu $sp, $sp, 48
27+
; CHECK-NEXT: ld $ra, 56($sp) # 8-byte Folded Reload
28+
; CHECK-NEXT: daddiu $sp, $sp, 64
2929
; CHECK-NEXT: jr $ra
3030
; CHECK-NEXT: nop
3131
start:
@@ -42,11 +42,11 @@ define internal { i32, i128, i64 } @implicit_sret_impl() unnamed_addr nounwind {
4242
; CHECK: # %bb.0:
4343
; CHECK-NEXT: # kill: def $at_64 killed $a0_64
4444
; CHECK-NEXT: daddiu $1, $zero, 20
45-
; CHECK-NEXT: sd $1, 16($4)
45+
; CHECK-NEXT: sd $1, 24($4)
4646
; CHECK-NEXT: daddiu $1, $zero, 0
47-
; CHECK-NEXT: sd $zero, 8($4)
47+
; CHECK-NEXT: sd $zero, 16($4)
4848
; CHECK-NEXT: daddiu $1, $zero, 30
49-
; CHECK-NEXT: sd $1, 24($4)
49+
; CHECK-NEXT: sd $1, 32($4)
5050
; CHECK-NEXT: addiu $1, $zero, 10
5151
; CHECK-NEXT: sw $1, 0($4)
5252
; CHECK-NEXT: jr $ra

‎llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -75,6 +75,14 @@ TEST(DataLayoutUpgradeTest, ValidDataLayoutUpgrade) {
7575
EXPECT_EQ(UpgradeDataLayoutString("E-m:e-i64:64-n32:64-S128", "sparcv9"),
7676
"E-m:e-i64:64-i128:128-n32:64-S128");
7777

78+
// Check that MIPS64 targets add -i128:128.
79+
EXPECT_EQ(UpgradeDataLayoutString(
80+
"E-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128", "mips64"),
81+
"E-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128");
82+
EXPECT_EQ(UpgradeDataLayoutString(
83+
"e-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128", "mips64el"),
84+
"e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128");
85+
7886
// Check that SPIR && SPIRV targets add -G1 if it's not present.
7987
EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32", "spir"), "e-p:32:32-G1");
8088
EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32", "spir64"), "e-p:32:32-G1");

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