1
+ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
1
2
; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s
2
3
3
4
define <8 x i8 > @vabas8 (ptr %A , ptr %B , ptr %C ) nounwind {
4
- ;CHECK-LABEL: vabas8:
5
- ;CHECK: vaba.s8
5
+ ; CHECK-LABEL: vabas8:
6
+ ; CHECK: @ %bb.0:
7
+ ; CHECK-NEXT: vldr d16, [r2]
8
+ ; CHECK-NEXT: vldr d17, [r1]
9
+ ; CHECK-NEXT: vldr d18, [r0]
10
+ ; CHECK-NEXT: vaba.s8 d18, d17, d16
11
+ ; CHECK-NEXT: vmov r0, r1, d18
12
+ ; CHECK-NEXT: mov pc, lr
6
13
%tmp1 = load <8 x i8 >, ptr %A
7
14
%tmp2 = load <8 x i8 >, ptr %B
8
15
%tmp3 = load <8 x i8 >, ptr %C
@@ -12,8 +19,14 @@ define <8 x i8> @vabas8(ptr %A, ptr %B, ptr %C) nounwind {
12
19
}
13
20
14
21
define <4 x i16 > @vabas16 (ptr %A , ptr %B , ptr %C ) nounwind {
15
- ;CHECK-LABEL: vabas16:
16
- ;CHECK: vaba.s16
22
+ ; CHECK-LABEL: vabas16:
23
+ ; CHECK: @ %bb.0:
24
+ ; CHECK-NEXT: vldr d16, [r2]
25
+ ; CHECK-NEXT: vldr d17, [r1]
26
+ ; CHECK-NEXT: vldr d18, [r0]
27
+ ; CHECK-NEXT: vaba.s16 d18, d17, d16
28
+ ; CHECK-NEXT: vmov r0, r1, d18
29
+ ; CHECK-NEXT: mov pc, lr
17
30
%tmp1 = load <4 x i16 >, ptr %A
18
31
%tmp2 = load <4 x i16 >, ptr %B
19
32
%tmp3 = load <4 x i16 >, ptr %C
@@ -23,8 +36,14 @@ define <4 x i16> @vabas16(ptr %A, ptr %B, ptr %C) nounwind {
23
36
}
24
37
25
38
define <2 x i32 > @vabas32 (ptr %A , ptr %B , ptr %C ) nounwind {
26
- ;CHECK-LABEL: vabas32:
27
- ;CHECK: vaba.s32
39
+ ; CHECK-LABEL: vabas32:
40
+ ; CHECK: @ %bb.0:
41
+ ; CHECK-NEXT: vldr d16, [r2]
42
+ ; CHECK-NEXT: vldr d17, [r1]
43
+ ; CHECK-NEXT: vldr d18, [r0]
44
+ ; CHECK-NEXT: vaba.s32 d18, d17, d16
45
+ ; CHECK-NEXT: vmov r0, r1, d18
46
+ ; CHECK-NEXT: mov pc, lr
28
47
%tmp1 = load <2 x i32 >, ptr %A
29
48
%tmp2 = load <2 x i32 >, ptr %B
30
49
%tmp3 = load <2 x i32 >, ptr %C
@@ -34,8 +53,14 @@ define <2 x i32> @vabas32(ptr %A, ptr %B, ptr %C) nounwind {
34
53
}
35
54
36
55
define <8 x i8 > @vabau8 (ptr %A , ptr %B , ptr %C ) nounwind {
37
- ;CHECK-LABEL: vabau8:
38
- ;CHECK: vaba.u8
56
+ ; CHECK-LABEL: vabau8:
57
+ ; CHECK: @ %bb.0:
58
+ ; CHECK-NEXT: vldr d16, [r2]
59
+ ; CHECK-NEXT: vldr d17, [r1]
60
+ ; CHECK-NEXT: vldr d18, [r0]
61
+ ; CHECK-NEXT: vaba.u8 d18, d17, d16
62
+ ; CHECK-NEXT: vmov r0, r1, d18
63
+ ; CHECK-NEXT: mov pc, lr
39
64
%tmp1 = load <8 x i8 >, ptr %A
40
65
%tmp2 = load <8 x i8 >, ptr %B
41
66
%tmp3 = load <8 x i8 >, ptr %C
@@ -45,8 +70,14 @@ define <8 x i8> @vabau8(ptr %A, ptr %B, ptr %C) nounwind {
45
70
}
46
71
47
72
define <4 x i16 > @vabau16 (ptr %A , ptr %B , ptr %C ) nounwind {
48
- ;CHECK-LABEL: vabau16:
49
- ;CHECK: vaba.u16
73
+ ; CHECK-LABEL: vabau16:
74
+ ; CHECK: @ %bb.0:
75
+ ; CHECK-NEXT: vldr d16, [r2]
76
+ ; CHECK-NEXT: vldr d17, [r1]
77
+ ; CHECK-NEXT: vldr d18, [r0]
78
+ ; CHECK-NEXT: vaba.u16 d18, d17, d16
79
+ ; CHECK-NEXT: vmov r0, r1, d18
80
+ ; CHECK-NEXT: mov pc, lr
50
81
%tmp1 = load <4 x i16 >, ptr %A
51
82
%tmp2 = load <4 x i16 >, ptr %B
52
83
%tmp3 = load <4 x i16 >, ptr %C
@@ -56,8 +87,14 @@ define <4 x i16> @vabau16(ptr %A, ptr %B, ptr %C) nounwind {
56
87
}
57
88
58
89
define <2 x i32 > @vabau32 (ptr %A , ptr %B , ptr %C ) nounwind {
59
- ;CHECK-LABEL: vabau32:
60
- ;CHECK: vaba.u32
90
+ ; CHECK-LABEL: vabau32:
91
+ ; CHECK: @ %bb.0:
92
+ ; CHECK-NEXT: vldr d16, [r2]
93
+ ; CHECK-NEXT: vldr d17, [r1]
94
+ ; CHECK-NEXT: vldr d18, [r0]
95
+ ; CHECK-NEXT: vaba.u32 d18, d17, d16
96
+ ; CHECK-NEXT: vmov r0, r1, d18
97
+ ; CHECK-NEXT: mov pc, lr
61
98
%tmp1 = load <2 x i32 >, ptr %A
62
99
%tmp2 = load <2 x i32 >, ptr %B
63
100
%tmp3 = load <2 x i32 >, ptr %C
@@ -67,8 +104,15 @@ define <2 x i32> @vabau32(ptr %A, ptr %B, ptr %C) nounwind {
67
104
}
68
105
69
106
define <16 x i8 > @vabaQs8 (ptr %A , ptr %B , ptr %C ) nounwind {
70
- ;CHECK-LABEL: vabaQs8:
71
- ;CHECK: vaba.s8
107
+ ; CHECK-LABEL: vabaQs8:
108
+ ; CHECK: @ %bb.0:
109
+ ; CHECK-NEXT: vld1.64 {d16, d17}, [r2]
110
+ ; CHECK-NEXT: vld1.64 {d18, d19}, [r1]
111
+ ; CHECK-NEXT: vld1.64 {d20, d21}, [r0]
112
+ ; CHECK-NEXT: vaba.s8 q10, q9, q8
113
+ ; CHECK-NEXT: vmov r0, r1, d20
114
+ ; CHECK-NEXT: vmov r2, r3, d21
115
+ ; CHECK-NEXT: mov pc, lr
72
116
%tmp1 = load <16 x i8 >, ptr %A
73
117
%tmp2 = load <16 x i8 >, ptr %B
74
118
%tmp3 = load <16 x i8 >, ptr %C
@@ -78,8 +122,15 @@ define <16 x i8> @vabaQs8(ptr %A, ptr %B, ptr %C) nounwind {
78
122
}
79
123
80
124
define <8 x i16 > @vabaQs16 (ptr %A , ptr %B , ptr %C ) nounwind {
81
- ;CHECK-LABEL: vabaQs16:
82
- ;CHECK: vaba.s16
125
+ ; CHECK-LABEL: vabaQs16:
126
+ ; CHECK: @ %bb.0:
127
+ ; CHECK-NEXT: vld1.64 {d16, d17}, [r2]
128
+ ; CHECK-NEXT: vld1.64 {d18, d19}, [r1]
129
+ ; CHECK-NEXT: vld1.64 {d20, d21}, [r0]
130
+ ; CHECK-NEXT: vaba.s16 q10, q9, q8
131
+ ; CHECK-NEXT: vmov r0, r1, d20
132
+ ; CHECK-NEXT: vmov r2, r3, d21
133
+ ; CHECK-NEXT: mov pc, lr
83
134
%tmp1 = load <8 x i16 >, ptr %A
84
135
%tmp2 = load <8 x i16 >, ptr %B
85
136
%tmp3 = load <8 x i16 >, ptr %C
@@ -89,8 +140,15 @@ define <8 x i16> @vabaQs16(ptr %A, ptr %B, ptr %C) nounwind {
89
140
}
90
141
91
142
define <4 x i32 > @vabaQs32 (ptr %A , ptr %B , ptr %C ) nounwind {
92
- ;CHECK-LABEL: vabaQs32:
93
- ;CHECK: vaba.s32
143
+ ; CHECK-LABEL: vabaQs32:
144
+ ; CHECK: @ %bb.0:
145
+ ; CHECK-NEXT: vld1.64 {d16, d17}, [r2]
146
+ ; CHECK-NEXT: vld1.64 {d18, d19}, [r1]
147
+ ; CHECK-NEXT: vld1.64 {d20, d21}, [r0]
148
+ ; CHECK-NEXT: vaba.s32 q10, q9, q8
149
+ ; CHECK-NEXT: vmov r0, r1, d20
150
+ ; CHECK-NEXT: vmov r2, r3, d21
151
+ ; CHECK-NEXT: mov pc, lr
94
152
%tmp1 = load <4 x i32 >, ptr %A
95
153
%tmp2 = load <4 x i32 >, ptr %B
96
154
%tmp3 = load <4 x i32 >, ptr %C
@@ -100,8 +158,15 @@ define <4 x i32> @vabaQs32(ptr %A, ptr %B, ptr %C) nounwind {
100
158
}
101
159
102
160
define <16 x i8 > @vabaQu8 (ptr %A , ptr %B , ptr %C ) nounwind {
103
- ;CHECK-LABEL: vabaQu8:
104
- ;CHECK: vaba.u8
161
+ ; CHECK-LABEL: vabaQu8:
162
+ ; CHECK: @ %bb.0:
163
+ ; CHECK-NEXT: vld1.64 {d16, d17}, [r2]
164
+ ; CHECK-NEXT: vld1.64 {d18, d19}, [r1]
165
+ ; CHECK-NEXT: vld1.64 {d20, d21}, [r0]
166
+ ; CHECK-NEXT: vaba.u8 q10, q9, q8
167
+ ; CHECK-NEXT: vmov r0, r1, d20
168
+ ; CHECK-NEXT: vmov r2, r3, d21
169
+ ; CHECK-NEXT: mov pc, lr
105
170
%tmp1 = load <16 x i8 >, ptr %A
106
171
%tmp2 = load <16 x i8 >, ptr %B
107
172
%tmp3 = load <16 x i8 >, ptr %C
@@ -111,8 +176,15 @@ define <16 x i8> @vabaQu8(ptr %A, ptr %B, ptr %C) nounwind {
111
176
}
112
177
113
178
define <8 x i16 > @vabaQu16 (ptr %A , ptr %B , ptr %C ) nounwind {
114
- ;CHECK-LABEL: vabaQu16:
115
- ;CHECK: vaba.u16
179
+ ; CHECK-LABEL: vabaQu16:
180
+ ; CHECK: @ %bb.0:
181
+ ; CHECK-NEXT: vld1.64 {d16, d17}, [r2]
182
+ ; CHECK-NEXT: vld1.64 {d18, d19}, [r1]
183
+ ; CHECK-NEXT: vld1.64 {d20, d21}, [r0]
184
+ ; CHECK-NEXT: vaba.u16 q10, q9, q8
185
+ ; CHECK-NEXT: vmov r0, r1, d20
186
+ ; CHECK-NEXT: vmov r2, r3, d21
187
+ ; CHECK-NEXT: mov pc, lr
116
188
%tmp1 = load <8 x i16 >, ptr %A
117
189
%tmp2 = load <8 x i16 >, ptr %B
118
190
%tmp3 = load <8 x i16 >, ptr %C
@@ -122,8 +194,15 @@ define <8 x i16> @vabaQu16(ptr %A, ptr %B, ptr %C) nounwind {
122
194
}
123
195
124
196
define <4 x i32 > @vabaQu32 (ptr %A , ptr %B , ptr %C ) nounwind {
125
- ;CHECK-LABEL: vabaQu32:
126
- ;CHECK: vaba.u32
197
+ ; CHECK-LABEL: vabaQu32:
198
+ ; CHECK: @ %bb.0:
199
+ ; CHECK-NEXT: vld1.64 {d16, d17}, [r2]
200
+ ; CHECK-NEXT: vld1.64 {d18, d19}, [r1]
201
+ ; CHECK-NEXT: vld1.64 {d20, d21}, [r0]
202
+ ; CHECK-NEXT: vaba.u32 q10, q9, q8
203
+ ; CHECK-NEXT: vmov r0, r1, d20
204
+ ; CHECK-NEXT: vmov r2, r3, d21
205
+ ; CHECK-NEXT: mov pc, lr
127
206
%tmp1 = load <4 x i32 >, ptr %A
128
207
%tmp2 = load <4 x i32 >, ptr %B
129
208
%tmp3 = load <4 x i32 >, ptr %C
@@ -149,8 +228,15 @@ declare <8 x i16> @llvm.arm.neon.vabdu.v8i16(<8 x i16>, <8 x i16>) nounwind read
149
228
declare <4 x i32 > @llvm.arm.neon.vabdu.v4i32 (<4 x i32 >, <4 x i32 >) nounwind readnone
150
229
151
230
define <8 x i16 > @vabals8 (ptr %A , ptr %B , ptr %C ) nounwind {
152
- ;CHECK-LABEL: vabals8:
153
- ;CHECK: vabal.s8
231
+ ; CHECK-LABEL: vabals8:
232
+ ; CHECK: @ %bb.0:
233
+ ; CHECK-NEXT: vldr d16, [r2]
234
+ ; CHECK-NEXT: vldr d17, [r1]
235
+ ; CHECK-NEXT: vld1.64 {d18, d19}, [r0]
236
+ ; CHECK-NEXT: vabal.s8 q9, d17, d16
237
+ ; CHECK-NEXT: vmov r0, r1, d18
238
+ ; CHECK-NEXT: vmov r2, r3, d19
239
+ ; CHECK-NEXT: mov pc, lr
154
240
%tmp1 = load <8 x i16 >, ptr %A
155
241
%tmp2 = load <8 x i8 >, ptr %B
156
242
%tmp3 = load <8 x i8 >, ptr %C
@@ -161,8 +247,15 @@ define <8 x i16> @vabals8(ptr %A, ptr %B, ptr %C) nounwind {
161
247
}
162
248
163
249
define <4 x i32 > @vabals16 (ptr %A , ptr %B , ptr %C ) nounwind {
164
- ;CHECK-LABEL: vabals16:
165
- ;CHECK: vabal.s16
250
+ ; CHECK-LABEL: vabals16:
251
+ ; CHECK: @ %bb.0:
252
+ ; CHECK-NEXT: vldr d16, [r2]
253
+ ; CHECK-NEXT: vldr d17, [r1]
254
+ ; CHECK-NEXT: vld1.64 {d18, d19}, [r0]
255
+ ; CHECK-NEXT: vabal.s16 q9, d17, d16
256
+ ; CHECK-NEXT: vmov r0, r1, d18
257
+ ; CHECK-NEXT: vmov r2, r3, d19
258
+ ; CHECK-NEXT: mov pc, lr
166
259
%tmp1 = load <4 x i32 >, ptr %A
167
260
%tmp2 = load <4 x i16 >, ptr %B
168
261
%tmp3 = load <4 x i16 >, ptr %C
@@ -173,8 +266,15 @@ define <4 x i32> @vabals16(ptr %A, ptr %B, ptr %C) nounwind {
173
266
}
174
267
175
268
define <2 x i64 > @vabals32 (ptr %A , ptr %B , ptr %C ) nounwind {
176
- ;CHECK-LABEL: vabals32:
177
- ;CHECK: vabal.s32
269
+ ; CHECK-LABEL: vabals32:
270
+ ; CHECK: @ %bb.0:
271
+ ; CHECK-NEXT: vldr d16, [r2]
272
+ ; CHECK-NEXT: vldr d17, [r1]
273
+ ; CHECK-NEXT: vld1.64 {d18, d19}, [r0]
274
+ ; CHECK-NEXT: vabal.s32 q9, d17, d16
275
+ ; CHECK-NEXT: vmov r0, r1, d18
276
+ ; CHECK-NEXT: vmov r2, r3, d19
277
+ ; CHECK-NEXT: mov pc, lr
178
278
%tmp1 = load <2 x i64 >, ptr %A
179
279
%tmp2 = load <2 x i32 >, ptr %B
180
280
%tmp3 = load <2 x i32 >, ptr %C
@@ -185,8 +285,15 @@ define <2 x i64> @vabals32(ptr %A, ptr %B, ptr %C) nounwind {
185
285
}
186
286
187
287
define <8 x i16 > @vabalu8 (ptr %A , ptr %B , ptr %C ) nounwind {
188
- ;CHECK-LABEL: vabalu8:
189
- ;CHECK: vabal.u8
288
+ ; CHECK-LABEL: vabalu8:
289
+ ; CHECK: @ %bb.0:
290
+ ; CHECK-NEXT: vldr d16, [r2]
291
+ ; CHECK-NEXT: vldr d17, [r1]
292
+ ; CHECK-NEXT: vld1.64 {d18, d19}, [r0]
293
+ ; CHECK-NEXT: vabal.u8 q9, d17, d16
294
+ ; CHECK-NEXT: vmov r0, r1, d18
295
+ ; CHECK-NEXT: vmov r2, r3, d19
296
+ ; CHECK-NEXT: mov pc, lr
190
297
%tmp1 = load <8 x i16 >, ptr %A
191
298
%tmp2 = load <8 x i8 >, ptr %B
192
299
%tmp3 = load <8 x i8 >, ptr %C
@@ -197,8 +304,15 @@ define <8 x i16> @vabalu8(ptr %A, ptr %B, ptr %C) nounwind {
197
304
}
198
305
199
306
define <4 x i32 > @vabalu16 (ptr %A , ptr %B , ptr %C ) nounwind {
200
- ;CHECK-LABEL: vabalu16:
201
- ;CHECK: vabal.u16
307
+ ; CHECK-LABEL: vabalu16:
308
+ ; CHECK: @ %bb.0:
309
+ ; CHECK-NEXT: vldr d16, [r2]
310
+ ; CHECK-NEXT: vldr d17, [r1]
311
+ ; CHECK-NEXT: vld1.64 {d18, d19}, [r0]
312
+ ; CHECK-NEXT: vabal.u16 q9, d17, d16
313
+ ; CHECK-NEXT: vmov r0, r1, d18
314
+ ; CHECK-NEXT: vmov r2, r3, d19
315
+ ; CHECK-NEXT: mov pc, lr
202
316
%tmp1 = load <4 x i32 >, ptr %A
203
317
%tmp2 = load <4 x i16 >, ptr %B
204
318
%tmp3 = load <4 x i16 >, ptr %C
@@ -209,8 +323,15 @@ define <4 x i32> @vabalu16(ptr %A, ptr %B, ptr %C) nounwind {
209
323
}
210
324
211
325
define <2 x i64 > @vabalu32 (ptr %A , ptr %B , ptr %C ) nounwind {
212
- ;CHECK-LABEL: vabalu32:
213
- ;CHECK: vabal.u32
326
+ ; CHECK-LABEL: vabalu32:
327
+ ; CHECK: @ %bb.0:
328
+ ; CHECK-NEXT: vldr d16, [r2]
329
+ ; CHECK-NEXT: vldr d17, [r1]
330
+ ; CHECK-NEXT: vld1.64 {d18, d19}, [r0]
331
+ ; CHECK-NEXT: vabal.u32 q9, d17, d16
332
+ ; CHECK-NEXT: vmov r0, r1, d18
333
+ ; CHECK-NEXT: vmov r2, r3, d19
334
+ ; CHECK-NEXT: mov pc, lr
214
335
%tmp1 = load <2 x i64 >, ptr %A
215
336
%tmp2 = load <2 x i32 >, ptr %B
216
337
%tmp3 = load <2 x i32 >, ptr %C
0 commit comments