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[CostModel][X86] Add i64 MUL latency/codesize/size-latency cost estimates
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6 files changed

+47
-47
lines changed

6 files changed

+47
-47
lines changed

llvm/lib/Target/X86/X86TargetTransformInfo.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1377,7 +1377,7 @@ InstructionCost X86TTIImpl::getArithmeticInstrCost(
13771377
static const CostKindTblEntry X64CostTbl[] = { // 64-bit targets
13781378
{ ISD::ADD, MVT::i64, { 1 } }, // Core (Merom) from http://www.agner.org/
13791379
{ ISD::SUB, MVT::i64, { 1 } }, // Core (Merom) from http://www.agner.org/
1380-
{ ISD::MUL, MVT::i64, { 2 } }, // Nehalem from http://www.agner.org/
1380+
{ ISD::MUL, MVT::i64, { 2, 6, 1, 2 } },
13811381
};
13821382

13831383
if (ST->is64Bit())

llvm/test/Analysis/CostModel/X86/arith-int-latency.ll

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -619,7 +619,7 @@ define i32 @and(i32 %arg) {
619619

620620
define i32 @mul(i32 %arg) {
621621
; SSE2-LABEL: 'mul'
622-
; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = mul i64 undef, undef
622+
; SSE2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %I64 = mul i64 undef, undef
623623
; SSE2-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V2I64 = mul <2 x i64> undef, undef
624624
; SSE2-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %V4I64 = mul <4 x i64> undef, undef
625625
; SSE2-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %V8I64 = mul <8 x i64> undef, undef
@@ -641,7 +641,7 @@ define i32 @mul(i32 %arg) {
641641
; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
642642
;
643643
; SSE42-LABEL: 'mul'
644-
; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = mul i64 undef, undef
644+
; SSE42-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %I64 = mul i64 undef, undef
645645
; SSE42-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V2I64 = mul <2 x i64> undef, undef
646646
; SSE42-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %V4I64 = mul <4 x i64> undef, undef
647647
; SSE42-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %V8I64 = mul <8 x i64> undef, undef
@@ -663,7 +663,7 @@ define i32 @mul(i32 %arg) {
663663
; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
664664
;
665665
; AVX1-LABEL: 'mul'
666-
; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = mul i64 undef, undef
666+
; AVX1-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %I64 = mul i64 undef, undef
667667
; AVX1-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V2I64 = mul <2 x i64> undef, undef
668668
; AVX1-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %V4I64 = mul <4 x i64> undef, undef
669669
; AVX1-NEXT: Cost Model: Found an estimated cost of 30 for instruction: %V8I64 = mul <8 x i64> undef, undef
@@ -685,7 +685,7 @@ define i32 @mul(i32 %arg) {
685685
; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
686686
;
687687
; AVX2-LABEL: 'mul'
688-
; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = mul i64 undef, undef
688+
; AVX2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %I64 = mul i64 undef, undef
689689
; AVX2-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V2I64 = mul <2 x i64> undef, undef
690690
; AVX2-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V4I64 = mul <4 x i64> undef, undef
691691
; AVX2-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %V8I64 = mul <8 x i64> undef, undef
@@ -707,7 +707,7 @@ define i32 @mul(i32 %arg) {
707707
; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
708708
;
709709
; AVX512F-LABEL: 'mul'
710-
; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = mul i64 undef, undef
710+
; AVX512F-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %I64 = mul i64 undef, undef
711711
; AVX512F-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V2I64 = mul <2 x i64> undef, undef
712712
; AVX512F-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V4I64 = mul <4 x i64> undef, undef
713713
; AVX512F-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V8I64 = mul <8 x i64> undef, undef
@@ -729,7 +729,7 @@ define i32 @mul(i32 %arg) {
729729
; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
730730
;
731731
; AVX512BW-LABEL: 'mul'
732-
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = mul i64 undef, undef
732+
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %I64 = mul i64 undef, undef
733733
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V2I64 = mul <2 x i64> undef, undef
734734
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V4I64 = mul <4 x i64> undef, undef
735735
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V8I64 = mul <8 x i64> undef, undef
@@ -751,7 +751,7 @@ define i32 @mul(i32 %arg) {
751751
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
752752
;
753753
; AVX512DQ-LABEL: 'mul'
754-
; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = mul i64 undef, undef
754+
; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %I64 = mul i64 undef, undef
755755
; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %V2I64 = mul <2 x i64> undef, undef
756756
; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %V4I64 = mul <4 x i64> undef, undef
757757
; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %V8I64 = mul <8 x i64> undef, undef
@@ -773,7 +773,7 @@ define i32 @mul(i32 %arg) {
773773
; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
774774
;
775775
; SLM-LABEL: 'mul'
776-
; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = mul i64 undef, undef
776+
; SLM-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %I64 = mul i64 undef, undef
777777
; SLM-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %V2I64 = mul <2 x i64> undef, undef
778778
; SLM-NEXT: Cost Model: Found an estimated cost of 44 for instruction: %V4I64 = mul <4 x i64> undef, undef
779779
; SLM-NEXT: Cost Model: Found an estimated cost of 88 for instruction: %V8I64 = mul <8 x i64> undef, undef

llvm/test/Analysis/CostModel/X86/arith-int-sizelatency.ll

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -619,7 +619,7 @@ define i32 @and(i32 %arg) {
619619

620620
define i32 @mul(i32 %arg) {
621621
; SSE2-LABEL: 'mul'
622-
; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = mul i64 undef, undef
622+
; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %I64 = mul i64 undef, undef
623623
; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V2I64 = mul <2 x i64> undef, undef
624624
; SSE2-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V4I64 = mul <4 x i64> undef, undef
625625
; SSE2-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V8I64 = mul <8 x i64> undef, undef
@@ -641,7 +641,7 @@ define i32 @mul(i32 %arg) {
641641
; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
642642
;
643643
; SSE42-LABEL: 'mul'
644-
; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = mul i64 undef, undef
644+
; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %I64 = mul i64 undef, undef
645645
; SSE42-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V2I64 = mul <2 x i64> undef, undef
646646
; SSE42-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %V4I64 = mul <4 x i64> undef, undef
647647
; SSE42-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %V8I64 = mul <8 x i64> undef, undef
@@ -663,7 +663,7 @@ define i32 @mul(i32 %arg) {
663663
; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
664664
;
665665
; AVX1-LABEL: 'mul'
666-
; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = mul i64 undef, undef
666+
; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %I64 = mul i64 undef, undef
667667
; AVX1-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V2I64 = mul <2 x i64> undef, undef
668668
; AVX1-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %V4I64 = mul <4 x i64> undef, undef
669669
; AVX1-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %V8I64 = mul <8 x i64> undef, undef
@@ -685,7 +685,7 @@ define i32 @mul(i32 %arg) {
685685
; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
686686
;
687687
; AVX2-LABEL: 'mul'
688-
; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = mul i64 undef, undef
688+
; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %I64 = mul i64 undef, undef
689689
; AVX2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V2I64 = mul <2 x i64> undef, undef
690690
; AVX2-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %V4I64 = mul <4 x i64> undef, undef
691691
; AVX2-NEXT: Cost Model: Found an estimated cost of 26 for instruction: %V8I64 = mul <8 x i64> undef, undef
@@ -707,7 +707,7 @@ define i32 @mul(i32 %arg) {
707707
; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
708708
;
709709
; AVX512F-LABEL: 'mul'
710-
; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = mul i64 undef, undef
710+
; AVX512F-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %I64 = mul i64 undef, undef
711711
; AVX512F-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V2I64 = mul <2 x i64> undef, undef
712712
; AVX512F-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %V4I64 = mul <4 x i64> undef, undef
713713
; AVX512F-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8I64 = mul <8 x i64> undef, undef
@@ -729,7 +729,7 @@ define i32 @mul(i32 %arg) {
729729
; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
730730
;
731731
; AVX512BW-LABEL: 'mul'
732-
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = mul i64 undef, undef
732+
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %I64 = mul i64 undef, undef
733733
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V2I64 = mul <2 x i64> undef, undef
734734
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %V4I64 = mul <4 x i64> undef, undef
735735
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8I64 = mul <8 x i64> undef, undef
@@ -751,7 +751,7 @@ define i32 @mul(i32 %arg) {
751751
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
752752
;
753753
; AVX512DQ-LABEL: 'mul'
754-
; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = mul i64 undef, undef
754+
; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %I64 = mul i64 undef, undef
755755
; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2I64 = mul <2 x i64> undef, undef
756756
; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V4I64 = mul <4 x i64> undef, undef
757757
; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V8I64 = mul <8 x i64> undef, undef
@@ -773,7 +773,7 @@ define i32 @mul(i32 %arg) {
773773
; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
774774
;
775775
; SLM-LABEL: 'mul'
776-
; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = mul i64 undef, undef
776+
; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %I64 = mul i64 undef, undef
777777
; SLM-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V2I64 = mul <2 x i64> undef, undef
778778
; SLM-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V4I64 = mul <4 x i64> undef, undef
779779
; SLM-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %V8I64 = mul <8 x i64> undef, undef

llvm/test/Analysis/CostModel/X86/intrinsic-cost-kinds.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -55,7 +55,7 @@ define void @umul(i32 %a, i32 %b, <16 x i32> %va, <16 x i32> %vb) {
5555
; THRU-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
5656
;
5757
; LATE-LABEL: 'umul'
58-
; LATE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %s = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %a, i32 %b)
58+
; LATE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %s = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %a, i32 %b)
5959
; LATE-NEXT: Cost Model: Found an estimated cost of 100 for instruction: %v = call { <16 x i32>, <16 x i1> } @llvm.umul.with.overflow.v16i32(<16 x i32> %va, <16 x i32> %vb)
6060
; LATE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
6161
;
@@ -65,7 +65,7 @@ define void @umul(i32 %a, i32 %b, <16 x i32> %va, <16 x i32> %vb) {
6565
; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
6666
;
6767
; SIZE_LATE-LABEL: 'umul'
68-
; SIZE_LATE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %s = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %a, i32 %b)
68+
; SIZE_LATE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %s = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %a, i32 %b)
6969
; SIZE_LATE-NEXT: Cost Model: Found an estimated cost of 84 for instruction: %v = call { <16 x i32>, <16 x i1> } @llvm.umul.with.overflow.v16i32(<16 x i32> %va, <16 x i32> %vb)
7070
; SIZE_LATE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
7171
;

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