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[RISCV] Use replace XLenVT with i64 in some isel patterns that are only used for RV64. NFC
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llvm/lib/Target/RISCV/RISCVInstrInfoZb.td

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -888,22 +888,22 @@ foreach i = {1,2,3} in {
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}
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let Predicates = [HasStdExtZbs, IsRV64] in {
891-
def : Pat<(i32 (and (not (shiftop<shl> 1, (XLenVT GPR:$rs2))), GPR:$rs1)),
891+
def : Pat<(i32 (and (not (shiftop<shl> 1, (i64 GPR:$rs2))), GPR:$rs1)),
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(BCLR GPR:$rs1, GPR:$rs2)>;
893-
def : Pat<(i32 (and (rotl -2, (XLenVT GPR:$rs2)), GPR:$rs1)),
893+
def : Pat<(i32 (and (rotl -2, (i64 GPR:$rs2)), GPR:$rs1)),
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(BCLR GPR:$rs1, GPR:$rs2)>;
895-
def : Pat<(i32 (or (shiftop<shl> 1, (XLenVT GPR:$rs2)), GPR:$rs1)),
895+
def : Pat<(i32 (or (shiftop<shl> 1, (i64 GPR:$rs2)), GPR:$rs1)),
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(BSET GPR:$rs1, GPR:$rs2)>;
897-
def : Pat<(i32 (xor (shiftop<shl> 1, (XLenVT GPR:$rs2)), GPR:$rs1)),
897+
def : Pat<(i32 (xor (shiftop<shl> 1, (i64 GPR:$rs2)), GPR:$rs1)),
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(BINV GPR:$rs1, GPR:$rs2)>;
899-
def : Pat<(i32 (and (shiftop<srl> GPR:$rs1, (XLenVT GPR:$rs2)), 1)),
899+
def : Pat<(i32 (and (shiftop<srl> GPR:$rs1, (i64 GPR:$rs2)), 1)),
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(BEXT GPR:$rs1, GPR:$rs2)>;
901-
def : Pat<(i64 (and (anyext (i32 (shiftop<srl> GPR:$rs1, (XLenVT GPR:$rs2)))), 1)),
901+
def : Pat<(i64 (and (anyext (i32 (shiftop<srl> GPR:$rs1, (i64 GPR:$rs2)))), 1)),
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(BEXT GPR:$rs1, GPR:$rs2)>;
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904-
def : Pat<(i32 (shiftop<shl> 1, (XLenVT GPR:$rs2))),
904+
def : Pat<(i32 (shiftop<shl> 1, (i64 GPR:$rs2))),
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(BSET (XLenVT X0), GPR:$rs2)>;
906-
def : Pat<(i32 (not (shiftop<shl> -1, (XLenVT GPR:$rs2)))),
906+
def : Pat<(i32 (not (shiftop<shl> -1, (i64 GPR:$rs2)))),
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(ADDI (BSET (XLenVT X0), GPR:$rs2), -1)>;
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909909
def : Pat<(i32 (and (srl GPR:$rs1, uimm5:$shamt), (i32 1))),

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