@@ -50,7 +50,7 @@ class RISCVFoldMasks : public MachineFunctionPass {
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private:
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bool convertVMergeToVMv (MachineInstr &MI, MachineInstr *MaskDef);
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- bool isAllOnesMask (MachineInstr *MaskCopy );
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+ bool isAllOnesMask (MachineInstr *MaskDef );
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};
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} // namespace
@@ -59,22 +59,21 @@ char RISCVFoldMasks::ID = 0;
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INITIALIZE_PASS (RISCVFoldMasks, DEBUG_TYPE, " RISC-V Fold Masks" , false , false )
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- bool RISCVFoldMasks::isAllOnesMask(MachineInstr *MaskCopy ) {
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- if (!MaskCopy )
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+ bool RISCVFoldMasks::isAllOnesMask(MachineInstr *MaskDef ) {
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+ if (!MaskDef )
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return false ;
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- assert (MaskCopy->isCopy () && MaskCopy->getOperand (0 ).getReg () == RISCV::V0);
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- Register SrcReg =
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- TRI->lookThruCopyLike (MaskCopy->getOperand (1 ).getReg (), MRI);
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+ assert (MaskDef->isCopy () && MaskDef->getOperand (0 ).getReg () == RISCV::V0);
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+ Register SrcReg = TRI->lookThruCopyLike (MaskDef->getOperand (1 ).getReg (), MRI);
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if (!SrcReg.isVirtual ())
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return false ;
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- MachineInstr *SrcDef = MRI->getVRegDef (SrcReg);
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- if (!SrcDef )
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+ MaskDef = MRI->getVRegDef (SrcReg);
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+ if (!MaskDef )
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return false ;
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// TODO: Check that the VMSET is the expected bitwidth? The pseudo has
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// undefined behaviour if it's the wrong bitwidth, so we could choose to
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// assume that it's all-ones? Same applies to its VL.
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- switch (SrcDef ->getOpcode ()) {
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+ switch (MaskDef ->getOpcode ()) {
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case RISCV::PseudoVMSET_M_B1:
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case RISCV::PseudoVMSET_M_B2:
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case RISCV::PseudoVMSET_M_B4:
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