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[RISCV] Split usage of VPseudoUnaryNoMask with GPR destination
These instructions don't have a passthrough operand or any of the policy behaviors, while are the other ones do. Split them out into their own class to make this separation clear, and rename the mask variant to match. (We'd already done the same for the mask variant.) Differential Revision: https://reviews.llvm.org/D153596
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llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td

Lines changed: 16 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1027,7 +1027,6 @@ class VPseudoNullaryPseudoM<string BaseInst>
10271027
let BaseInstr = !cast<Instruction>(BaseInst);
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}
10291029

1030-
// RetClass could be GPR or VReg.
10311030
class VPseudoUnaryNoMask<DAGOperand RetClass, DAGOperand OpClass,
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string Constraint = ""> :
10331032
Pseudo<(outs RetClass:$rd),
@@ -1041,7 +1040,6 @@ class VPseudoUnaryNoMask<DAGOperand RetClass, DAGOperand OpClass,
10411040
let HasSEWOp = 1;
10421041
}
10431042

1044-
// RetClass could be GPR or VReg.
10451043
class VPseudoUnaryNoMaskTU<DAGOperand RetClass, DAGOperand OpClass,
10461044
string Constraint = ""> :
10471045
Pseudo<(outs RetClass:$rd),
@@ -1114,8 +1112,18 @@ class VPseudoUnaryMaskTA_FRM<VReg RetClass, VReg OpClass, string Constraint = ""
11141112
let usesCustomInserter = 1;
11151113
}
11161114

1117-
// mask unary operation without maskedoff
1118-
class VPseudoMaskUnarySOutMask:
1115+
class VPseudoUnaryNoMaskGPROut :
1116+
Pseudo<(outs GPR:$rd),
1117+
(ins VR:$rs2, AVL:$vl, ixlenimm:$sew), []>,
1118+
RISCVVPseudo {
1119+
let mayLoad = 0;
1120+
let mayStore = 0;
1121+
let hasSideEffects = 0;
1122+
let HasVLOp = 1;
1123+
let HasSEWOp = 1;
1124+
}
1125+
1126+
class VPseudoUnaryMaskGPROut:
11191127
Pseudo<(outs GPR:$rd),
11201128
(ins VR:$rs1, VMaskOp:$vm, AVL:$vl, ixlenimm:$sew), []>,
11211129
RISCVVPseudo {
@@ -1884,9 +1892,9 @@ multiclass VPseudoVPOP_M {
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defvar WriteVMPopV_MX = !cast<SchedWrite>("WriteVMPopV_" # mx);
18851893
defvar ReadVMPopV_MX = !cast<SchedRead>("ReadVMPopV_" # mx);
18861894
let VLMul = mti.LMul.value in {
1887-
def "_M_" # mti.BX : VPseudoUnaryNoMask<GPR, VR>,
1895+
def "_M_" # mti.BX : VPseudoUnaryNoMaskGPROut,
18881896
Sched<[WriteVMPopV_MX, ReadVMPopV_MX, ReadVMPopV_MX]>;
1889-
def "_M_" # mti.BX # "_MASK" : VPseudoMaskUnarySOutMask,
1897+
def "_M_" # mti.BX # "_MASK" : VPseudoUnaryMaskGPROut,
18901898
Sched<[WriteVMPopV_MX, ReadVMPopV_MX, ReadVMPopV_MX]>;
18911899
}
18921900
}
@@ -1899,9 +1907,9 @@ multiclass VPseudoV1ST_M {
18991907
defvar WriteVMFFSV_MX = !cast<SchedWrite>("WriteVMFFSV_" # mx);
19001908
defvar ReadVMFFSV_MX = !cast<SchedRead>("ReadVMFFSV_" # mx);
19011909
let VLMul = mti.LMul.value in {
1902-
def "_M_" # mti.BX : VPseudoUnaryNoMask<GPR, VR>,
1910+
def "_M_" # mti.BX : VPseudoUnaryNoMaskGPROut,
19031911
Sched<[WriteVMFFSV_MX, ReadVMFFSV_MX, ReadVMFFSV_MX]>;
1904-
def "_M_" # mti.BX # "_MASK" : VPseudoMaskUnarySOutMask,
1912+
def "_M_" # mti.BX # "_MASK" : VPseudoUnaryMaskGPROut,
19051913
Sched<[WriteVMFFSV_MX, ReadVMFFSV_MX, ReadVMFFSV_MX]>;
19061914
}
19071915
}

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