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[InstCombine] Fix symbol conflicts in tests (NFC)
These tests break when regenerated due to symbol conflicts.
1 parent d9715c6 commit aa1e912

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3 files changed

+87
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3 files changed

+87
-87
lines changed

‎llvm/test/Transforms/InstCombine/loadstore-alignment.ll

Lines changed: 20 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -9,59 +9,59 @@ target datalayout = "E-p:64:64:64-p1:64:64:64-p2:32:32:32-a0:0:8-f32:32:32-f64:6
99

1010
define <2 x i64> @static_hem() {
1111
; CHECK-LABEL: @static_hem(
12-
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr getelementptr (<2 x i64>, ptr @x, i64 7), align 1
13-
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
12+
; CHECK-NEXT: [[L:%.*]] = load <2 x i64>, ptr getelementptr (<2 x i64>, ptr @x, i64 7), align 1
13+
; CHECK-NEXT: ret <2 x i64> [[L]]
1414
;
1515
%t = getelementptr <2 x i64>, ptr @x, i32 7
16-
%tmp1 = load <2 x i64>, ptr %t, align 1
17-
ret <2 x i64> %tmp1
16+
%l = load <2 x i64>, ptr %t, align 1
17+
ret <2 x i64> %l
1818
}
1919

2020
define <2 x i64> @hem(i32 %i) {
2121
; CHECK-LABEL: @hem(
2222
; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[I:%.*]] to i64
2323
; CHECK-NEXT: [[T:%.*]] = getelementptr <2 x i64>, ptr @x, i64 [[TMP1]]
24-
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr [[T]], align 1
25-
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
24+
; CHECK-NEXT: [[L:%.*]] = load <2 x i64>, ptr [[T]], align 1
25+
; CHECK-NEXT: ret <2 x i64> [[L]]
2626
;
2727
%t = getelementptr <2 x i64>, ptr @x, i32 %i
28-
%tmp1 = load <2 x i64>, ptr %t, align 1
29-
ret <2 x i64> %tmp1
28+
%l = load <2 x i64>, ptr %t, align 1
29+
ret <2 x i64> %l
3030
}
3131

3232
define <2 x i64> @hem_2d(i32 %i, i32 %j) {
3333
; CHECK-LABEL: @hem_2d(
3434
; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[I:%.*]] to i64
3535
; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[J:%.*]] to i64
3636
; CHECK-NEXT: [[T:%.*]] = getelementptr [13 x <2 x i64>], ptr @xx, i64 [[TMP1]], i64 [[TMP2]]
37-
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr [[T]], align 1
38-
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
37+
; CHECK-NEXT: [[L:%.*]] = load <2 x i64>, ptr [[T]], align 1
38+
; CHECK-NEXT: ret <2 x i64> [[L]]
3939
;
4040
%t = getelementptr [13 x <2 x i64>], ptr @xx, i32 %i, i32 %j
41-
%tmp1 = load <2 x i64>, ptr %t, align 1
42-
ret <2 x i64> %tmp1
41+
%l = load <2 x i64>, ptr %t, align 1
42+
ret <2 x i64> %l
4343
}
4444

4545
define <2 x i64> @foo() {
4646
; CHECK-LABEL: @foo(
47-
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr @x, align 1
48-
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
47+
; CHECK-NEXT: [[L:%.*]] = load <2 x i64>, ptr @x, align 1
48+
; CHECK-NEXT: ret <2 x i64> [[L]]
4949
;
50-
%tmp1 = load <2 x i64>, ptr @x, align 1
51-
ret <2 x i64> %tmp1
50+
%l = load <2 x i64>, ptr @x, align 1
51+
ret <2 x i64> %l
5252
}
5353

5454
define <2 x i64> @bar() {
5555
; CHECK-LABEL: @bar(
5656
; CHECK-NEXT: [[T:%.*]] = alloca <2 x i64>, align 16
5757
; CHECK-NEXT: call void @kip(ptr nonnull [[T]])
58-
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr [[T]], align 1
59-
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
58+
; CHECK-NEXT: [[L:%.*]] = load <2 x i64>, ptr [[T]], align 1
59+
; CHECK-NEXT: ret <2 x i64> [[L]]
6060
;
6161
%t = alloca <2 x i64>
6262
call void @kip(ptr %t)
63-
%tmp1 = load <2 x i64>, ptr %t, align 1
64-
ret <2 x i64> %tmp1
63+
%l = load <2 x i64>, ptr %t, align 1
64+
ret <2 x i64> %l
6565
}
6666

6767
define void @static_hem_store(<2 x i64> %y) {

‎llvm/test/Transforms/InstCombine/memcpy-from-global.ll

Lines changed: 49 additions & 49 deletions
Original file line numberDiff line numberDiff line change
@@ -6,60 +6,60 @@ target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f3
66
define float @test1(i32 %hash, float %x, float %y, float %z, float %w) {
77
; CHECK-LABEL: @test1(
88
; CHECK-NEXT: entry:
9-
; CHECK-NEXT: [[TMP3:%.*]] = shl i32 [[HASH:%.*]], 2
10-
; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[TMP3]], 124
11-
; CHECK-NEXT: [[TMP0:%.*]] = zext nneg i32 [[TMP5]] to i64
12-
; CHECK-NEXT: [[TMP753:%.*]] = getelementptr [128 x float], ptr @C.0.1248, i64 0, i64 [[TMP0]]
13-
; CHECK-NEXT: [[TMP9:%.*]] = load float, ptr [[TMP753]], align 4
14-
; CHECK-NEXT: [[TMP11:%.*]] = fmul float [[TMP9]], [[X:%.*]]
15-
; CHECK-NEXT: [[TMP13:%.*]] = fadd float [[TMP11]], 0.000000e+00
16-
; CHECK-NEXT: [[TMP17_SUM52:%.*]] = or disjoint i32 [[TMP5]], 1
17-
; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[TMP17_SUM52]] to i64
18-
; CHECK-NEXT: [[TMP1851:%.*]] = getelementptr [128 x float], ptr @C.0.1248, i64 0, i64 [[TMP1]]
19-
; CHECK-NEXT: [[TMP19:%.*]] = load float, ptr [[TMP1851]], align 4
20-
; CHECK-NEXT: [[TMP21:%.*]] = fmul float [[TMP19]], [[Y:%.*]]
21-
; CHECK-NEXT: [[TMP23:%.*]] = fadd float [[TMP21]], [[TMP13]]
22-
; CHECK-NEXT: [[TMP27_SUM50:%.*]] = or disjoint i32 [[TMP5]], 2
23-
; CHECK-NEXT: [[TMP2:%.*]] = zext nneg i32 [[TMP27_SUM50]] to i64
24-
; CHECK-NEXT: [[TMP2849:%.*]] = getelementptr [128 x float], ptr @C.0.1248, i64 0, i64 [[TMP2]]
25-
; CHECK-NEXT: [[TMP29:%.*]] = load float, ptr [[TMP2849]], align 4
26-
; CHECK-NEXT: [[TMP31:%.*]] = fmul float [[TMP29]], [[Z:%.*]]
27-
; CHECK-NEXT: [[TMP33:%.*]] = fadd float [[TMP31]], [[TMP23]]
28-
; CHECK-NEXT: [[TMP37_SUM48:%.*]] = or disjoint i32 [[TMP5]], 3
29-
; CHECK-NEXT: [[TMP3:%.*]] = zext nneg i32 [[TMP37_SUM48]] to i64
30-
; CHECK-NEXT: [[TMP3847:%.*]] = getelementptr [128 x float], ptr @C.0.1248, i64 0, i64 [[TMP3]]
31-
; CHECK-NEXT: [[TMP39:%.*]] = load float, ptr [[TMP3847]], align 4
32-
; CHECK-NEXT: [[TMP41:%.*]] = fmul float [[TMP39]], [[W:%.*]]
33-
; CHECK-NEXT: [[TMP43:%.*]] = fadd float [[TMP41]], [[TMP33]]
34-
; CHECK-NEXT: ret float [[TMP43]]
9+
; CHECK-NEXT: [[T3:%.*]] = shl i32 [[HASH:%.*]], 2
10+
; CHECK-NEXT: [[T5:%.*]] = and i32 [[T3]], 124
11+
; CHECK-NEXT: [[TMP0:%.*]] = zext nneg i32 [[T5]] to i64
12+
; CHECK-NEXT: [[T753:%.*]] = getelementptr [128 x float], ptr @C.0.1248, i64 0, i64 [[TMP0]]
13+
; CHECK-NEXT: [[T9:%.*]] = load float, ptr [[T753]], align 4
14+
; CHECK-NEXT: [[T11:%.*]] = fmul float [[T9]], [[X:%.*]]
15+
; CHECK-NEXT: [[T13:%.*]] = fadd float [[T11]], 0.000000e+00
16+
; CHECK-NEXT: [[T17_SUM52:%.*]] = or disjoint i32 [[T5]], 1
17+
; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[T17_SUM52]] to i64
18+
; CHECK-NEXT: [[T1851:%.*]] = getelementptr [128 x float], ptr @C.0.1248, i64 0, i64 [[TMP1]]
19+
; CHECK-NEXT: [[T19:%.*]] = load float, ptr [[T1851]], align 4
20+
; CHECK-NEXT: [[T21:%.*]] = fmul float [[T19]], [[Y:%.*]]
21+
; CHECK-NEXT: [[T23:%.*]] = fadd float [[T21]], [[T13]]
22+
; CHECK-NEXT: [[T27_SUM50:%.*]] = or disjoint i32 [[T5]], 2
23+
; CHECK-NEXT: [[TMP2:%.*]] = zext nneg i32 [[T27_SUM50]] to i64
24+
; CHECK-NEXT: [[T2849:%.*]] = getelementptr [128 x float], ptr @C.0.1248, i64 0, i64 [[TMP2]]
25+
; CHECK-NEXT: [[T29:%.*]] = load float, ptr [[T2849]], align 4
26+
; CHECK-NEXT: [[T31:%.*]] = fmul float [[T29]], [[Z:%.*]]
27+
; CHECK-NEXT: [[T33:%.*]] = fadd float [[T31]], [[T23]]
28+
; CHECK-NEXT: [[T37_SUM48:%.*]] = or disjoint i32 [[T5]], 3
29+
; CHECK-NEXT: [[TMP3:%.*]] = zext nneg i32 [[T37_SUM48]] to i64
30+
; CHECK-NEXT: [[T3847:%.*]] = getelementptr [128 x float], ptr @C.0.1248, i64 0, i64 [[TMP3]]
31+
; CHECK-NEXT: [[T39:%.*]] = load float, ptr [[T3847]], align 4
32+
; CHECK-NEXT: [[T41:%.*]] = fmul float [[T39]], [[W:%.*]]
33+
; CHECK-NEXT: [[T43:%.*]] = fadd float [[T41]], [[T33]]
34+
; CHECK-NEXT: ret float [[T43]]
3535
;
3636
entry:
37-
%lookupTable = alloca [128 x float], align 16 ; <ptr> [#uses=5]
37+
%lookupTable = alloca [128 x float], align 16
3838
call void @llvm.memcpy.p0.p0.i64(ptr align 16 %lookupTable, ptr align 16 @C.0.1248, i64 512, i1 false)
3939

4040

41-
%tmp3 = shl i32 %hash, 2 ; <i32> [#uses=1]
42-
%tmp5 = and i32 %tmp3, 124 ; <i32> [#uses=4]
43-
%tmp753 = getelementptr [128 x float], ptr %lookupTable, i32 0, i32 %tmp5 ; <ptr> [#uses=1]
44-
%tmp9 = load float, ptr %tmp753 ; <float> [#uses=1]
45-
%tmp11 = fmul float %tmp9, %x ; <float> [#uses=1]
46-
%tmp13 = fadd float %tmp11, 0.000000e+00 ; <float> [#uses=1]
47-
%tmp17.sum52 = or i32 %tmp5, 1 ; <i32> [#uses=1]
48-
%tmp1851 = getelementptr [128 x float], ptr %lookupTable, i32 0, i32 %tmp17.sum52 ; <ptr> [#uses=1]
49-
%tmp19 = load float, ptr %tmp1851 ; <float> [#uses=1]
50-
%tmp21 = fmul float %tmp19, %y ; <float> [#uses=1]
51-
%tmp23 = fadd float %tmp21, %tmp13 ; <float> [#uses=1]
52-
%tmp27.sum50 = or i32 %tmp5, 2 ; <i32> [#uses=1]
53-
%tmp2849 = getelementptr [128 x float], ptr %lookupTable, i32 0, i32 %tmp27.sum50 ; <ptr> [#uses=1]
54-
%tmp29 = load float, ptr %tmp2849 ; <float> [#uses=1]
55-
%tmp31 = fmul float %tmp29, %z ; <float> [#uses=1]
56-
%tmp33 = fadd float %tmp31, %tmp23 ; <float> [#uses=1]
57-
%tmp37.sum48 = or i32 %tmp5, 3 ; <i32> [#uses=1]
58-
%tmp3847 = getelementptr [128 x float], ptr %lookupTable, i32 0, i32 %tmp37.sum48 ; <ptr> [#uses=1]
59-
%tmp39 = load float, ptr %tmp3847 ; <float> [#uses=1]
60-
%tmp41 = fmul float %tmp39, %w ; <float> [#uses=1]
61-
%tmp43 = fadd float %tmp41, %tmp33 ; <float> [#uses=1]
62-
ret float %tmp43
41+
%t3 = shl i32 %hash, 2
42+
%t5 = and i32 %t3, 124
43+
%t753 = getelementptr [128 x float], ptr %lookupTable, i32 0, i32 %t5
44+
%t9 = load float, ptr %t753
45+
%t11 = fmul float %t9, %x
46+
%t13 = fadd float %t11, 0.000000e+00
47+
%t17.sum52 = or i32 %t5, 1
48+
%t1851 = getelementptr [128 x float], ptr %lookupTable, i32 0, i32 %t17.sum52
49+
%t19 = load float, ptr %t1851
50+
%t21 = fmul float %t19, %y
51+
%t23 = fadd float %t21, %t13
52+
%t27.sum50 = or i32 %t5, 2
53+
%t2849 = getelementptr [128 x float], ptr %lookupTable, i32 0, i32 %t27.sum50
54+
%t29 = load float, ptr %t2849
55+
%t31 = fmul float %t29, %z
56+
%t33 = fadd float %t31, %t23
57+
%t37.sum48 = or i32 %t5, 3
58+
%t3847 = getelementptr [128 x float], ptr %lookupTable, i32 0, i32 %t37.sum48
59+
%t39 = load float, ptr %t3847
60+
%t41 = fmul float %t39, %w
61+
%t43 = fadd float %t41, %t33
62+
ret float %t43
6363
}
6464

6565
declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind

‎llvm/test/Transforms/InstCombine/merging-multiple-stores-into-successor.ll

Lines changed: 18 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -105,11 +105,11 @@ define i32 @diff_types_diff_width_no_merge(i1 %cond, i32 %a, i64 %b) {
105105
; CHECK-LABEL: @diff_types_diff_width_no_merge(
106106
; CHECK-NEXT: entry:
107107
; CHECK-NEXT: [[ALLOCA:%.*]] = alloca i64, align 8
108-
; CHECK-NEXT: br i1 [[COND:%.*]], label [[A:%.*]], label [[B:%.*]]
109-
; CHECK: A:
108+
; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF:%.*]], label [[ELSE:%.*]]
109+
; CHECK: if:
110110
; CHECK-NEXT: store i32 [[A:%.*]], ptr [[ALLOCA]], align 4
111111
; CHECK-NEXT: br label [[SINK:%.*]]
112-
; CHECK: B:
112+
; CHECK: else:
113113
; CHECK-NEXT: store i64 [[B:%.*]], ptr [[ALLOCA]], align 4
114114
; CHECK-NEXT: br label [[SINK]]
115115
; CHECK: sink:
@@ -118,11 +118,11 @@ define i32 @diff_types_diff_width_no_merge(i1 %cond, i32 %a, i64 %b) {
118118
;
119119
entry:
120120
%alloca = alloca i64
121-
br i1 %cond, label %A, label %B
122-
A:
121+
br i1 %cond, label %if, label %else
122+
if:
123123
store i32 %a, ptr %alloca
124124
br label %sink
125-
B:
125+
else:
126126
store i64 %b, ptr %alloca
127127
br label %sink
128128
sink:
@@ -134,11 +134,11 @@ define <4 x i32> @vec_no_merge(i1 %cond, <2 x i32> %a, <4 x i32> %b) {
134134
; CHECK-LABEL: @vec_no_merge(
135135
; CHECK-NEXT: entry:
136136
; CHECK-NEXT: [[ALLOCA:%.*]] = alloca i64, align 8
137-
; CHECK-NEXT: br i1 [[COND:%.*]], label [[A:%.*]], label [[B:%.*]]
138-
; CHECK: A:
137+
; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF:%.*]], label [[ELSE:%.*]]
138+
; CHECK: if:
139139
; CHECK-NEXT: store <2 x i32> [[A:%.*]], ptr [[ALLOCA]], align 8
140140
; CHECK-NEXT: br label [[SINK:%.*]]
141-
; CHECK: B:
141+
; CHECK: else:
142142
; CHECK-NEXT: store <4 x i32> [[B:%.*]], ptr [[ALLOCA]], align 16
143143
; CHECK-NEXT: br label [[SINK]]
144144
; CHECK: sink:
@@ -147,11 +147,11 @@ define <4 x i32> @vec_no_merge(i1 %cond, <2 x i32> %a, <4 x i32> %b) {
147147
;
148148
entry:
149149
%alloca = alloca i64
150-
br i1 %cond, label %A, label %B
151-
A:
150+
br i1 %cond, label %if, label %else
151+
if:
152152
store <2 x i32> %a, ptr %alloca
153153
br label %sink
154-
B:
154+
else:
155155
store <4 x i32> %b, ptr %alloca
156156
br label %sink
157157
sink:
@@ -195,11 +195,11 @@ define %struct.tup @multi_elem_struct_no_merge(i1 %cond, %struct.tup %a, half %b
195195
; CHECK-LABEL: @multi_elem_struct_no_merge(
196196
; CHECK-NEXT: entry:
197197
; CHECK-NEXT: [[ALLOCA:%.*]] = alloca i64, align 8
198-
; CHECK-NEXT: br i1 [[COND:%.*]], label [[A:%.*]], label [[B:%.*]]
199-
; CHECK: A:
198+
; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF:%.*]], label [[ELSE:%.*]]
199+
; CHECK: if:
200200
; CHECK-NEXT: store [[STRUCT_TUP:%.*]] [[A:%.*]], ptr [[ALLOCA]], align 4
201201
; CHECK-NEXT: br label [[SINK:%.*]]
202-
; CHECK: B:
202+
; CHECK: else:
203203
; CHECK-NEXT: store half [[B:%.*]], ptr [[ALLOCA]], align 2
204204
; CHECK-NEXT: br label [[SINK]]
205205
; CHECK: sink:
@@ -208,11 +208,11 @@ define %struct.tup @multi_elem_struct_no_merge(i1 %cond, %struct.tup %a, half %b
208208
;
209209
entry:
210210
%alloca = alloca i64
211-
br i1 %cond, label %A, label %B
212-
A:
211+
br i1 %cond, label %if, label %else
212+
if:
213213
store %struct.tup %a, ptr %alloca
214214
br label %sink
215-
B:
215+
else:
216216
store half %b, ptr %alloca
217217
br label %sink
218218
sink:

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