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FPGA: Move the simple-add and vector-add samples to the IP Authoring flow (#1369)
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‎DirectProgramming/C++SYCL/DenseLinearAlgebra/simple-add/README.md

+33-5
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@@ -22,9 +22,10 @@ USM, buffer, accessor, kernel, and command groups.
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| Optimized for | Description
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|:--- |:---
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| OS | Ubuntu* 18.04 <br> Windows* 10
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| Hardware | GEN9 or newer <br> Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA (Intel® PAC with Intel® Arria® 10 GX FPGA)
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| Hardware | GEN9 or newer <br> Intel® Agilex®, Arria® 10, and Stratix® 10 FPGAs
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| Software | Intel® oneAPI DPC++/C++ Compiler
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> **Note**: Even though the Intel DPC++/C++ OneAPI compiler is enough to compile for CPU, GPU, FPGA emulation, generating FPGA reports and generating RTL for FPGAs, there are extra software requirements for the FPGA simulation flow and FPGA compiles.
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>
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> For using the simulator flow, Intel® Quartus® Prime Pro Edition and one of the following simulators must be installed and accessible through your PATH:
@@ -33,6 +34,7 @@ USM, buffer, accessor, kernel, and command groups.
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> - ModelSim® SE
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>
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> When using the hardware compile flow, Intel® Quartus® Prime Pro Edition must be installed and accessible through your PATH.
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> **Warning** Make sure you add the device files associated with the FPGA that you are targeting to your Intel® Quartus® Prime installation.
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## Key Implementation Details
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@@ -103,6 +105,19 @@ To learn more about the extensions and how to configure the oneAPI environment,
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cmake .. -DUSM=1
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```
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> **Note**: When building for FPGAs, the default FPGA family will be used (Intel® Agilex®).
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> You can change the default target by using the command:
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> ```
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> cmake .. -DFPGA_DEVICE=<FPGA device family or FPGA part number>
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> ```
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>
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> Alternatively, you can target an explicit FPGA board variant and BSP by using the following command:
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> ```
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> cmake .. -DFPGA_DEVICE=<board-support-package>:<board-variant>
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> ```
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>
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> You will only be able to run an executable on the FPGA if you specified a BSP.
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#### Build for CPU and GPU
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1. Build the program.
@@ -162,6 +177,19 @@ time.)
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cmake -G "NMake Makefiles" .. -DUSM=1
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```
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> **Note**: When building for FPGAs, the default FPGA family will be used (Intel® Agilex®).
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> You can change the default target by using the command:
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> ```
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> cmake -G "NMake Makefiles" .. -DFPGA_DEVICE=<FPGA device family or FPGA part number>
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> ```
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>
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> Alternatively, you can target an explicit FPGA board variant and BSP by using the following command:
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> ```
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> cmake -G "NMake Makefiles" .. -DFPGA_DEVICE=<board-support-package>:<board-variant>
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> ```
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>
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> You will only be able to run an executable on the FPGA if you specified a BSP.
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#### Build for CPU and GPU
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1. Build the program.
@@ -238,7 +266,7 @@ If you receive an error message, troubleshoot the problem using the **Diagnostic
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CL_CONTEXT_MPSIM_DEVICE_INTELFPGA=1 ./simple-add-buffers.fpga_sim
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CL_CONTEXT_MPSIM_DEVICE_INTELFPGA=1 ./simple-add-usm.fpga_sim
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```
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4. Run on FPGA hardware.
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4. Run on FPGA hardware (only if you ran `cmake` with `-DFPGA_DEVICE=<board-support-package>:<board-variant>`).
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```
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./simple-add-buffers.fpga
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./simple-add-usm.fpga
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simple-add-usm.fpga_sim.exe
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set CL_CONTEXT_MPSIM_DEVICE_INTELFPGA=
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```
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4. Run on FPGA hardware.
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4. Run on FPGA hardware (only if you ran `cmake` with `-DFPGA_DEVICE=<board-support-package>:<board-variant>`).
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```
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simple-add-buffers.fpga.exe
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simple-add-usm.fpga.exe
@@ -298,8 +326,8 @@ qsub -I -l nodes=1:gpu:ppn=2 -d .
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|Available Nodes |Command Options
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|:--- |:---
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|GPU |`qsub -l nodes=1:gpu:ppn=2 -d .`
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|CPU |`qsub -l nodes=1:xeon:ppn=2 -d .`
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|GPU |`qsub -l nodes=1:gpu:ppn=2 -d .`
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|CPU |`qsub -l nodes=1:xeon:ppn=2 -d .`
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|FPGA Compile Time |`qsub -l nodes=1:fpga_compile:ppn=2 -d .`
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|FPGA Runtime (Arria 10) |`qsub -l nodes=1:fpga_runtime:arria10:ppn=2 -d .`
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‎DirectProgramming/C++SYCL/DenseLinearAlgebra/simple-add/src/CMakeLists.txt

+2-8
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@@ -48,15 +48,9 @@ add_custom_target(cpu-gpu DEPENDS ${TARGET_NAME})
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# FPGA device selection
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if(NOT DEFINED FPGA_DEVICE)
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if(DEFINED USM AND (NOT(USM EQUAL 0)))
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set(FPGA_DEVICE "intel_s10sx_pac:pac_s10_usm")
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set(DEFAULT_BOARD_STR "Intel Stratix(R) 10 SX with USM support")
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else()
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set(FPGA_DEVICE "intel_a10gx_pac:pac_a10")
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set(DEFAULT_BOARD_STR "Intel Arria(R) 10 GX")
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endif()
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set(FPGA_DEVICE "Agilex")
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message(STATUS "FPGA_DEVICE was not specified.\
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\nConfiguring the design to run on the default FPGA board ${FPGA_DEVICE} (Intel(R) PAC with ${DEFAULT_BOARD_STR} FPGA). \
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\nConfiguring the design to target the default FPGA family (Intel Agilex®). \
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\nPlease refer to the README for information on board selection.")
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else()
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message(STATUS "Configuring the design to run on FPGA device ${FPGA_DEVICE}")

‎DirectProgramming/C++SYCL/DenseLinearAlgebra/vector-add/README.md

+30-3
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@@ -25,7 +25,7 @@ This sample provides example implementations of both Unified Shared Memory (USM)
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| Optimized for | Description
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|:--- |:---
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| OS | Ubuntu* 18.04 <br> Windows* 10
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| Hardware | GEN9 or newer <br> Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA (Intel® PAC with Intel® Arria® 10 GX FPGA)
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| Hardware | GEN9 or newer <br> Intel® Agilex®, Arria® 10, and Stratix® 10 FPGAs
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| Software | Intel® oneAPI DPC++/C++ Compiler
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> **Note**: Even though the Intel DPC++/C++ OneAPI compiler is enough to compile for CPU, GPU, FPGA emulation, generating FPGA reports and generating RTL for FPGAs, there are extra software requirements for the FPGA simulation flow and FPGA compiles.
@@ -36,6 +36,7 @@ This sample provides example implementations of both Unified Shared Memory (USM)
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> - ModelSim® SE
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>
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> When using the hardware compile flow, Intel® Quartus® Prime Pro Edition must be installed and accessible through your PATH.
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> **Warning** Make sure you add the device files associated with the FPGA that you are targeting to your Intel® Quartus® Prime installation.
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## Key Implementation Details
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@@ -103,6 +104,19 @@ To learn more about the extensions and how to configure the oneAPI environment,
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cmake .. -DUSM=1
104105
```
105106

107+
> **Note**: When building for FPGAs, the default FPGA family will be used (Intel® Agilex®).
108+
> You can change the default target by using the command:
109+
> ```
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> cmake .. -DFPGA_DEVICE=<FPGA device family or FPGA part number>
111+
> ```
112+
>
113+
> Alternatively, you can target an explicit FPGA board variant and BSP by using the following command:
114+
> ```
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> cmake .. -DFPGA_DEVICE=<board-support-package>:<board-variant>
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> ```
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>
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> You will only be able to run an executable on the FPGA if you specified a BSP.
119+
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#### Build for CPU and GPU
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108122
1. Build the program.
@@ -162,6 +176,19 @@ time.)
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cmake -G "NMake Makefiles" .. -DUSM=1
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```
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> **Note**: When building for FPGAs, the default FPGA family will be used (Intel® Agilex®).
180+
> You can change the default target by using the command:
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> ```
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> cmake -G "NMake Makefiles" .. -DFPGA_DEVICE=<FPGA device family or FPGA part number>
183+
> ```
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>
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> Alternatively, you can target an explicit FPGA board variant and BSP by using the following command:
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> ```
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> cmake -G "NMake Makefiles" .. -DFPGA_DEVICE=<board-support-package>:<board-variant>
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> ```
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>
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> You will only be able to run an executable on the FPGA if you specified a BSP.
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#### Build for CPU and GPU
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167194
1. Build the program.
@@ -243,7 +270,7 @@ The source files (`vector-add-buffers.cpp` and `vector-add-usm.cpp`) specify the
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CL_CONTEXT_MPSIM_DEVICE_INTELFPGA=1 ./vector-add-buffers.fpga_sim
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CL_CONTEXT_MPSIM_DEVICE_INTELFPGA=1 ./vector-add-usm.fpga_sim
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```
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4. Run on FPGA hardware.
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4. Run on FPGA hardware (only if you ran `cmake` with `-DFPGA_DEVICE=<board-support-package>:<board-variant>`).
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```
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./vector-add-buffers.fpga
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./vector-add-usm.fpga
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vector-add-usm.fpga_sim.exe
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set CL_CONTEXT_MPSIM_DEVICE_INTELFPGA=
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```
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4. Run on FPGA hardware.
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4. Run on FPGA hardware (only if you ran `cmake` with `-DFPGA_DEVICE=<board-support-package>:<board-variant>`).
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```
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vector-add-buffers.fpga.exe
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vector-add-usm.fpga.exe

‎DirectProgramming/C++SYCL/DenseLinearAlgebra/vector-add/src/CMakeLists.txt

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@@ -48,15 +48,9 @@ add_custom_target(cpu-gpu DEPENDS ${TARGET_NAME})
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# FPGA device selection
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if(NOT DEFINED FPGA_DEVICE)
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if(DEFINED USM AND (NOT(USM EQUAL 0)))
52-
set(FPGA_DEVICE "intel_s10sx_pac:pac_s10_usm")
53-
set(DEFAULT_BOARD_STR "Intel Stratix(R) 10 SX with USM support")
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else()
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set(FPGA_DEVICE "intel_a10gx_pac:pac_a10")
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set(DEFAULT_BOARD_STR "Intel Arria(R) 10 GX")
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endif()
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set(FPGA_DEVICE "Agilex")
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message(STATUS "FPGA_DEVICE was not specified.\
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\nConfiguring the design to run on the default FPGA board ${FPGA_DEVICE} (Intel(R) PAC with ${DEFAULT_BOARD_STR} FPGA). \
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\nConfiguring the design to target the default FPGA family (Intel Agilex®). \
6054
\nPlease refer to the README for information on board selection.")
6155
else()
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message(STATUS "Configuring the design to run on FPGA device ${FPGA_DEVICE}")

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