|
| 1 | +; REQUIRES: asserts |
| 2 | + |
| 3 | +; RUN: opt -passes=loop-vectorize -debug-only=loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -prefer-inloop-reductions -disable-output %s 2>&1 | FileCheck %s |
| 4 | + |
| 5 | +; Tests for printing VPlans with reductions. |
| 6 | + |
| 7 | +define float @print_reduction(i64 %n, ptr noalias %y) { |
| 8 | +; CHECK-LABEL: Checking a loop in 'print_reduction' |
| 9 | +; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { |
| 10 | +; CHECK-NEXT: Live-in vp<[[VFxUF:%.]]> = VF * UF |
| 11 | +; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count |
| 12 | +; CHECK-NEXT: Live-in ir<%n> = original trip-count |
| 13 | +; CHECK-EMPTY: |
| 14 | +; CHECK-NEXT: ir-bb<entry>: |
| 15 | +; CHECK-NEXT: Successor(s): vector.ph |
| 16 | +; CHECK-EMPTY: |
| 17 | +; CHECK-NEXT: vector.ph: |
| 18 | +; CHECK-NEXT: Successor(s): vector loop |
| 19 | +; CHECK-EMPTY: |
| 20 | +; CHECK-NEXT: <x1> vector loop: { |
| 21 | +; CHECK-NEXT: vector.body: |
| 22 | +; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION ir<0>, vp<[[CAN_IV_NEXT:%.+]]> |
| 23 | +; CHECK-NEXT: WIDEN-REDUCTION-PHI ir<%red> = phi ir<0.000000e+00>, ir<%red.next> |
| 24 | +; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1> |
| 25 | +; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr inbounds ir<%y>, vp<[[STEPS]]> |
| 26 | +; CHECK-NEXT: vp<[[VEC_PTR:%.+]]> = vector-pointer ir<%arrayidx> |
| 27 | +; CHECK-NEXT: WIDEN ir<%lv> = load vp<[[VEC_PTR]]> |
| 28 | +; CHECK-NEXT: REDUCE ir<%red.next> = ir<%red> + fast reduce.fadd (ir<%lv>) |
| 29 | +; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]> |
| 30 | +; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VTC]]> |
| 31 | +; CHECK-NEXT: No successors |
| 32 | +; CHECK-NEXT: } |
| 33 | +; CHECK-NEXT: Successor(s): middle.block |
| 34 | +; CHECK-EMPTY: |
| 35 | +; CHECK-NEXT: middle.block: |
| 36 | +; CHECK-NEXT: EMIT vp<[[RED_RES:%.+]]> = compute-reduction-result ir<%red>, ir<%red.next> |
| 37 | +; CHECK-NEXT: EMIT vp<[[RED_EX:%.+]]> = extract-from-end vp<[[RED_RES]]>, ir<1> |
| 38 | +; CHECK-NEXT: EMIT vp<[[CMP:%.+]]> = icmp eq ir<%n>, vp<[[VTC]]> |
| 39 | +; CHECK-NEXT: EMIT branch-on-cond vp<[[CMP]]> |
| 40 | +; CHECK-NEXT: Successor(s): ir-bb<exit>, scalar.ph |
| 41 | +; CHECK-EMPTY: |
| 42 | +; CHECK-NEXT: scalar.ph |
| 43 | +; CHECK-NEXT: EMIT vp<[[RESUME_IV:%.+]]> = resume-phi vp<[[VTC]]>, ir<0> |
| 44 | +; CHECK-NEXT: EMIT vp<[[RED_RESUME:%.+]]> = resume-phi vp<[[RED_RES]]>, ir<0.000000e+00> |
| 45 | +; CHECK-NEXT: Successor(s): ir-bb<loop> |
| 46 | +; CHECK-EMPTY: |
| 47 | +; CHECK-NEXT: ir-bb<loop>: |
| 48 | +; CHECK-NEXT: IR %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ] (extra operand: vp<[[RESUME_IV]]> from scalar.ph) |
| 49 | +; CHECK: IR %exitcond = icmp eq i64 %iv.next, %n |
| 50 | +; CHECK-NEXT: No successors |
| 51 | +; CHECK-EMPTY: |
| 52 | +; CHECK-NEXT: ir-bb<exit> |
| 53 | +; CHECK-NEXT: IR %red.next.lcssa = phi float [ %red.next, %loop ] (extra operand: vp<[[RED_EX]]> from middle.block) |
| 54 | +; CHECK-NEXT: No successors |
| 55 | +; CHECK-NEXT: } |
| 56 | +; |
| 57 | +entry: |
| 58 | + br label %loop |
| 59 | + |
| 60 | +loop: ; preds = %entry, %loop |
| 61 | + %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ] |
| 62 | + %red = phi float [ %red.next, %loop ], [ 0.0, %entry ] |
| 63 | + %arrayidx = getelementptr inbounds float, ptr %y, i64 %iv |
| 64 | + %lv = load float, ptr %arrayidx, align 4 |
| 65 | + %red.next = fadd fast float %lv, %red |
| 66 | + %iv.next = add i64 %iv, 1 |
| 67 | + %exitcond = icmp eq i64 %iv.next, %n |
| 68 | + br i1 %exitcond, label %exit, label %loop |
| 69 | + |
| 70 | +exit: ; preds = %loop, %entry |
| 71 | + ret float %red.next |
| 72 | +} |
| 73 | + |
| 74 | +define void @print_reduction_with_invariant_store(i64 %n, ptr noalias %y, ptr noalias %dst) { |
| 75 | +; CHECK-LABEL: Checking a loop in 'print_reduction_with_invariant_store' |
| 76 | +; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { |
| 77 | +; CHECK-NEXT: Live-in vp<[[VFxUF:%.]]> = VF * UF |
| 78 | +; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count |
| 79 | +; CHECK-NEXT: Live-in ir<%n> = original trip-count |
| 80 | +; CHECK-EMPTY: |
| 81 | +; CHECK-NEXT: ir-bb<entry>: |
| 82 | +; CHECK-NEXT: Successor(s): vector.ph |
| 83 | +; CHECK-EMPTY: |
| 84 | +; CHECK-NEXT: vector.ph: |
| 85 | +; CHECK-NEXT: Successor(s): vector loop |
| 86 | +; CHECK-EMPTY: |
| 87 | +; CHECK-NEXT: <x1> vector loop: { |
| 88 | +; CHECK-NEXT: vector.body: |
| 89 | +; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION ir<0>, vp<[[CAN_IV_NEXT:%.+]]> |
| 90 | +; CHECK-NEXT: WIDEN-REDUCTION-PHI ir<%red> = phi ir<0.000000e+00>, ir<%red.next> |
| 91 | +; CHECK-NEXT: vp<[[IV:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1> |
| 92 | +; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr inbounds ir<%y>, vp<[[IV]]> |
| 93 | +; CHECK-NEXT: vp<[[VEC_PTR:%.+]]> = vector-pointer ir<%arrayidx> |
| 94 | +; CHECK-NEXT: WIDEN ir<%lv> = load vp<[[VEC_PTR]]> |
| 95 | +; CHECK-NEXT: REDUCE ir<%red.next> = ir<%red> + fast reduce.fadd (ir<%lv>) |
| 96 | +; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]> |
| 97 | +; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VTC]]> |
| 98 | +; CHECK-NEXT: No successors |
| 99 | +; CHECK-NEXT: } |
| 100 | +; CHECK-NEXT: Successor(s): middle.block |
| 101 | +; CHECK-EMPTY: |
| 102 | +; CHECK-NEXT: middle.block: |
| 103 | +; CHECK-NEXT: EMIT vp<[[RED_RES:.+]]> = compute-reduction-result ir<%red>, ir<%red.next> |
| 104 | +; CHECK-NEXT: CLONE store vp<[[RED_RES]]>, ir<%dst> |
| 105 | +; CHECK-NEXT: EMIT vp<[[CMP:%.+]]> = icmp eq ir<%n>, vp<[[VTC]]> |
| 106 | +; CHECK-NEXT: EMIT branch-on-cond vp<[[CMP]]> |
| 107 | +; CHECK-NEXT: Successor(s): ir-bb<exit>, scalar.ph |
| 108 | +; CHECK-EMPTY: |
| 109 | +; CHECK-NEXT: scalar.ph |
| 110 | +; CHECK-NEXT: EMIT vp<[[RESUME_IV:%.+]]> = resume-phi vp<[[VTC]]>, ir<0> |
| 111 | +; CHECK-NEXT: EMIT vp<[[RED_RESUME:%.+]]> = resume-phi vp<[[RED_RES]]>, ir<0.000000e+00> |
| 112 | +; CHECK-NEXT: Successor(s): ir-bb<loop> |
| 113 | +; CHECK-EMPTY: |
| 114 | +; CHECK-NEXT: ir-bb<loop>: |
| 115 | +; CHECK-NEXT: IR %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ] (extra operand: vp<[[RESUME_IV]]> from scalar.ph) |
| 116 | +; CHECK-NEXT: IR %red = phi float [ %red.next, %loop ], [ 0.000000e+00, %entry ] |
| 117 | +; CHECK: IR %exitcond = icmp eq i64 %iv.next, %n |
| 118 | +; CHECK-NEXT: No successors |
| 119 | +; CHECK-EMPTY: |
| 120 | +; CHECK-NEXT: ir-bb<exit> |
| 121 | +; CHECK-NEXT: No successors |
| 122 | +; CHECK-NEXT: } |
| 123 | +; |
| 124 | +entry: |
| 125 | + br label %loop |
| 126 | + |
| 127 | +loop: ; preds = %entry, %loop |
| 128 | + %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ] |
| 129 | + %red = phi float [ %red.next, %loop ], [ 0.0, %entry ] |
| 130 | + %arrayidx = getelementptr inbounds float, ptr %y, i64 %iv |
| 131 | + %lv = load float, ptr %arrayidx, align 4 |
| 132 | + %red.next = fadd fast float %lv, %red |
| 133 | + store float %red.next, ptr %dst, align 4 |
| 134 | + %iv.next = add i64 %iv, 1 |
| 135 | + %exitcond = icmp eq i64 %iv.next, %n |
| 136 | + br i1 %exitcond, label %exit, label %loop |
| 137 | + |
| 138 | +exit: ; preds = %loop, %entry |
| 139 | + ret void |
| 140 | +} |
| 141 | + |
| 142 | +define float @print_fmuladd_strict(ptr %a, ptr %b, i64 %n) { |
| 143 | +; CHECK-LABEL: Checking a loop in 'print_fmuladd_strict' |
| 144 | +; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { |
| 145 | +; CHECK-NEXT: Live-in vp<[[VFxUF:%.]]> = VF * UF |
| 146 | +; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count |
| 147 | +; CHECK-NEXT: Live-in ir<%n> = original trip-count |
| 148 | +; CHECK-EMPTY: |
| 149 | +; CHECK-NEXT: ir-bb<entry>: |
| 150 | +; CHECK-NEXT: Successor(s): vector.ph |
| 151 | +; CHECK-EMPTY: |
| 152 | +; CHECK-NEXT: vector.ph: |
| 153 | +; CHECK-NEXT: Successor(s): vector loop |
| 154 | +; CHECK-EMPTY: |
| 155 | +; CHECK-NEXT: <x1> vector loop: { |
| 156 | +; CHECK-NEXT: vector.body: |
| 157 | +; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION ir<0>, vp<[[CAN_IV_NEXT:%.+]]> |
| 158 | +; CHECK-NEXT: WIDEN-REDUCTION-PHI ir<%sum.07> = phi ir<0.000000e+00>, ir<%muladd> |
| 159 | +; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1> |
| 160 | +; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr inbounds ir<%a>, vp<[[STEPS]]> |
| 161 | +; CHECK-NEXT: vp<[[VEC_PTR:%.+]]> = vector-pointer ir<%arrayidx> |
| 162 | +; CHECK-NEXT: WIDEN ir<%l.a> = load vp<[[VEC_PTR]]> |
| 163 | +; CHECK-NEXT: CLONE ir<%arrayidx2> = getelementptr inbounds ir<%b>, vp<[[STEPS]]> |
| 164 | +; CHECK-NEXT: vp<[[VEC_PTR2:%.+]]> = vector-pointer ir<%arrayidx2> |
| 165 | +; CHECK-NEXT: WIDEN ir<%l.b> = load vp<[[VEC_PTR2]]> |
| 166 | +; CHECK-NEXT: EMIT vp<[[FMUL:%.+]]> = fmul nnan ninf nsz ir<%l.a>, ir<%l.b> |
| 167 | +; CHECK-NEXT: REDUCE ir<[[MULADD:%.+]]> = ir<%sum.07> + nnan ninf nsz reduce.fadd (vp<[[FMUL]]>) |
| 168 | +; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]> |
| 169 | +; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VTC]]> |
| 170 | +; CHECK-NEXT: No successors |
| 171 | +; CHECK-NEXT: } |
| 172 | +; CHECK-NEXT: Successor(s): middle.block |
| 173 | +; CHECK-EMPTY: |
| 174 | +; CHECK-NEXT: middle.block: |
| 175 | +; CHECK-NEXT: EMIT vp<[[RED_RES:%.+]]> = compute-reduction-result ir<%sum.07>, ir<[[MULADD]]> |
| 176 | +; CHECK-NEXT: EMIT vp<[[RED_EX:%.+]]> = extract-from-end vp<[[RED_RES]]>, ir<1> |
| 177 | +; CHECK-NEXT: EMIT vp<[[CMP:%.+]]> = icmp eq ir<%n>, vp<[[VTC]]> |
| 178 | +; CHECK-NEXT: EMIT branch-on-cond vp<[[CMP]]> |
| 179 | +; CHECK-NEXT: Successor(s): ir-bb<exit>, scalar.ph |
| 180 | +; CHECK-EMPTY: |
| 181 | +; CHECK-NEXT: scalar.ph |
| 182 | +; CHECK-NEXT: EMIT vp<[[RESUME_IV:%.+]]> = resume-phi vp<[[VTC]]>, ir<0> |
| 183 | +; CHECK-NEXT: EMIT vp<[[RED_RESUME:%.+]]> = resume-phi vp<[[RED_RES]]>, ir<0.000000e+00> |
| 184 | +; CHECK-NEXT: Successor(s): ir-bb<loop> |
| 185 | +; CHECK-EMPTY: |
| 186 | +; CHECK-NEXT: ir-bb<loop>: |
| 187 | +; CHECK-NEXT: IR %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] (extra operand: vp<[[RESUME_IV]]> from scalar.ph) |
| 188 | +; CHECK-NEXT: IR %sum.07 = phi float [ 0.000000e+00, %entry ], [ %muladd, %loop ] (extra operand: vp<[[RED_RESUME]]> from scalar.ph) |
| 189 | +; CHECK: IR %exitcond.not = icmp eq i64 %iv.next, %n |
| 190 | +; CHECK-NEXT: No successors |
| 191 | +; CHECK-EMPTY: |
| 192 | +; CHECK-NEXT: ir-bb<exit> |
| 193 | +; CHECK-NEXT: IR %muladd.lcssa = phi float [ %muladd, %loop ] (extra operand: vp<[[RED_EX]]> from middle.block) |
| 194 | +; CHECK-NEXT: No successors |
| 195 | +; CHECK-NEXT:} |
| 196 | + |
| 197 | +entry: |
| 198 | + br label %loop |
| 199 | + |
| 200 | +loop: |
| 201 | + %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] |
| 202 | + %sum.07 = phi float [ 0.000000e+00, %entry ], [ %muladd, %loop ] |
| 203 | + %arrayidx = getelementptr inbounds float, ptr %a, i64 %iv |
| 204 | + %l.a = load float, ptr %arrayidx, align 4 |
| 205 | + %arrayidx2 = getelementptr inbounds float, ptr %b, i64 %iv |
| 206 | + %l.b = load float, ptr %arrayidx2, align 4 |
| 207 | + %muladd = tail call nnan ninf nsz float @llvm.fmuladd.f32(float %l.a, float %l.b, float %sum.07) |
| 208 | + %iv.next = add nuw nsw i64 %iv, 1 |
| 209 | + %exitcond.not = icmp eq i64 %iv.next, %n |
| 210 | + br i1 %exitcond.not, label %exit, label %loop |
| 211 | + |
| 212 | +exit: |
| 213 | + ret float %muladd |
| 214 | +} |
| 215 | + |
| 216 | +define i64 @find_last_iv(ptr %a, i64 %n, i64 %start) { |
| 217 | +; CHECK-LABEL: Checking a loop in 'find_last_iv' |
| 218 | +; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' { |
| 219 | +; CHECK: <x1> vector loop: { |
| 220 | +; CHECK-NEXT: vector.body: |
| 221 | +; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION ir<0>, vp<%index.next> |
| 222 | +; CHECK-NEXT: ir<%iv> = WIDEN-INDUCTION ir<0>, ir<1>, vp<{{.+}}> |
| 223 | +; CHECK-NEXT: WIDEN-REDUCTION-PHI ir<%rdx> = phi ir<-9223372036854775808>, ir<%cond> |
| 224 | +; CHECK-NEXT: vp<[[SCALAR_STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1> |
| 225 | +; CHECK-NEXT: CLONE ir<%gep.a> = getelementptr inbounds ir<%a>, vp<[[SCALAR_STEPS]]> |
| 226 | +; CHECK-NEXT: vp<[[VEC_PTR:%.+]]> = vector-pointer ir<%gep.a> |
| 227 | +; CHECK-NEXT: WIDEN ir<%l.a> = load vp<[[VEC_PTR]]> |
| 228 | +; CHECK-NEXT: WIDEN ir<%cmp2> = icmp eq ir<%l.a>, ir<%start> |
| 229 | +; CHECK-NEXT: WIDEN-SELECT ir<%cond> = select ir<%cmp2>, ir<%iv>, ir<%rdx> |
| 230 | +; CHECK-NEXT: EMIT vp<%index.next> = add nuw vp<[[CAN_IV]]>, vp<{{.+}}> |
| 231 | +; CHECK-NEXT: EMIT branch-on-count vp<%index.next>, vp<{{.+}}> |
| 232 | +; CHECK-NEXT: No successors |
| 233 | +; CHECK-NEXT: } |
| 234 | +; CHECK-NEXT: Successor(s): middle.block |
| 235 | +; CHECK-EMPTY: |
| 236 | +; CHECK-NEXT: middle.block: |
| 237 | +; CHECK-NEXT: EMIT vp<[[RDX_RES:%.+]]> = compute-reduction-result ir<%rdx>, ir<%cond> |
| 238 | +; CHECK-NEXT: EMIT vp<[[EXT:%.+]]> = extract-from-end vp<[[RDX_RES]]>, ir<1> |
| 239 | +; CHECK-NEXT: EMIT vp<%cmp.n> = icmp eq ir<%n>, vp<{{.+}}> |
| 240 | +; CHECK-NEXT: EMIT branch-on-cond vp<%cmp.n> |
| 241 | +; CHECK-NEXT: Successor(s): ir-bb<exit>, scalar.ph |
| 242 | +; CHECK-EMPTY: |
| 243 | +; CHECK-NEXT: scalar.ph: |
| 244 | +; CHECK-NEXT: EMIT vp<%bc.resume.val> = resume-phi vp<{{.+}}>, ir<0> |
| 245 | +; CHECK-NEXT: EMIT vp<%bc.merge.rdx> = resume-phi vp<[[RDX_RES]]>, ir<%start> |
| 246 | +; |
| 247 | +; CHECK: ir-bb<exit>: |
| 248 | +; CHECK-NEXT: IR %cond.lcssa = phi i64 [ %cond, %loop ] (extra operand: vp<[[EXT]]> from middle.block) |
| 249 | +; CHECK-NEXT: No successors |
| 250 | +; |
| 251 | +entry: |
| 252 | + br label %loop |
| 253 | + |
| 254 | +loop: |
| 255 | + %iv = phi i64 [ 0, %entry ], [ %inc, %loop ] |
| 256 | + %rdx = phi i64 [ %start, %entry ], [ %cond, %loop ] |
| 257 | + %gep.a = getelementptr inbounds i64, ptr %a, i64 %iv |
| 258 | + %l.a = load i64, ptr %gep.a, align 8 |
| 259 | + %cmp2 = icmp eq i64 %l.a, %start |
| 260 | + %cond = select i1 %cmp2, i64 %iv, i64 %rdx |
| 261 | + %inc = add nuw nsw i64 %iv, 1 |
| 262 | + %exitcond.not = icmp eq i64 %inc, %n |
| 263 | + br i1 %exitcond.not, label %exit, label %loop |
| 264 | + |
| 265 | +exit: |
| 266 | + ret i64 %cond |
| 267 | +} |
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